]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - board/xilinx/microblaze-generic/microblaze-generic.c
microblaze: Remove FSL support from generic board
[karo-tx-uboot.git] / board / xilinx / microblaze-generic / microblaze-generic.c
index c4c13a668277611e6d70712c18a92bda104eeacf..70f94c1a5973a12be8ae2ccf93f78a4390ef9f4a 100644 (file)
@@ -28,6 +28,7 @@
 #include <common.h>
 #include <config.h>
 #include <netdev.h>
+#include <asm/processor.h>
 #include <asm/microblaze_intc.h>
 #include <asm/asm.h>
 
@@ -52,22 +53,10 @@ int gpio_init (void)
        return 0;
 }
 
-#ifdef CONFIG_SYS_FSL_2
-void fsl_isr2 (void *arg) {
-       volatile int num;
-       *((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)) =
-           ++(*((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)));
-       GET (num, 2);
-       NGET (num, 2);
-       puts("*");
-}
-
-int fsl_init2 (void) {
-       puts("fsl_init2\n");
-       install_interrupt_handler (FSL_INTR_2, fsl_isr2, NULL);
-       return 0;
+void board_init(void)
+{
+       gpio_init();
 }
-#endif
 
 int board_eth_init(bd_t *bis)
 {
@@ -90,5 +79,41 @@ int board_eth_init(bd_t *bis)
        ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
                        txpp, rxpp);
 #endif
+
+#ifdef CONFIG_XILINX_LL_TEMAC
+# ifdef XILINX_LLTEMAC_BASEADDR
+#  ifdef XILINX_LLTEMAC_FIFO_BASEADDR
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
+                       XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR);
+#  elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR
+#   if XILINX_LLTEMAC_SDMA_USE_DCR == 1
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
+                       XILINX_LL_TEMAC_M_SDMA_DCR,
+                       XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
+#   else
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
+                       XILINX_LL_TEMAC_M_SDMA_PLB,
+                       XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
+#   endif
+#  endif
+# endif
+# ifdef XILINX_LLTEMAC_BASEADDR1
+#  ifdef XILINX_LLTEMAC_FIFO_BASEADDR1
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
+                       XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1);
+#  elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1
+#   if XILINX_LLTEMAC_SDMA_USE_DCR == 1
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
+                       XILINX_LL_TEMAC_M_SDMA_DCR,
+                       XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
+#   else
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
+                       XILINX_LL_TEMAC_M_SDMA_PLB,
+                       XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
+#   endif
+#  endif
+# endif
+#endif
+
        return ret;
 }