karo: merge with Ka-Ro specific tree for secure boot support

[karo-tx-uboot.git] / drivers / dma / apbh_dma.c

diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index 22defcd7d9223be898b18cdc8ae1236a38272671..983111ad29e8a18b360322ba09b908cc4785eb8a 100644 (file)
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -23,6 +23,7 @@
 #include <asm/imx-common/regs-apbh.h>
 
 static struct mxs_dma_chan mxs_dma_channels[MXS_MAX_DMA_CHANNELS];
+static struct mxs_apbh_regs *apbh_regs = (struct mxs_apbh_regs *)MXS_APBH_BASE;
 
 /*
  * Test is the DMA channel is valid channel
@@ -31,12 +32,16 @@ int mxs_dma_validate_chan(int channel)
 {
        struct mxs_dma_chan *pchan;
 
-       if ((channel < 0) || (channel >= MXS_MAX_DMA_CHANNELS))
+       if ((channel < 0) || (channel >= MXS_MAX_DMA_CHANNELS)) {
+               printf("Invalid DMA channel %d\n", channel);
                return -EINVAL;
+       }
 
        pchan = mxs_dma_channels + channel;
-       if (!(pchan->flags & MXS_DMA_FLAGS_ALLOCATED))
+       if (!(pchan->flags & MXS_DMA_FLAGS_ALLOCATED)) {
+               printf("DMA channel %d not allocated\n", channel);
                return -EINVAL;
+       }
 
        return 0;
 }
@@ -65,8 +70,6 @@ static unsigned int mxs_dma_cmd_address(struct mxs_dma_desc *desc)
  */
 static int mxs_dma_read_semaphore(int channel)
 {
-       struct mxs_apbh_regs *apbh_regs =
-               (struct mxs_apbh_regs *)MXS_APBH_BASE;
        uint32_t tmp;
        int ret;
 
@@ -83,7 +86,7 @@ static int mxs_dma_read_semaphore(int channel)
 }
 
 #ifndef        CONFIG_SYS_DCACHE_OFF
-void mxs_dma_flush_desc(struct mxs_dma_desc *desc)
+static void mxs_dma_flush_desc(struct mxs_dma_desc *desc)
 {
        uint32_t addr;
        uint32_t size;
@@ -94,7 +97,9 @@ void mxs_dma_flush_desc(struct mxs_dma_desc *desc)
        flush_dcache_range(addr, addr + size);
 }
 #else
-inline void mxs_dma_flush_desc(struct mxs_dma_desc *desc) {}
+static inline void mxs_dma_flush_desc(struct mxs_dma_desc *desc)
+{
+}
 #endif
 
 /*
@@ -108,8 +113,6 @@ inline void mxs_dma_flush_desc(struct mxs_dma_desc *desc) {}
  */
 static int mxs_dma_enable(int channel)
 {
-       struct mxs_apbh_regs *apbh_regs =
-               (struct mxs_apbh_regs *)MXS_APBH_BASE;
        unsigned int sem;
        struct mxs_dma_chan *pchan;
        struct mxs_dma_desc *pdesc;
@@ -128,7 +131,7 @@ static int mxs_dma_enable(int channel)
 
        pdesc = list_first_entry(&pchan->active, struct mxs_dma_desc, node);
        if (pdesc == NULL)
-               return -EFAULT;
+               return -EINVAL;
 
        if (pchan->flags & MXS_DMA_FLAGS_BUSY) {
                if (!(pdesc->cmd.data & MXS_DMA_DESC_CHAIN))
@@ -151,12 +154,12 @@ static int mxs_dma_enable(int channel)
        } else {
                pchan->active_num += pchan->pending_num;
                pchan->pending_num = 0;
+               writel(1 << (channel + APBH_CTRL0_CLKGATE_CHANNEL_OFFSET),
+                       &apbh_regs->hw_apbh_ctrl0_clr);
                writel(mxs_dma_cmd_address(pdesc),
                        &apbh_regs->ch[channel].hw_apbh_ch_nxtcmdar);
                writel(pchan->active_num,
                        &apbh_regs->ch[channel].hw_apbh_ch_sema);
-               writel(1 << (channel + APBH_CTRL0_CLKGATE_CHANNEL_OFFSET),
-                       &apbh_regs->hw_apbh_ctrl0_clr);
        }
 
        pchan->flags |= MXS_DMA_FLAGS_BUSY;
@@ -180,8 +183,6 @@ static int mxs_dma_enable(int channel)
 static int mxs_dma_disable(int channel)
 {
        struct mxs_dma_chan *pchan;
-       struct mxs_apbh_regs *apbh_regs =
-               (struct mxs_apbh_regs *)MXS_APBH_BASE;
        int ret;
 
        ret = mxs_dma_validate_chan(channel);
@@ -190,13 +191,12 @@ static int mxs_dma_disable(int channel)
 
        pchan = mxs_dma_channels + channel;
 
-       if (!(pchan->flags & MXS_DMA_FLAGS_BUSY))
+       if ((pchan->flags & MXS_DMA_FLAGS_BUSY)) {
+               printf("%s: DMA channel %d busy\n", __func__, channel);
                return -EINVAL;
-
+       }
        writel(1 << (channel + APBH_CTRL0_CLKGATE_CHANNEL_OFFSET),
                &apbh_regs->hw_apbh_ctrl0_set);
-
-       pchan->flags &= ~MXS_DMA_FLAGS_BUSY;
        pchan->active_num = 0;
        pchan->pending_num = 0;
        list_splice_init(&pchan->active, &pchan->done);
@@ -209,14 +209,12 @@ static int mxs_dma_disable(int channel)
  */
 static int mxs_dma_reset(int channel)
 {
-       struct mxs_apbh_regs *apbh_regs =
-               (struct mxs_apbh_regs *)MXS_APBH_BASE;
        int ret;
 #if defined(CONFIG_MX23)
-       uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_ctrl0_set);
+       uint32_t *setreg = &apbh_regs->hw_apbh_ctrl0_set;
        uint32_t offset = APBH_CTRL0_RESET_CHANNEL_OFFSET;
 #elif (defined(CONFIG_MX28) || defined(CONFIG_MX6))
-       uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_channel_ctrl_set);
+       uint32_t *setreg = &apbh_regs->hw_apbh_channel_ctrl_set;
        uint32_t offset = APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET;
 #endif
 
@@ -236,8 +234,6 @@ static int mxs_dma_reset(int channel)
  */
 static int mxs_dma_enable_irq(int channel, int enable)
 {
-       struct mxs_apbh_regs *apbh_regs =
-               (struct mxs_apbh_regs *)MXS_APBH_BASE;
        int ret;
 
        ret = mxs_dma_validate_chan(channel);
@@ -262,8 +258,6 @@ static int mxs_dma_enable_irq(int channel, int enable)
  */
 static int mxs_dma_ack_irq(int channel)
 {
-       struct mxs_apbh_regs *apbh_regs =
-               (struct mxs_apbh_regs *)MXS_APBH_BASE;
        int ret;
 
        ret = mxs_dma_validate_chan(channel);
@@ -296,6 +290,7 @@ static int mxs_dma_request(int channel)
        pchan->flags |= MXS_DMA_FLAGS_ALLOCATED;
        pchan->active_num = 0;
        pchan->pending_num = 0;
+       pchan->timeout = 10000000;
 
        INIT_LIST_HEAD(&pchan->active);
        INIT_LIST_HEAD(&pchan->done);
@@ -333,6 +328,44 @@ int mxs_dma_release(int channel)
        return 0;
 }
 
+/*
+ * Set the timeout for any DMA operation started with mxs_dma_go()
+ * The timeout value given is in milliseconds
+ */
+int mxs_dma_set_timeout(int channel, unsigned long timeout)
+{
+       int ret;
+       struct mxs_dma_chan *pchan;
+
+       ret = mxs_dma_validate_chan(channel);
+       if (ret)
+               return ret;
+
+       pchan = &mxs_dma_channels[channel];
+
+       if (pchan->flags & MXS_DMA_FLAGS_BUSY)
+               return -EBUSY;
+
+       if (timeout > ~0UL / 1000)
+               return -EINVAL;
+
+       pchan->timeout = timeout;
+       return 0;
+}
+
+unsigned long mxs_dma_get_timeout(int channel)
+{
+       int ret;
+       struct mxs_dma_chan *pchan;
+
+       ret = mxs_dma_validate_chan(channel);
+       if (ret)
+               return 0;
+
+       pchan = &mxs_dma_channels[channel];
+       return pchan->timeout;
+}
+
 /*
  * Allocate DMA descriptor
  */
@@ -499,8 +532,6 @@ static int mxs_dma_finish(int channel, struct list_head *head)
  */
 static int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan)
 {
-       struct mxs_apbh_regs *apbh_regs =
-               (struct mxs_apbh_regs *)MXS_APBH_BASE;
        int ret;
 
        ret = mxs_dma_validate_chan(chan);
@@ -521,16 +552,25 @@ static int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan)
  */
 int mxs_dma_go(int chan)
 {
-       uint32_t timeout = 10000000;
        int ret;
-
+       struct mxs_dma_chan *pchan;
        LIST_HEAD(tmp_desc_list);
 
+       ret = mxs_dma_validate_chan(chan);
+       if (ret)
+               return ret;
+
+       pchan = &mxs_dma_channels[chan];
+
        mxs_dma_enable_irq(chan, 1);
-       mxs_dma_enable(chan);
+       ret = mxs_dma_enable(chan);
+       if (ret) {
+               mxs_dma_enable_irq(chan, 0);
+               return ret;
+       }
 
        /* Wait for DMA to finish. */
-       ret = mxs_dma_wait_complete(timeout, chan);
+       ret = mxs_dma_wait_complete(pchan->timeout * 1000, chan);
 
        /* Clear out the descriptors we just ran. */
        mxs_dma_finish(chan, &tmp_desc_list);
@@ -571,9 +611,6 @@ void mxs_dma_circ_start(int chan, struct mxs_dma_desc *pdesc)
  */
 void mxs_dma_init(void)
 {
-       struct mxs_apbh_regs *apbh_regs =
-               (struct mxs_apbh_regs *)MXS_APBH_BASE;
-
        mxs_reset_block(&apbh_regs->hw_apbh_ctrl0_reg);
 
 #ifdef CONFIG_APBH_DMA_BURST8