mxs_gpio: improve readability by using '(void *)' on right hand size of pointer initi...

[karo-tx-uboot.git] / drivers / gpio / mxs_gpio.c

diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index d9a7a3aaf663e971b4b28b96801e4f402a6ced51..f7611045710444a5d267c4f3f933fee035337b6c 100644 (file)
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -11,10 +11,11 @@
 #include <netdev.h>
 #include <asm/errno.h>
 #include <asm/io.h>
+#include <asm/gpio.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/imx-regs.h>
 
-#if    defined(CONFIG_MX23)
+#if    defined(CONFIG_SOC_MX23)
 #define        PINCTRL_BANKS           3
 #define        PINCTRL_DOUT(n)         (0x0500 + ((n) * 0x10))
 #define        PINCTRL_DIN(n)          (0x0600 + ((n) * 0x10))
@@ -22,7 +23,7 @@
 #define        PINCTRL_PIN2IRQ(n)      (0x0800 + ((n) * 0x10))
 #define        PINCTRL_IRQEN(n)        (0x0900 + ((n) * 0x10))
 #define        PINCTRL_IRQSTAT(n)      (0x0c00 + ((n) * 0x10))
-#elif  defined(CONFIG_MX28)
+#elif  defined(CONFIG_SOC_MX28)
 #define        PINCTRL_BANKS           5
 #define        PINCTRL_DOUT(n)         (0x0700 + ((n) * 0x10))
 #define        PINCTRL_DIN(n)          (0x0900 + ((n) * 0x10))
@@ -31,16 +32,9 @@
 #define        PINCTRL_IRQEN(n)        (0x1100 + ((n) * 0x10))
 #define        PINCTRL_IRQSTAT(n)      (0x1400 + ((n) * 0x10))
 #else
-#error "Please select CONFIG_MX23 or CONFIG_MX28"
+#error "Please select CONFIG_SOC_MX23 or CONFIG_SOC_MX28"
 #endif
 
-#define GPIO_INT_FALL_EDGE     0x0
-#define GPIO_INT_LOW_LEV       0x1
-#define GPIO_INT_RISE_EDGE     0x2
-#define GPIO_INT_HIGH_LEV      0x3
-#define GPIO_INT_LEV_MASK      (1 << 0)
-#define GPIO_INT_POL_MASK      (1 << 1)
-
 void mxs_gpio_init(void)
 {
        int i;
@@ -57,31 +51,30 @@ int gpio_get_value(unsigned gpio)
 {
        uint32_t bank = PAD_BANK(gpio);
        uint32_t offset = PINCTRL_DIN(bank);
-       struct mxs_register_32 *reg =
-               (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
+       struct mxs_register_32 *reg = (void *)(MXS_PINCTRL_BASE + offset);
 
        return (readl(&reg->reg) >> PAD_PIN(gpio)) & 1;
 }
 
-void gpio_set_value(unsigned gpio, int value)
+int gpio_set_value(unsigned gpio, int value)
 {
        uint32_t bank = PAD_BANK(gpio);
        uint32_t offset = PINCTRL_DOUT(bank);
-       struct mxs_register_32 *reg =
-               (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
+       struct mxs_register_32 *reg = (void *)(MXS_PINCTRL_BASE + offset);
 
        if (value)
                writel(1 << PAD_PIN(gpio), &reg->reg_set);
        else
                writel(1 << PAD_PIN(gpio), &reg->reg_clr);
+
+       return 0;
 }
 
 int gpio_direction_input(unsigned gpio)
 {
        uint32_t bank = PAD_BANK(gpio);
        uint32_t offset = PINCTRL_DOE(bank);
-       struct mxs_register_32 *reg =
-               (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
+       struct mxs_register_32 *reg = (void *)(MXS_PINCTRL_BASE + offset);
 
        writel(1 << PAD_PIN(gpio), &reg->reg_clr);
 
@@ -92,13 +85,12 @@ int gpio_direction_output(unsigned gpio, int value)
 {
        uint32_t bank = PAD_BANK(gpio);
        uint32_t offset = PINCTRL_DOE(bank);
-       struct mxs_register_32 *reg =
-               (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
-
-       writel(1 << PAD_PIN(gpio), &reg->reg_set);
+       struct mxs_register_32 *reg = (void *)(MXS_PINCTRL_BASE + offset);
 
        gpio_set_value(gpio, value);
 
+       writel(1 << PAD_PIN(gpio), &reg->reg_set);
+
        return 0;
 }