sf: Tidy up public and private header files

[karo-tx-uboot.git] / drivers / mtd / spi / sf_internal.h

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index d291746ed4a41238a41d18296e3517363f4f91a5..5b7670c9aaf1219e841cd2dfc5096bb62e7e3390 100644 (file)
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -10,12 +10,45 @@
 #ifndef _SF_INTERNAL_H_
 #define _SF_INTERNAL_H_
 
+#include <linux/types.h>
+#include <linux/compiler.h>
+
+/* Dual SPI flash memories - see SPI_COMM_DUAL_... */
+enum spi_dual_flash {
+       SF_SINGLE_FLASH = 0,
+       SF_DUAL_STACKED_FLASH   = 1 << 0,
+       SF_DUAL_PARALLEL_FLASH  = 1 << 1,
+};
+
+/* Enum list - Full read commands */
+enum spi_read_cmds {
+       ARRAY_SLOW              = 1 << 0,
+       DUAL_OUTPUT_FAST        = 1 << 1,
+       DUAL_IO_FAST            = 1 << 2,
+       QUAD_OUTPUT_FAST        = 1 << 3,
+       QUAD_IO_FAST            = 1 << 4,
+};
+
+#define RD_EXTN        (ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
+#define RD_FULL        (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
+
+/* sf param flags */
+enum {
+       SECT_4K         = 1 << 0,
+       SECT_32K        = 1 << 1,
+       E_FSR           = 1 << 2,
+       WR_QPP          = 1 << 3,
+};
+
+#define SPI_FLASH_3B_ADDR_LEN          3
+#define SPI_FLASH_CMD_LEN              (1 + SPI_FLASH_3B_ADDR_LEN)
 #define SPI_FLASH_16MB_BOUN            0x1000000
 
-/* SECT flags */
-#define SECT_4K                                (1 << 1)
-#define SECT_32K                       (1 << 2)
-#define E_FSR                          (1 << 3)
+/* CFI Manufacture ID's */
+#define SPI_FLASH_CFI_MFR_SPANSION     0x01
+#define SPI_FLASH_CFI_MFR_STMICRO      0x20
+#define SPI_FLASH_CFI_MFR_MACRONIX     0xc2
+#define SPI_FLASH_CFI_MFR_WINBOND      0xef
 
 /* Erase commands */
 #define CMD_ERASE_4K                   0x20
@@ -27,15 +60,20 @@
 #define CMD_WRITE_STATUS               0x01
 #define CMD_PAGE_PROGRAM               0x02
 #define CMD_WRITE_DISABLE              0x04
-#define CMD_READ_STATUS                        0x05
+#define CMD_READ_STATUS                0x05
+#define CMD_QUAD_PAGE_PROGRAM          0x32
 #define CMD_READ_STATUS1               0x35
 #define CMD_WRITE_ENABLE               0x06
-#define CMD_READ_CONFIG                        0x35
-#define CMD_FLAG_STATUS                        0x70
+#define CMD_READ_CONFIG                0x35
+#define CMD_FLAG_STATUS                0x70
 
 /* Read commands */
 #define CMD_READ_ARRAY_SLOW            0x03
 #define CMD_READ_ARRAY_FAST            0x0b
+#define CMD_READ_DUAL_OUTPUT_FAST      0x3b
+#define CMD_READ_DUAL_IO_FAST          0xbb
+#define CMD_READ_QUAD_OUTPUT_FAST      0x6b
+#define CMD_READ_QUAD_IO_FAST          0xeb
 #define CMD_READ_ID                    0x9f
 
 /* Bank addr access commands */
@@ -47,24 +85,53 @@
 #endif
 
 /* Common status */
-#define STATUS_WIP                     0x01
-#define STATUS_PEC                     0x80
+#define STATUS_WIP                     (1 << 0)
+#define STATUS_QEB_WINSPAN             (1 << 1)
+#define STATUS_QEB_MXIC                (1 << 6)
+#define STATUS_PEC                     (1 << 7)
+
+#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
+#define STATUS_SRWD                    (1 << 7) /* SR write protect */
+#endif
 
 /* Flash timeout values */
 #define SPI_FLASH_PROG_TIMEOUT         (2 * CONFIG_SYS_HZ)
-#define SPI_FLASH_PAGE_ERASE_TIMEOUT   (5 * CONFIG_SYS_HZ)
+#define SPI_FLASH_PAGE_ERASE_TIMEOUT           (5 * CONFIG_SYS_HZ)
 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
 
 /* SST specific */
 #ifdef CONFIG_SPI_FLASH_SST
-# define SST_WP                        0x01    /* Supports AAI word program */
+# define SST_WP                0x01    /* Supports AAI word program */
 # define CMD_SST_BP            0x02    /* Byte Program */
-# define CMD_SST_AAI_WP                0xAD    /* Auto Address Incr Word Program */
+# define CMD_SST_AAI_WP        0xAD    /* Auto Address Incr Word Program */
 
 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
                const void *buf);
 #endif
 
+/**
+ * struct spi_flash_params - SPI/QSPI flash device params structure
+ *
+ * @name:              Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
+ * @jedec:             Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
+ * @ext_jedec:         Device ext_jedec ID
+ * @sector_size:       Sector size of this device
+ * @nr_sectors:        No.of sectors on this device
+ * @e_rd_cmd:          Enum list for read commands
+ * @flags:             Important param, for flash specific behaviour
+ */
+struct spi_flash_params {
+       const char *name;
+       u32 jedec;
+       u16 ext_jedec;
+       u32 sector_size;
+       u32 nr_sectors;
+       u8 e_rd_cmd;
+       u16 flags;
+};
+
+extern const struct spi_flash_params spi_flash_params_table[];
+
 /* Send a single-byte command to the device and read the response */
 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
 
@@ -86,11 +153,17 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
 /* Flash erase(sectors) operation, support all possible erase commands */
 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
 
+/* Read the status register */
+int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
+
 /* Program the status register */
-int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
+int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
+
+/* Read the config register */
+int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
 
-/* Set quad enbale bit */
-int spi_flash_set_qeb(struct spi_flash *flash);
+/* Program the config register */
+int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc);
 
 /* Enable writing on the SPI flash */
 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)