net/phy: Correct AR8021 phy_mask

[karo-tx-uboot.git] / drivers / net / phy / atheros.c

diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 9b3808bfa921cca0514f91ae6b74d2e2de3e9cb7..b80980d5524e811d310fffa99cf226465f3d787d 100644 (file)
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -1,24 +1,10 @@
 /*
  * Atheros PHY drivers
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
+ * SPDX-License-Identifier:    GPL-2.0+
  *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011, 2013 Freescale Semiconductor, Inc.
  * author Andy Fleming
- *
  */
 #include <phy.h>
 
@@ -27,22 +13,66 @@ static int ar8021_config(struct phy_device *phydev)
        phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
        phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);
 
+       phydev->supported = phydev->drv->features;
+       return 0;
+}
+
+static int ar8035_config(struct phy_device *phydev)
+{
+       int regval;
+
+       phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x0007);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
+       regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018));
+
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
+       regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
+       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100));
+
+       genphy_config_aneg(phydev);
+
+       phy_reset(phydev);
+
        return 0;
 }
 
 static struct phy_driver AR8021_driver =  {
        .name = "AR8021",
        .uid = 0x4dd040,
-       .mask = 0xfffff0,
+       .mask = 0x4ffff0,
        .features = PHY_GBIT_FEATURES,
        .config = ar8021_config,
        .startup = genphy_startup,
        .shutdown = genphy_shutdown,
 };
 
+static struct phy_driver AR8031_driver =  {
+       .name = "AR8031/AR8033",
+       .uid = 0x4dd074,
+       .mask = 0xffffffef,
+       .features = PHY_GBIT_FEATURES,
+       .config = genphy_config,
+       .startup = genphy_startup,
+       .shutdown = genphy_shutdown,
+};
+
+static struct phy_driver AR8035_driver =  {
+       .name = "AR8035",
+       .uid = 0x4dd072,
+       .mask = 0xffffffef,
+       .features = PHY_GBIT_FEATURES,
+       .config = ar8035_config,
+       .startup = genphy_startup,
+       .shutdown = genphy_shutdown,
+};
+
 int phy_atheros_init(void)
 {
        phy_register(&AR8021_driver);
+       phy_register(&AR8031_driver);
+       phy_register(&AR8035_driver);
 
        return 0;
 }