#define TIMEOUT_CNT 1000
-int sh_eth_send(struct eth_device *dev, volatile void *packet, int len)
+int sh_eth_send(struct eth_device *dev, void *packet, int len)
{
struct sh_eth_dev *eth = dev->priv;
int port = eth->port, ret = 0, timeout;
}
/* packet must be a 4 byte boundary */
- if ((int)packet & (4 - 1)) {
+ if ((int)packet & 3) {
printf(SHETHER_NAME ": %s: packet not 4 byte alligned\n", __func__);
ret = -EFAULT;
goto err;
struct sh_eth_dev *eth = dev->priv;
int port = eth->port, len = 0;
struct sh_eth_info *port_info = ð->port_info[port];
- volatile u8 *packet;
+ uchar *packet;
/* Check if the rx descriptor is ready */
if (!(port_info->rx_desc_cur->rd0 & RD_RACT)) {
/* Check for errors */
if (!(port_info->rx_desc_cur->rd0 & RD_RFE)) {
len = port_info->rx_desc_cur->rd1 & 0xffff;
- packet = (volatile u8 *)
- ADDR_TO_P2(port_info->rx_desc_cur->rd2);
+ packet = (uchar *)
+ ADDR_TO_P2(port_info->rx_desc_cur->rd2);
NetReceive(packet, len);
}
static int sh_eth_reset(struct sh_eth_dev *eth)
{
int port = eth->port;
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
int ret = 0, i;
/* Start e-dmac transmitter and receiver */
/* Point the controller to the tx descriptor list. Must use physical
addresses */
outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port));
outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
outl(0x01, TDFFR(port));/* Last discriptor bit */
/* Point the controller to the rx descriptor list */
outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port));
outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
outl(RDFFR_RDLF, RDFFR(port));
struct eth_device *dev = port_info->dev;
struct phy_device *phydev;
- phydev = phy_connect(miiphy_get_dev_by_name(dev->name),
- port_info->phy_addr, dev, PHY_INTERFACE_MODE_MII);
+ phydev = phy_connect(
+ miiphy_get_dev_by_name(dev->name),
+ port_info->phy_addr, dev, CONFIG_SH_ETHER_PHY_MODE);
port_info->phydev = phydev;
phy_config(phydev);
outl(APR_AP, APR(port));
outl(MPR_MP, MPR(port));
#endif
-#if defined(CONFIG_CPU_SH7763)
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(TPAUSER_TPAUSE, TPAUSER(port));
#elif defined(CONFIG_CPU_SH7757)
outl(TPAUSER_UNLIMITED, TPAUSER(port));
#endif
+#if defined(CONFIG_CPU_SH7734)
+ outl(CONFIG_SH_ETHER_SH7734_MII, RMII_MII(port));
+#endif
/* Configure phy */
ret = sh_eth_phy_config(eth);
if (ret) {
/* Set the transfer speed */
if (phy->speed == 100) {
printf(SHETHER_NAME ": 100Base/");
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(GECMR_100B, GECMR(port));
#elif defined(CONFIG_CPU_SH7757)
outl(1, RTRATE(port));
#endif
} else if (phy->speed == 10) {
printf(SHETHER_NAME ": 10Base/");
-#ifdef CONFIG_CPU_SH7763
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(GECMR_10B, GECMR(port));
#elif defined(CONFIG_CPU_SH7757)
outl(0, RTRATE(port));
#endif
}
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+ else if (phy->speed == 1000) {
+ printf(SHETHER_NAME ": 1000Base/");
+ outl(GECMR_1000B, GECMR(port));
+ }
+#endif
/* Check if full duplex mode is supported by the phy */
if (phy->duplex) {