at91rm9200ek: use atmel_usart

[karo-tx-uboot.git] / include / configs / at91rm9200ek.h

diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h
index b386057c0efb16a3def2b8d0dad7cc36bbb8c8de..b847798aa44a1d5c06c2753e62afc4ee2910c425 100644 (file)
--- a/include/configs/at91rm9200ek.h
+++ b/include/configs/at91rm9200ek.h
@@ -32,6 +32,20 @@
 
 #include <asm/sizes.h>
 
+/*
+ * set some initial configurations depending on configure target
+ *
+ * at91rm9200ek_config     -> boot from 0x0 in NOR Flash at CS0
+ * at91rm9200ek_ram_config -> continue booting from 0x20100000 in RAM; lowlevel
+ *                            initialisation was done by some preloader
+ */
+#ifdef CONFIG_RAMBOOT
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE 0x20100000
+#else
+#define CONFIG_SYS_TEXT_BASE 0x10000000
+#endif
+
 /*
  * AT91C_XTAL_CLOCK is the frequency of external xtal in hertz
  * AT91C_MAIN_CLOCK is the frequency of PLLA output
@@ -41,22 +55,26 @@
  * CONFIG_SYS_HZ is the tick rate for timer tc0
  */
 #define AT91C_XTAL_CLOCK               18432000
+#define CONFIG_SYS_AT91_SLOW_CLOCK     32768
 #define AT91C_MAIN_CLOCK               ((AT91C_XTAL_CLOCK / 4) * 39)
 #define AT91C_MASTER_CLOCK             (AT91C_MAIN_CLOCK / 3 )
 #define CONFIG_SYS_HZ_CLOCK            (AT91C_MASTER_CLOCK / 2)
 #define CONFIG_SYS_HZ                  1000
 
 /* CPU configuration */
-#define CONFIG_ARM920T
 #define CONFIG_AT91RM9200
 #define CONFIG_AT91RM9200EK
 #define CONFIG_CPUAT91
 #define USE_920T_MMU
 
+#include <asm/hardware.h>      /* needed for port definitions */
+
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 
+#define CONFIG_BOARD_EARLY_INIT_F
+
 /*
  * Memory Configuration
  */
@@ -90,7 +108,7 @@
 #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
 #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */
 #define CONFIG_SYS_SDRAM       CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */
-#define CONFIG_SYS_SDRAM1      CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */
+#define CONFIG_SYS_SDRAM1      (CONFIG_SYS_SDRAM_BASE+0x80)
 #define CONFIG_SYS_SDRAM_VAL   0x00000000 /* value written to CONFIG_SYS_SDRAM */
 #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
 #define CONFIG_SYS_SDRC_MR_VAL1        0x00000004 /* refresh */
@@ -107,8 +125,9 @@
  * CONFIG_DBGU is DBGU unit on J10
  * CONFIG_USART1 is USART1 on J14
  */
-#define CONFIG_AT91RM9200_USART
-#define CONFIG_DBGU
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE      ATMEL_BASE_DBGU
+#define CONFIG_USART_ID                0/* ignored in arm */
 
 #define CONFIG_SYS_BAUDRATE_TABLE      {115200 , 19200, 38400, 57600, 9600 }
 #define CONFIG_BAUDRATE                        115200
@@ -156,7 +175,7 @@
 #define CONFIG_DOS_PARTITION                   1
 
 #define CONFIG_SYS_USB_OHCI_CPU_INIT           1
-#define CONFIG_SYS_USB_OHCI_REGS_BASE          AT91_USB_HOST_BASE
+#define CONFIG_SYS_USB_OHCI_REGS_BASE          ATMEL_USB_HOST_BASE
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME          "at91rm9200"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     15
 
@@ -204,11 +223,9 @@
  */
 #define CONFIG_SYS_MALLOC_LEN          ROUND(3 * CONFIG_ENV_SIZE + SZ_128K, \
                                             SZ_4K)
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE       128
 
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + SZ_4K \
-                                       - CONFIG_SYS_GBL_DATA_SIZE)
+                                       - GENERATED_GBL_DATA_SIZE)
 
 #define CONFIG_STACKSIZE               SZ_32K  /* regular stack */
 #define CONFIG_STACKSIZE_IRQ           SZ_4K   /* Unsure if to big or to small*/