#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_RD_LVL
#define CONFIG_NR_DRAM_BANKS 8
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SF_DEFAULT_SPEED 50000000
#define EXYNOS5_SPI_NUM_CONTROLLERS 5
+#define CONFIG_OF_SPI
#endif
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH