#define CONFIG_BOARD_LATE_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_CMD_GPIO
-#ifndef CONFIG_TX6_UBOOT_MFG
/* LCD Logo and Splash screen support */
#ifdef CONFIG_LCD
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
+#ifndef CONFIG_SOC_MX6UL
#define CONFIG_VIDEO_IPUV3
#define CONFIG_IPUV3_CLK (CONFIG_SYS_SDRAM_CLK * 1000000 / 2)
+#else
+#define CONFIG_VIDEO_MXS
+#define MXS_LCDIF_BASE 0x021c8000UL
+#endif /* CONFIG_SOC_MX6UL */
#define CONFIG_LCD_LOGO
#define LCD_BPP LCD_COLOR32
#define CONFIG_CMD_BMP
+#define CONFIG_BMP_8BPP
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
#define CONFIG_VIDEO_BMP_RLE8
#endif /* CONFIG_LCD */
-#endif /* CONFIG_TX6_UBOOT_MFG */
/*
* Memory configuration options
*/
#define CONFIG_NR_DRAM_BANKS 0x1 /* # of SDRAM banks */
+#ifndef CONFIG_SOC_MX6UL
#define PHYS_SDRAM_1 0x10000000 /* Base address of bank 1 */
+#define CONFIG_SYS_MPU_CLK 792
+#else
+#define PHYS_SDRAM_1 0x80000000 /* Base address of bank 1 */
+#define CONFIG_SYS_MPU_CLK 528
+#endif
#ifndef CONFIG_SYS_SDRAM_BUS_WIDTH
#if defined(CONFIG_SYS_SDRAM_BUS_WIDTH_32)
#define CONFIG_SYS_SDRAM_BUS_WIDTH 32
#if defined(CONFIG_SOC_MX6Q)
#elif defined(CONFIG_SOC_MX6DL)
#elif defined(CONFIG_SOC_MX6S)
+#elif defined(CONFIG_SOC_MX6UL)
#else
#error Unsupported i.MX6 processor variant
#endif
#endif
/*
- * Extra Environments
+ * Extra Environment Settings
*/
#ifdef CONFIG_TX6_UBOOT_NOENV
#define CONFIG_EXTRA_ENV_SETTINGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0"
#else
+#define CONFIG_SYS_CPU_CLK_STR xstr(CONFIG_SYS_MPU_CLK)
+
#define CONFIG_EXTRA_ENV_SETTINGS \
"autostart=no\0" \
"baseboard=stk5-v3\0" \
";dhcp\0" \
"bootm_cmd=bootm ${loadaddr} - ${fdtaddr}\0" \
"boot_mode=" CONFIG_SYS_DEFAULT_BOOT_MODE "\0" \
- "cpu_clk=800\0" \
+ "cpu_clk=" CONFIG_SYS_CPU_CLK_STR "\0" \
"default_bootargs=setenv bootargs " CONFIG_BOOTARGS \
" ${append_bootargs}\0" \
EMMC_BOOT_PART_STR \
/* This is required for the FEC driver to work with cache enabled */
#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
+#ifndef CONFIG_SOC_MX6UL
+#define CONFIG_FEC_MXC_PHYADDR 0
#define IMX_FEC_BASE ENET_BASE_ADDR
+#else
+#define FEC_MDIO_BASE_ADDR ENET_BASE_ADDR
+#endif
#define CONFIG_FEC_XCV_TYPE RMII
#endif
#ifdef CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 400000
+#endif /* CONFIG_HARD_I2C */
#if defined(CONFIG_TX6_REV)
#if CONFIG_TX6_REV == 0x1
-#define CONFIG_SYS_I2C_SLAVE 0x3c
#define CONFIG_LTC3676
#elif CONFIG_TX6_REV == 0x2
-#define CONFIG_SYS_I2C_SLAVE 0x32
#define CONFIG_RN5T618
#elif CONFIG_TX6_REV == 0x3
-#define CONFIG_SYS_I2C_SLAVE 0x33
#define CONFIG_RN5T567
#else
#error Unsupported TX6 module revision
#endif
-#endif /* CONFIG_TX6_REV */
+#else /* CONFIG_TX6_REV */
/* autodetect which PMIC is present to derive TX6_REV */
+#ifdef CONFIG_SOC_MX6UL
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C_SOFT_SPEED 400000
+#define CONFIG_SOFT_I2C_GPIO_SCL IMX_GPIO_NR(5, 0)
+#define CONFIG_SOFT_I2C_GPIO_SDA IMX_GPIO_NR(5, 1)
+#define CONFIG_SOFT_I2C_READ_REPEATED_START
+#else
#define CONFIG_LTC3676 /* TX6_REV == 1 */
+#endif
#define CONFIG_RN5T567 /* TX6_REV == 3 */
-#endif /* CONFIG_CMD_I2C */
+#endif /* CONFIG_TX6_REV */
#define CONFIG_ENV_OVERWRITE