ARMv8: enable DM in vexpress64 board

[karo-tx-uboot.git] / include / configs / vexpress_aemv8a.h

diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index cfe3f2f7aff3684b7fdbd8fa44ce8f3ebacd5425..047514ad19137e024788d725188b93b003c72c64 100644 (file)
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -8,6 +8,8 @@
 #ifndef __VEXPRESS_AEMV8A_H
 #define __VEXPRESS_AEMV8A_H
 
+#define CONFIG_DM
+
 /* We use generic board for v8 Versatile Express */
 #define CONFIG_SYS_GENERIC_BOARD
 
@@ -29,8 +31,6 @@
 
 /*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
 
-#define CONFIG_SYS_NO_FLASH
-
 #define CONFIG_SUPPORT_RAW_INITRD
 
 /* Cache Definitions */
@@ -56,14 +56,6 @@
 /* Flat Device Tree Definitions */
 #define CONFIG_OF_LIBFDT
 
-
-/* SMP Spin Table Definitions */
-#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
-#define CPU_RELEASE_ADDR               (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
-#else
-#define CPU_RELEASE_ADDR               (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
-#endif
-
 /* CS register bases for the original memory map. */
 #define V2M_PA_CS0                     0x00000000
 #define V2M_PA_CS1                     0x14000000
@@ -79,13 +71,6 @@
 
 #define V2M_BASE                       0x80000000
 
-/*
- * Physical addresses, offset from V2M_PA_CS0-3
- */
-#define V2M_NOR0                       (V2M_PA_CS0)
-#define V2M_NOR1                       (V2M_PA_CS4)
-#define V2M_SRAM                       (V2M_PA_CS1)
-
 /* Common peripherals relative to CS7. */
 #define V2M_AACI                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
 #define V2M_MMCI                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
@@ -144,6 +129,7 @@
 #define CONFIG_SYS_MEMTEST_END         (V2M_BASE + 0x80000000)
 
 /* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_F_LEN                0x2000
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (8 << 20))
 
 /* Ethernet Configuration */
@@ -159,6 +145,14 @@
 #endif
 
 /* PL011 Serial Configuration */
+#define CONFIG_BAUDRATE                        115200
+#ifdef CONFIG_DM
+#define CONFIG_DM_SERIAL
+#define CONFIG_PL01X_SERIAL
+#else
+#define CONFIG_SYS_SERIAL0             V2M_UART0
+#define CONFIG_SYS_SERIAL1             V2M_UART1
+#define CONFIG_CONS_INDEX              0
 #define CONFIG_PL011_SERIAL
 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 #define CONFIG_PL011_CLOCK             7273800
@@ -167,7 +161,7 @@
 #endif
 #define CONFIG_PL01x_PORTS             {(void *)CONFIG_SYS_SERIAL0, \
                                         (void *)CONFIG_SYS_SERIAL1}
-#define CONFIG_CONS_INDEX              0
+#endif
 
 #define CONFIG_BAUDRATE                        115200
 #define CONFIG_SYS_SERIAL0             V2M_UART0
@@ -183,7 +177,6 @@
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PXE
 #define CONFIG_CMD_ENV
-#define CONFIG_CMD_FLASH
 #define CONFIG_CMD_IMI
 #define CONFIG_CMD_LOADB
 #define CONFIG_CMD_MEMORY
@@ -266,4 +259,27 @@
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_SYS_MAXARGS             64      /* max command args */
 
+/* Flash memory is available on the Juno board only */
+#ifndef CONFIG_TARGET_VEXPRESS64_JUNO
+#define CONFIG_SYS_NO_FLASH
+#else
+#define CONFIG_CMD_FLASH
+#define CONFIG_SYS_FLASH_CFI           1
+#define CONFIG_FLASH_CFI_DRIVER                1
+#define CONFIG_SYS_FLASH_BASE          0x08000000
+#define CONFIG_SYS_FLASH_SIZE          0x04000000 /* 64 MiB */
+#define CONFIG_SYS_MAX_FLASH_BANKS     2
+
+/* Timeout values in ticks */
+#define CONFIG_SYS_FLASH_ERASE_TOUT    (2 * CONFIG_SYS_HZ) /* Erase Timeout */
+#define CONFIG_SYS_FLASH_WRITE_TOUT    (2 * CONFIG_SYS_HZ) /* Write Timeout */
+
+/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
+#define CONFIG_SYS_MAX_FLASH_SECT      259             /* Max sectors */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
+#define CONFIG_SYS_FLASH_PROTECTION    /* The devices have real protection */
+#define CONFIG_SYS_FLASH_EMPTY_INFO    /* flinfo indicates empty blocks */
+
+#endif
+
 #endif /* __VEXPRESS_AEMV8A_H */