X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-omap4%2Fomap.h;h=d43dc265cd68f952897d07b39fbf691fbe281fdf;hp=9fd00ff2aa431502eb92608fb3706047063758fe;hb=e4426d07b6075bd7701f8e92280a85843c2502b6;hpb=41341221d12341a2ecfb280142d6478071738fc2 diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h index 9fd00ff2aa..d43dc265cd 100644 --- a/arch/arm/include/asm/arch-omap4/omap.h +++ b/arch/arm/include/asm/arch-omap4/omap.h @@ -9,23 +9,7 @@ * Richard Woodruff * Syed Mohammed Khasim * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _OMAP4_H_ @@ -49,6 +33,10 @@ /* CONTROL_ID_CODE */ #define CONTROL_ID_CODE 0x4A002204 +#define STD_FUSE_DIE_ID_0 0x4A002200 +#define STD_FUSE_DIE_ID_1 0x4A002208 +#define STD_FUSE_DIE_ID_2 0x4A00220c +#define STD_FUSE_DIE_ID_3 0x4A002210 #define OMAP4_CONTROL_ID_CODE_ES1_0 0x0B85202F #define OMAP4_CONTROL_ID_CODE_ES2_0 0x1B85202F @@ -57,6 +45,7 @@ #define OMAP4_CONTROL_ID_CODE_ES2_3 0x6B95C02F #define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F #define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F +#define OMAP4470_CONTROL_ID_CODE_ES1_0 0x0B97502F /* UART */ #define UART1_BASE (OMAP44XX_L4_PER_BASE + 0x6a000) @@ -71,9 +60,6 @@ /* Watchdog Timer2 - MPU watchdog */ #define WDT2_BASE (OMAP44XX_L4_WKUP_BASE + 0x14000) -/* GPMC */ -#define OMAP44XX_GPMC_BASE 0x50000000 - /* * Hardware Register Details */ @@ -127,7 +113,7 @@ struct s32ktimer { */ #define NON_SECURE_SRAM_START 0x40304000 #define NON_SECURE_SRAM_END 0x4030E000 /* Not inclusive */ -#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START +#define SRAM_SCRATCH_SPACE_ADDR 0x4030C000 /* base address for indirect vectors (internal boot mode) */ #define SRAM_ROM_VECT_BASE 0x4030D000