X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=board%2Fkaro%2Ftx28%2Fspl_boot.c;h=41367c2cab4cb6133a29752ae188f8dc58458ca8;hp=e0541dffe922c28ee1b63c1189216d1b1cd7c0cd;hb=1c9fe7ab6b3bf86cf99c96f7d212cdc45fb9d11a;hpb=d8f77f7d11b85fe9b45308abb105c13ede0c613b

diff --git a/board/karo/tx28/spl_boot.c b/board/karo/tx28/spl_boot.c
index e0541dffe9..41367c2cab 100644
--- a/board/karo/tx28/spl_boot.c
+++ b/board/karo/tx28/spl_boot.c
@@ -219,15 +219,16 @@ static void tx28_stk5_led_on(void)
 	gpio_direction_output(MX28_PAD_ENET0_RXD3__GPIO_4_10, 1);
 }
 
-void board_init_ll(void)
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
 {
-	mx28_common_spl_init(tx28_stk5_pads, ARRAY_SIZE(tx28_stk5_pads));
+	mxs_common_spl_init(arg, resptr,
+			tx28_stk5_pads, ARRAY_SIZE(tx28_stk5_pads));
 	tx28_stk5_lcd_init();
 	tx28_stk5_led_on();
 }
 
-#ifndef CONFIG_TX28_S
 static uint32_t tx28_dram_vals[] = {
+#ifdef CONFIG_TX28_S
 	/* TX28-41x0: NT5TU32M16DG-AC */
 	/* 000 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	/* 010 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -235,8 +236,8 @@ static uint32_t tx28_dram_vals[] = {
 	/* 030 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	/* 040 */ 0x00000000, 0x00000100, 0x00000000, 0x00000000,
 	/* 050 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	/* 060 */ 0x00000000, 0x00000000, 0x00010101, 0x01010101,
-	/* 070 */ 0x000f0f01, 0x0102020a, 0x00000000, 0x00010101,
+	/* 060 */ 0x00000000, 0x00000000, 0x00010101, 0x00010101,
+	/* 070 */ 0x000f0f01, 0x0102010a, 0x00000000, 0x00000101,
 	/* 080 */ 0x00000100, 0x00000100, 0x00000000, 0x00000002,
 	/* 090 */ 0x01010000, 0x07080403, 0x06005003, 0x0a0000c8,
 	/* 0a0 */ 0x02009c40, 0x0002030c, 0x0036a609, 0x031a0612,
@@ -277,9 +278,7 @@ static uint32_t tx28_dram_vals[] = {
 	/* 2d0 */ 0x06120612, 0x04420442, 0x04420442, 0x00040004,
 	/* 2e0 */ 0x00040004, 0x00000000, 0x00000000, 0x00000000,
 	/* 2f0 */ 0x00000000, 0x00000000,
-};
-#else
-static uint32_t tx28_dram_vals[] = {
+#elif CONFIG_SYS_SDRAM_SIZE == SZ_128M
 	/* TX28-40x0: MT47H64M16HR-3 */
 	/* 000 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	/* 010 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -287,8 +286,8 @@ static uint32_t tx28_dram_vals[] = {
 	/* 030 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	/* 040 */ 0x00000000, 0x00000100, 0x00000000, 0x00000000,
 	/* 050 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	/* 060 */ 0x00000000, 0x00000000, 0x00010101, 0x00010101,
-	/* 070 */ 0x000f0f01, 0x0102010a, 0x00000000, 0x00000101,
+	/* 060 */ 0x00000000, 0x00000000, 0x00010101, 0x01010101,
+	/* 070 */ 0x000f0f01, 0x0102020a, 0x00000000, 0x00010101,
 	/* 080 */ 0x00000100, 0x00000100, 0x00000000, 0x00000002,
 	/* 090 */ 0x01010000, 0x07080403, 0x06005003, 0x0a0000c8,
 	/* 0a0 */ 0x02009c40, 0x0002030c, 0x0036a609, 0x031a0612,
@@ -329,13 +328,62 @@ static uint32_t tx28_dram_vals[] = {
 	/* 2d0 */ 0x06120612, 0x04420442, 0x04420442, 0x00040004,
 	/* 2e0 */ 0x00040004, 0x00000000, 0x00000000, 0x00000000,
 	/* 2f0 */ 0x00000000, 0x00000000,
-};
+#elif CONFIG_SYS_SDRAM_SIZE == SZ_256M
+	/* TX28-40x2: MEM2G16D2DABG */
+	/* 000 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 010 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 020 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 030 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 040 */ 0x00000000, 0x00000100, 0x00000000, 0x00000000,
+	/* 050 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 060 */ 0x00000000, 0x00000000, 0x00010101, 0x01010101,
+	/* 070 */ 0x000f0f01, 0x0102010a, 0x00000000, 0x00010101,
+	/* 080 */ 0x00000100, 0x00000100, 0x00000000, 0x00000002,
+	/* 090 */ 0x01010000, 0x07080603, 0x07005003, 0x0a0000c8,
+	/* 0a0 */ 0x02009c40, 0x0002030c, 0x00380e09, 0x0328063f,
+	/* 0b0 */ 0x02030202, 0x00c8001c, 0x00000000, 0x00000000,
+	/* 0c0 */ 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
+	/* 0d0 */ 0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
+	/* 0e0 */ 0x00000003, 0x00000000, 0x00000000, 0x00000000,
+	/* 0f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 100 */ 0x00000000, 0x00000000, 0x00000612, 0x01000102,
+	/* 110 */ 0x06120612, 0x00000200, 0x00020007, 0xf4002714,
+	/* 120 */ 0xf4002714, 0xf4002714, 0xf4002714, 0x07400300,
+	/* 130 */ 0x07400300, 0x07400300, 0x07400300, 0x00000005,
+	/* 140 */ 0x00000000, 0x00000000, 0x01000000, 0x01020408,
+	/* 150 */ 0x08040201, 0x000f1133, 0x00000000, 0x00001f04,
+	/* 160 */ 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04,
+	/* 170 */ 0x00001f04, 0x00001f04, 0x00001f04, 0x00000000,
+	/* 180 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 190 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 1a0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 1b0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 1c0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 1d0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 1e0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 1f0 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 200 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 210 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 220 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 230 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 240 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 250 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 260 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 270 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	/* 280 */ 0x00000000, 0x00000000, 0x00010000, 0x00030404,
+	/* 290 */ 0x00000003, 0x00000000, 0x00000000, 0x00000000,
+	/* 2a0 */ 0x00000000, 0x00000000, 0x00000000, 0x01010000,
+	/* 2b0 */ 0x01000000, 0x03030000, 0x00010303, 0x01020202,
+	/* 2c0 */ 0x00000000, 0x02040303, 0x21002103, 0x00061200,
+	/* 2d0 */ 0x06120612, 0x04420442, 0x04420442, 0x00040004,
+	/* 2e0 */ 0x00040004, 0x00000000, 0x00000000, 0x00000000,
+	/* 2f0 */ 0x00000000, 0x00000000,
+#else
+#error No SDRAM configuration available
 #endif
+};
 
-void mx28_ddr2_setup(void)
+void mxs_adjust_memory_params(uint32_t *dram_vals)
 {
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(tx28_dram_vals); i++)
-		writel(tx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
+	memcpy(dram_vals, tx28_dram_vals, sizeof(tx28_dram_vals));
 }