X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=board%2Fkaro%2Ftx6%2Flowlevel_init.S;h=a345304697f3d2e324f2c6a5110c8b228039aea8;hp=ffdc5e05ced1967f74a59d4929d53c633f9d4afd;hb=d6b81b60d041495fe2d83003e7466a85d91a26cb;hpb=0a58072f2c7f304e9cb3914425eb2af8fe597ab9

diff --git a/board/karo/tx6/lowlevel_init.S b/board/karo/tx6/lowlevel_init.S
index ffdc5e05ce..a345304697 100644
--- a/board/karo/tx6/lowlevel_init.S
+++ b/board/karo/tx6/lowlevel_init.S
@@ -351,6 +351,7 @@ ivt_end:
 #define DDR_SEL_VAL	3
 #define DSE_VAL		6
 #define ODT_VAL		2
+#define DDR_PKE_VAL	0
 
 #define DDR_SEL_SHIFT	18
 #define DDR_MODE_SHIFT	17
@@ -365,6 +366,7 @@ ivt_end:
 #define DDR_MODE_MASK	(1 << DDR_MODE_SHIFT)
 #define DSE_MASK	(DSE_VAL << DSE_SHIFT)
 #define ODT_MASK	(ODT_VAL << ODT_SHIFT)
+#define DDR_PKE_MASK	(DDR_PKE_VAL << PKE_SHIFT)
 
 #define DQM_MASK	(DDR_MODE_MASK | DSE_MASK)
 #define SDQS_MASK	DSE_MASK
@@ -752,7 +754,7 @@ dcd_hdr:
 	/* DDRMODE_CTL */
 	MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL, DDR_MODE_MASK)
 	/* DDRPKE */
-	MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_GRP_DDRPKE, 0x00000000)
+	MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_GRP_DDRPKE, DDR_PKE_MASK)
 	/* DDRMODE */
 	MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_GRP_DDRMODE, DDR_MODE_MASK)
 	/* CTLDS */