X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=board%2Fti%2Fbeagle%2Fbeagle.c;h=b829a792b2c49b06e04508ce3b2bf9b4f3eb225a;hp=e26b38793474bf073c455d472eabf26c22a67c9f;hb=612404c28a64a6df300642a1550a65dcc8e01f82;hpb=db39f24151627733d6166c5e9a875fe8b356fa72 diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index e26b387934..b829a792b2 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -42,6 +42,11 @@ #include #include #include +#include +#include +#include +#include +#include #include "beagle.h" #include @@ -50,8 +55,6 @@ #include #endif -#define pr_debug(fmt, args...) debug(fmt, ##args) - #define TWL4030_I2C_BUS 0 #define EXPANSION_EEPROM_I2C_BUS 1 #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 @@ -68,6 +71,7 @@ #define BBTOYS_VGA 0x02000B00 #define BBTOYS_LCD 0x03000B00 #define BCT_BRETTL3 0x01000F00 +#define BCT_BRETTL4 0x02000F00 #define BEAGLE_NO_EEPROM 0xffffffff DECLARE_GLOBAL_DATA_PTR; @@ -111,7 +115,7 @@ int board_init(void) * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 * GPIO173, GPIO172, GPIO171: 0 0 0 => xM */ -int get_board_revision(void) +static int get_board_revision(void) { int revision; @@ -140,8 +144,7 @@ int get_board_revision(void) * Description: If we use SPL then there is no x-loader nor config header * so we have to setup the DDR timings ourself on both banks. */ -void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, - u32 *mr) +void get_board_mem_timings(struct board_sdrc_timings *timings) { int pop_mfr, pop_id; @@ -152,29 +155,29 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, */ identify_nand_chip(&pop_mfr, &pop_id); - *mr = MICRON_V_MR_165; + timings->mr = MICRON_V_MR_165; switch (get_board_revision()) { case REVISION_C4: if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { /* 512MB DDR */ - *mcfg = NUMONYX_V_MCFG_165(512 << 20); - *ctrla = NUMONYX_V_ACTIMA_165; - *ctrlb = NUMONYX_V_ACTIMB_165; - *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); + timings->ctrla = NUMONYX_V_ACTIMA_165; + timings->ctrlb = NUMONYX_V_ACTIMB_165; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ - *mcfg = MICRON_V_MCFG_165(128 << 20); - *ctrla = MICRON_V_ACTIMA_165; - *ctrlb = MICRON_V_ACTIMB_165; - *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + timings->mcfg = MICRON_V_MCFG_165(128 << 20); + timings->ctrla = MICRON_V_ACTIMA_165; + timings->ctrlb = MICRON_V_ACTIMB_165; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { /* Beagleboard Rev C5, 256MB DDR */ - *mcfg = MICRON_V_MCFG_200(256 << 20); - *ctrla = MICRON_V_ACTIMA_200; - *ctrlb = MICRON_V_ACTIMB_200; - *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + timings->mcfg = MICRON_V_MCFG_200(256 << 20); + timings->ctrla = MICRON_V_ACTIMA_200; + timings->ctrlb = MICRON_V_ACTIMB_200; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; break; } case REVISION_XM_A: @@ -182,24 +185,24 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, case REVISION_XM_C: if (pop_mfr == 0) { /* 256MB DDR */ - *mcfg = MICRON_V_MCFG_200(256 << 20); - *ctrla = MICRON_V_ACTIMA_200; - *ctrlb = MICRON_V_ACTIMB_200; - *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; + timings->mcfg = MICRON_V_MCFG_200(256 << 20); + timings->ctrla = MICRON_V_ACTIMA_200; + timings->ctrlb = MICRON_V_ACTIMB_200; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; } else { /* 512MB DDR */ - *mcfg = NUMONYX_V_MCFG_165(512 << 20); - *ctrla = NUMONYX_V_ACTIMA_165; - *ctrlb = NUMONYX_V_ACTIMB_165; - *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); + timings->ctrla = NUMONYX_V_ACTIMA_165; + timings->ctrlb = NUMONYX_V_ACTIMB_165; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; } break; default: /* Assume 128MB and Micron/165MHz timings to be safe */ - *mcfg = MICRON_V_MCFG_165(128 << 20); - *ctrla = MICRON_V_ACTIMA_165; - *ctrlb = MICRON_V_ACTIMB_165; - *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + timings->mcfg = MICRON_V_MCFG_165(128 << 20); + timings->ctrla = MICRON_V_ACTIMA_165; + timings->ctrlb = MICRON_V_ACTIMB_165; + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; } } #endif @@ -210,7 +213,7 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, * bus 1 for the availability of an AT24C01B serial EEPROM. * returns the device_vendor field from the EEPROM */ -unsigned int get_expansion_id(void) +static unsigned int get_expansion_id(void) { i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); @@ -229,11 +232,12 @@ unsigned int get_expansion_id(void) return expansion_config.device_vendor; } +#ifdef CONFIG_VIDEO_OMAP3 /* * Configure DSS to display background color on DVID * Configure VENC to display color bar on S-Video */ -void beagle_display_init(void) +static void beagle_display_init(void) { omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH); switch (get_board_revision()) { @@ -283,6 +287,34 @@ static void beagle_dvi_pup(void) break; } } +#endif + +#ifdef CONFIG_USB_MUSB_OMAP2PLUS +static struct musb_hdrc_config musb_config = { + .multipoint = 1, + .dyn_fifo = 1, + .num_eps = 16, + .ram_bits = 12, +}; + +static struct omap_musb_board_data musb_board_data = { + .interface_type = MUSB_INTERFACE_ULPI, +}; + +static struct musb_hdrc_platform_data musb_plat = { +#if defined(CONFIG_MUSB_HOST) + .mode = MUSB_HOST, +#elif defined(CONFIG_MUSB_GADGET) + .mode = MUSB_PERIPHERAL, +#else +#error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET" +#endif + .config = &musb_config, + .power = 100, + .platform_ops = &omap2430_ops, + .board_data = &musb_board_data, +}; +#endif /* * Routine: misc_init_r @@ -417,8 +449,11 @@ int misc_init_r(void) printf("Recognized BeagleBoardToys LCD board\n"); break;; case BCT_BRETTL3: - printf("Recognized bct electronic GmbH brettl3 board\n"); - break; + printf("Recognized bct electronic GmbH brettl3 board\n"); + break; + case BCT_BRETTL4: + printf("Recognized bct electronic GmbH brettl4 board\n"); + break; case BEAGLE_NO_EEPROM: printf("No EEPROM on expansion board\n"); setenv("buddy", "none"); @@ -456,9 +491,15 @@ int misc_init_r(void) dieid_num_r(); +#ifdef CONFIG_VIDEO_OMAP3 beagle_dvi_pup(); beagle_display_init(); omap3_dss_enable(); +#endif + +#ifdef CONFIG_USB_MUSB_OMAP2PLUS + musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); +#endif return 0; } @@ -477,12 +518,12 @@ void set_muxconf_regs(void) #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { - omap_mmc_init(0); + omap_mmc_init(0, 0, 0); return 0; } #endif -#ifdef CONFIG_USB_EHCI +#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD) /* Call usb_stop() before starting the kernel */ void show_boot_progress(int val) { @@ -496,14 +537,21 @@ static struct omap_usbhs_board_data usbhs_bdata = { .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED }; -int ehci_hcd_init(void) +int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { - return omap_ehci_hcd_init(&usbhs_bdata); + return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor); } -int ehci_hcd_stop(void) +int ehci_hcd_stop(int index) { return omap_ehci_hcd_stop(); } #endif /* CONFIG_USB_EHCI */ + +#if defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET) +int board_eth_init(bd_t *bis) +{ + return usb_eth_initialize(bis); +} +#endif