X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=drivers%2Fgpio%2Fmxs_gpio.c;h=a84123705b8cc5ee7377faa05bb8e1593cc185d2;hp=0365812c0a61b896db510d2c4c1f7814e21dccbf;hb=fc8d7263cad464c80ba23fac6bc8abe4b6e37a39;hpb=670c24f6f32c8320cbb950e19e75fa8cdc8af88c

diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index 0365812c0a..a84123705b 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -4,33 +4,18 @@
  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  * on behalf of DENX Software Engineering GmbH
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
 #include <netdev.h>
 #include <asm/errno.h>
 #include <asm/io.h>
+#include <asm/gpio.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/imx-regs.h>
 
-#if	defined(CONFIG_MX23)
+#if	defined(CONFIG_SOC_MX23)
 #define	PINCTRL_BANKS		3
 #define	PINCTRL_DOUT(n)		(0x0500 + ((n) * 0x10))
 #define	PINCTRL_DIN(n)		(0x0600 + ((n) * 0x10))
@@ -38,7 +23,7 @@
 #define	PINCTRL_PIN2IRQ(n)	(0x0800 + ((n) * 0x10))
 #define	PINCTRL_IRQEN(n)	(0x0900 + ((n) * 0x10))
 #define	PINCTRL_IRQSTAT(n)	(0x0c00 + ((n) * 0x10))
-#elif	defined(CONFIG_MX28)
+#elif	defined(CONFIG_SOC_MX28)
 #define	PINCTRL_BANKS		5
 #define	PINCTRL_DOUT(n)		(0x0700 + ((n) * 0x10))
 #define	PINCTRL_DIN(n)		(0x0900 + ((n) * 0x10))
@@ -47,16 +32,9 @@
 #define	PINCTRL_IRQEN(n)	(0x1100 + ((n) * 0x10))
 #define	PINCTRL_IRQSTAT(n)	(0x1400 + ((n) * 0x10))
 #else
-#error "Please select CONFIG_MX23 or CONFIG_MX28"
+#error "Please select CONFIG_SOC_MX23 or CONFIG_SOC_MX28"
 #endif
 
-#define GPIO_INT_FALL_EDGE	0x0
-#define GPIO_INT_LOW_LEV	0x1
-#define GPIO_INT_RISE_EDGE	0x2
-#define GPIO_INT_HIGH_LEV	0x3
-#define GPIO_INT_LEV_MASK	(1 << 0)
-#define GPIO_INT_POL_MASK	(1 << 1)
-
 void mxs_gpio_init(void)
 {
 	int i;
@@ -73,31 +51,33 @@ int gpio_get_value(unsigned gpio)
 {
 	uint32_t bank = PAD_BANK(gpio);
 	uint32_t offset = PINCTRL_DIN(bank);
-	struct mx28_register *reg =
-		(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+	struct mxs_register_32 *reg =
+		(struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
 
 	return (readl(&reg->reg) >> PAD_PIN(gpio)) & 1;
 }
 
-void gpio_set_value(unsigned gpio, int value)
+int gpio_set_value(unsigned gpio, int value)
 {
 	uint32_t bank = PAD_BANK(gpio);
 	uint32_t offset = PINCTRL_DOUT(bank);
-	struct mx28_register *reg =
-		(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+	struct mxs_register_32 *reg =
+		(struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
 
 	if (value)
 		writel(1 << PAD_PIN(gpio), &reg->reg_set);
 	else
 		writel(1 << PAD_PIN(gpio), &reg->reg_clr);
+
+	return 0;
 }
 
 int gpio_direction_input(unsigned gpio)
 {
 	uint32_t bank = PAD_BANK(gpio);
 	uint32_t offset = PINCTRL_DOE(bank);
-	struct mx28_register *reg =
-		(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
+	struct mxs_register_32 *reg =
+		(struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
 
 	writel(1 << PAD_PIN(gpio), &reg->reg_clr);
 
@@ -108,13 +88,13 @@ int gpio_direction_output(unsigned gpio, int value)
 {
 	uint32_t bank = PAD_BANK(gpio);
 	uint32_t offset = PINCTRL_DOE(bank);
-	struct mx28_register *reg =
-		(struct mx28_register *)(MXS_PINCTRL_BASE + offset);
-
-	writel(1 << PAD_PIN(gpio), &reg->reg_set);
+	struct mxs_register_32 *reg =
+		(struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
 
 	gpio_set_value(gpio, value);
 
+	writel(1 << PAD_PIN(gpio), &reg->reg_set);
+
 	return 0;
 }