X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=drivers%2Fmmc%2Fomap_hsmmc.c;h=67d6b6862554c8150aea1b3c3786a58e5b0c424a;hp=6f2280abff91af577644e0249a175702d477524e;hb=778c3cbd857f4abe54773f399204dd86ffe6516c;hpb=ac8983bcba75576c50307b5e8dc8fb848740ee61 diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 6f2280abff..67d6b68625 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -28,26 +28,126 @@ #include #include #include +#include +#include +#include #include #include +#include + +/* common definitions for all OMAPs */ +#define SYSCTL_SRC (1 << 25) +#define SYSCTL_SRD (1 << 26) + +struct omap_hsmmc_data { + struct hsmmc *base_addr; + int cd_gpio; + int wp_gpio; +}; /* If we fail after 1 second wait, something is really bad */ #define MAX_RETRY_MS 1000 -static int mmc_read_data(hsmmc_t *mmc_base, char *buf, unsigned int size); -static int mmc_write_data(hsmmc_t *mmc_base, const char *buf, unsigned int siz); -static struct mmc hsmmc_dev[2]; -unsigned char mmc_board_init(hsmmc_t *mmc_base) +static int mmc_read_data(struct hsmmc *mmc_base, char *buf, unsigned int size); +static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, + unsigned int siz); +static struct mmc hsmmc_dev[3]; +static struct omap_hsmmc_data hsmmc_dev_data[3]; + +#if (defined(CONFIG_OMAP_GPIO) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_GPIO_SUPPORT)) +static int omap_mmc_setup_gpio_in(int gpio, const char *label) { -#if defined(CONFIG_TWL4030_POWER) - twl4030_power_mmc_init(); + if (!gpio_is_valid(gpio)) + return -1; + + if (gpio_request(gpio, label) < 0) + return -1; + + if (gpio_direction_input(gpio) < 0) + return -1; + + return gpio; +} + +static int omap_mmc_getcd(struct mmc *mmc) +{ + int cd_gpio = ((struct omap_hsmmc_data *)mmc->priv)->cd_gpio; + return gpio_get_value(cd_gpio); +} + +static int omap_mmc_getwp(struct mmc *mmc) +{ + int wp_gpio = ((struct omap_hsmmc_data *)mmc->priv)->wp_gpio; + return gpio_get_value(wp_gpio); +} +#else +static inline int omap_mmc_setup_gpio_in(int gpio, const char *label) +{ + return -1; +} + +#define omap_mmc_getcd NULL +#define omap_mmc_getwp NULL +#endif + +#if defined(CONFIG_OMAP44XX) && defined(CONFIG_TWL6030_POWER) +static void omap4_vmmc_pbias_config(struct mmc *mmc) +{ + u32 value = 0; + + value = readl((*ctrl)->control_pbiaslite); + value &= ~(MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ); + writel(value, (*ctrl)->control_pbiaslite); + /* set VMMC to 3V */ + twl6030_power_mmc_init(); + value = readl((*ctrl)->control_pbiaslite); + value |= MMC1_PBIASLITE_VMODE | MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ; + writel(value, (*ctrl)->control_pbiaslite); +} +#endif + +#if defined(CONFIG_OMAP54XX) && defined(CONFIG_PALMAS_POWER) +static void omap5_pbias_config(struct mmc *mmc) +{ + u32 value = 0; + + value = readl((*ctrl)->control_pbias); + value &= ~SDCARD_PWRDNZ; + writel(value, (*ctrl)->control_pbias); + udelay(10); /* wait 10 us */ + value &= ~SDCARD_BIAS_PWRDNZ; + writel(value, (*ctrl)->control_pbias); + + palmas_mmc1_poweron_ldo(); + + value = readl((*ctrl)->control_pbias); + value |= SDCARD_BIAS_PWRDNZ; + writel(value, (*ctrl)->control_pbias); + udelay(150); /* wait 150 us */ + value |= SDCARD_PWRDNZ; + writel(value, (*ctrl)->control_pbias); + udelay(150); /* wait 150 us */ +} #endif +unsigned char mmc_board_init(struct mmc *mmc) +{ #if defined(CONFIG_OMAP34XX) t2_t *t2_base = (t2_t *)T2_BASE; struct prcm *prcm_base = (struct prcm *)PRCM_BASE; + u32 pbias_lite; - writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | + pbias_lite = readl(&t2_base->pbias_lite); + pbias_lite &= ~(PBIASLITEPWRDNZ1 | PBIASLITEPWRDNZ0); + writel(pbias_lite, &t2_base->pbias_lite); +#endif +#if defined(CONFIG_TWL4030_POWER) + twl4030_power_mmc_init(); + mdelay(100); /* ramp-up delay from Linux code */ +#endif +#if defined(CONFIG_OMAP34XX) + writel(pbias_lite | PBIASLITEPWRDNZ1 | PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, &t2_base->pbias_lite); @@ -57,6 +157,11 @@ unsigned char mmc_board_init(hsmmc_t *mmc_base) writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL, &t2_base->devconf1); + /* Change from default of 52MHz to 26MHz if necessary */ + if (!(mmc->host_caps & MMC_MODE_HS_52MHz)) + writel(readl(&t2_base->ctl_prog_io1) & ~CTLPROGIO1SPEEDCTRL, + &t2_base->ctl_prog_io1); + writel(readl(&prcm_base->fclken1_core) | EN_MMC1 | EN_MMC2 | EN_MMC3, &prcm_base->fclken1_core); @@ -66,12 +171,20 @@ unsigned char mmc_board_init(hsmmc_t *mmc_base) &prcm_base->iclken1_core); #endif -/* TODO add appropriate OMAP4 init - none currently necessary */ +#if defined(CONFIG_OMAP44XX) && defined(CONFIG_TWL6030_POWER) + /* PBIAS config needed for MMC1 only */ + if (mmc->block_dev.dev == 0) + omap4_vmmc_pbias_config(mmc); +#endif +#if defined(CONFIG_OMAP54XX) && defined(CONFIG_PALMAS_POWER) + if (mmc->block_dev.dev == 0) + omap5_pbias_config(mmc); +#endif return 0; } -void mmc_init_stream(hsmmc_t *mmc_base) +void mmc_init_stream(struct hsmmc *mmc_base) { ulong start; @@ -80,8 +193,8 @@ void mmc_init_stream(hsmmc_t *mmc_base) writel(MMC_CMD0, &mmc_base->cmd); start = get_timer(0); while (!(readl(&mmc_base->stat) & CC_MASK)) { - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for cc!\n", __func__); + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting for cc!\n", __func__); return; } } @@ -91,8 +204,8 @@ void mmc_init_stream(hsmmc_t *mmc_base) ; start = get_timer(0); while (!(readl(&mmc_base->stat) & CC_MASK)) { - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for cc2!\n", __func__); + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting for cc2!\n", __func__); return; } } @@ -102,27 +215,28 @@ void mmc_init_stream(hsmmc_t *mmc_base) static int mmc_init_setup(struct mmc *mmc) { - hsmmc_t *mmc_base = (hsmmc_t *)mmc->priv; + struct omap_hsmmc_data *priv_data = mmc->priv; + struct hsmmc *mmc_base = priv_data->base_addr; unsigned int reg_val; unsigned int dsor; ulong start; - mmc_board_init(mmc_base); + mmc_board_init(mmc); writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET, &mmc_base->sysconfig); start = get_timer(0); while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0) { - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for cc2!\n", __func__); + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting for cc2!\n", __func__); return TIMEOUT; } } writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl); start = get_timer(0); while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0) { - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for softresetall!\n", + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting for softresetall!\n", __func__); return TIMEOUT; } @@ -144,8 +258,8 @@ static int mmc_init_setup(struct mmc *mmc) (dsor << CLKD_OFFSET) | ICE_OSCILLATE); start = get_timer(0); while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) { - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for ics!\n", __func__); + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting for ics!\n", __func__); return TIMEOUT; } } @@ -162,26 +276,49 @@ static int mmc_init_setup(struct mmc *mmc) return 0; } +/* + * MMC controller internal finite state machine reset + * + * Used to reset command or data internal state machines, using respectively + * SRC or SRD bit of SYSCTL register + */ +static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit) +{ + ulong start; + + mmc_reg_out(&mmc_base->sysctl, bit, bit); + + start = get_timer(0); + while ((readl(&mmc_base->sysctl) & bit) != 0) { + if (get_timer(0) - start > MAX_RETRY_MS) { + printf("%s: timedout waiting for sysctl %x to clear\n", + __func__, bit); + return; + } + } +} static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) { - hsmmc_t *mmc_base = (hsmmc_t *)mmc->priv; + struct omap_hsmmc_data *priv_data = mmc->priv; + struct hsmmc *mmc_base = priv_data->base_addr; unsigned int flags, mmc_stat; ulong start; start = get_timer(0); - while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS) { - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for cmddis!\n", __func__); + while ((readl(&mmc_base->pstate) & (DATI_MASK | CMDI_MASK)) != 0) { + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting on cmd inhibit to clear\n", + __func__); return TIMEOUT; } } writel(0xFFFFFFFF, &mmc_base->stat); start = get_timer(0); while (readl(&mmc_base->stat)) { - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for stat!\n", __func__); + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting for stat!\n", __func__); return TIMEOUT; } } @@ -243,15 +380,16 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, start = get_timer(0); do { mmc_stat = readl(&mmc_base->stat); - if (get_timer(0) - start > MAX_RETRY_MS) { + if (get_timer(start) > MAX_RETRY_MS) { printf("%s : timeout: No status update\n", __func__); return TIMEOUT; } } while (!mmc_stat); - if ((mmc_stat & IE_CTO) != 0) + if ((mmc_stat & IE_CTO) != 0) { + mmc_reset_controller_fsm(mmc_base, SYSCTL_SRC); return TIMEOUT; - else if ((mmc_stat & ERRI_MASK) != 0) + } else if ((mmc_stat & ERRI_MASK) != 0) return -1; if (mmc_stat & CC_MASK) { @@ -279,7 +417,7 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, return 0; } -static int mmc_read_data(hsmmc_t *mmc_base, char *buf, unsigned int size) +static int mmc_read_data(struct hsmmc *mmc_base, char *buf, unsigned int size) { unsigned int *output_buf = (unsigned int *)buf; unsigned int mmc_stat; @@ -295,13 +433,16 @@ static int mmc_read_data(hsmmc_t *mmc_base, char *buf, unsigned int size) ulong start = get_timer(0); do { mmc_stat = readl(&mmc_base->stat); - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for status!\n", + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting for status!\n", __func__); return TIMEOUT; } } while (mmc_stat == 0); + if ((mmc_stat & (IE_DTO | IE_DCRC | IE_DEB)) != 0) + mmc_reset_controller_fsm(mmc_base, SYSCTL_SRD); + if ((mmc_stat & ERRI_MASK) != 0) return 1; @@ -330,7 +471,8 @@ static int mmc_read_data(hsmmc_t *mmc_base, char *buf, unsigned int size) return 0; } -static int mmc_write_data(hsmmc_t *mmc_base, const char *buf, unsigned int size) +static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, + unsigned int size) { unsigned int *input_buf = (unsigned int *)buf; unsigned int mmc_stat; @@ -346,13 +488,16 @@ static int mmc_write_data(hsmmc_t *mmc_base, const char *buf, unsigned int size) ulong start = get_timer(0); do { mmc_stat = readl(&mmc_base->stat); - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for status!\n", + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting for status!\n", __func__); return TIMEOUT; } } while (mmc_stat == 0); + if ((mmc_stat & (IE_DTO | IE_DCRC | IE_DEB)) != 0) + mmc_reset_controller_fsm(mmc_base, SYSCTL_SRD); + if ((mmc_stat & ERRI_MASK) != 0) return 1; @@ -383,7 +528,8 @@ static int mmc_write_data(hsmmc_t *mmc_base, const char *buf, unsigned int size) static void mmc_set_ios(struct mmc *mmc) { - hsmmc_t *mmc_base = (hsmmc_t *)mmc->priv; + struct omap_hsmmc_data *priv_data = mmc->priv; + struct hsmmc *mmc_base = priv_data->base_addr; unsigned int dsor = 0; ulong start; @@ -426,44 +572,79 @@ static void mmc_set_ios(struct mmc *mmc) start = get_timer(0); while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) { - if (get_timer(0) - start > MAX_RETRY_MS) { - printf("%s: timedout waiting for ics!\n", __func__); + if (get_timer(start) > MAX_RETRY_MS) { + printf("%s: timeout waiting for ics!\n", __func__); return; } } writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); } -int omap_mmc_init(int dev_index) +int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, + int wp_gpio) { - struct mmc *mmc; - - mmc = &hsmmc_dev[dev_index]; + struct mmc *mmc = &hsmmc_dev[dev_index]; + struct omap_hsmmc_data *priv_data = &hsmmc_dev_data[dev_index]; sprintf(mmc->name, "OMAP SD/MMC"); mmc->send_cmd = mmc_send_cmd; mmc->set_ios = mmc_set_ios; mmc->init = mmc_init_setup; + mmc->priv = priv_data; switch (dev_index) { case 0: - mmc->priv = (hsmmc_t *)OMAP_HSMMC1_BASE; + priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; break; +#ifdef OMAP_HSMMC2_BASE case 1: - mmc->priv = (hsmmc_t *)OMAP_HSMMC2_BASE; + priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE; break; +#endif +#ifdef OMAP_HSMMC3_BASE case 2: - mmc->priv = (hsmmc_t *)OMAP_HSMMC3_BASE; + priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE; break; +#endif default: - mmc->priv = (hsmmc_t *)OMAP_HSMMC1_BASE; + priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; return 1; } + priv_data->cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, "mmc_cd"); + if (priv_data->cd_gpio != -1) + mmc->getcd = omap_mmc_getcd; + + priv_data->wp_gpio = omap_mmc_setup_gpio_in(wp_gpio, "mmc_wp"); + if (priv_data->wp_gpio != -1) + mmc->getwp = omap_mmc_getwp; + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS; + mmc->host_caps = (MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS | + MMC_MODE_HC) & ~host_caps_mask; mmc->f_min = 400000; - mmc->f_max = 52000000; + + if (f_max != 0) + mmc->f_max = f_max; + else { + if (mmc->host_caps & MMC_MODE_HS) { + if (mmc->host_caps & MMC_MODE_HS_52MHz) + mmc->f_max = 52000000; + else + mmc->f_max = 26000000; + } else + mmc->f_max = 20000000; + } + + mmc->b_max = 0; + +#if defined(CONFIG_OMAP34XX) + /* + * Silicon revs 2.1 and older do not support multiblock transfers. + */ + if ((get_cpu_family() == CPU_OMAP34XX) && (get_cpu_rev() <= CPU_3XX_ES21)) + mmc->b_max = 1; +#endif mmc_register(mmc);