X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=include%2Fcommproc.h;h=29a3e61e80303db9e66b5b2c9e3e8868e5ef520e;hp=32a3e1c82a84bbdf59e20720fed94ff889090b89;hb=e7f9350525d73233d4eaf1793f8fe618e9fd4910;hpb=351080e2e8f633dfecd957c14bd06e55100d6a7f

diff --git a/include/commproc.h b/include/commproc.h
index 32a3e1c82a..29a3e61e80 100644
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -12,15 +12,10 @@
  * CPM capabilities.  I (or someone else) will add definitions as they
  * are needed.  -- Dan
  *
- * On the MBX board, EPPC-Bug loads CPM microcode into the first 512
- * bytes of the DP RAM and relocates the I2C parameter area to the
- * IDMA1 space.  The remaining DP RAM is available for buffer descriptors
- * or other use.
  */
 #ifndef __CPM_8XX__
 #define __CPM_8XX__
 
-#include <linux/config.h>
 #include <asm/8xx_immap.h>
 
 /* CPM Command register.
@@ -62,7 +57,7 @@
  * as data ram for buffer descriptors, which is all we use right now.
  * Currently the first 512 and last 256 bytes are used for microcode.
  */
-#ifdef  CFG_ALLOC_DPRAM
+#ifdef  CONFIG_SYS_ALLOC_DPRAM
 
 #define CPM_DATAONLY_BASE	((uint)0x0800)
 #define CPM_DATAONLY_SIZE	((uint)0x0700)
@@ -81,16 +76,16 @@
 
 #endif
 
-#ifndef CFG_CPM_POST_WORD_ADDR
+#ifndef CONFIG_SYS_CPM_POST_WORD_ADDR
 #define CPM_POST_WORD_ADDR	0x07FC
 #else
-#define CPM_POST_WORD_ADDR	CFG_CPM_POST_WORD_ADDR
+#define CPM_POST_WORD_ADDR	CONFIG_SYS_CPM_POST_WORD_ADDR
 #endif
 
-#ifndef CFG_CPM_BOOTCOUNT_ADDR
+#ifndef CONFIG_SYS_CPM_BOOTCOUNT_ADDR
 #define CPM_BOOTCOUNT_ADDR	(CPM_POST_WORD_ADDR - 2*sizeof(ulong))
 #else
-#define CPM_BOOTCOUNT_ADDR	CFG_CPM_BOOTCOUNT_ADDR
+#define CPM_BOOTCOUNT_ADDR	CONFIG_SYS_CPM_BOOTCOUNT_ADDR
 #endif
 
 #define BD_IIC_START	((uint) 0x0400) /* <- please use CPM_I2C_BASE !! */
@@ -108,7 +103,7 @@ typedef struct cpm_buf_desc {
 	uint	cbd_bufaddr;	/* Buffer address in host memory */
 } cbd_t;
 
-#define BD_SC_EMPTY	((ushort)0x8000)	/* Recieve is empty */
+#define BD_SC_EMPTY	((ushort)0x8000)	/* Receive is empty */
 #define BD_SC_READY	((ushort)0x8000)	/* Transmit is ready */
 #define BD_SC_WRAP	((ushort)0x2000)	/* Last buffer descriptor */
 #define BD_SC_INTRPT	((ushort)0x1000)	/* Interrupt on change */
@@ -127,6 +122,7 @@ typedef struct cpm_buf_desc {
 */
 #define PROFF_SCC1	((uint)0x0000)
 #define PROFF_IIC	((uint)0x0080)
+#define PROFF_REVNUM	((uint)0x00b0)
 #define PROFF_SCC2	((uint)0x0100)
 #define PROFF_SPI	((uint)0x0180)
 #define PROFF_SCC3	((uint)0x0200)
@@ -135,7 +131,6 @@ typedef struct cpm_buf_desc {
 #define PROFF_SMC2	((uint)0x0380)
 
 /* Define enough so I can at least use the serial port as a UART.
- * The MBX uses SMC1 as the host serial port.
  */
 typedef struct smc_uart {
 	ushort	smc_rbase;	/* Rx Buffer descriptor base address */
@@ -434,71 +429,6 @@ typedef struct scc_enet {
  * #define FEC_ENET to enable the SCC resp. FEC ethernet drivers.
  **********************************************************************/
 
-
-/***  ADS  *************************************************************/
-
-#if defined(CONFIG_MPC860) && defined(CONFIG_ADS)
-/* This ENET stuff is for the MPC860ADS with ethernet on SCC1.
- */
-
-#define	PROFF_ENET	PROFF_SCC1
-#define	CPM_CR_ENET	CPM_CR_CH_SCC1
-#define	SCC_ENET	0
-
-#define PA_ENET_RXD	((ushort)0x0001)
-#define PA_ENET_TXD	((ushort)0x0002)
-#define PA_ENET_TCLK	((ushort)0x0100)
-#define PA_ENET_RCLK	((ushort)0x0200)
-
-#define PB_ENET_TENA	((uint)0x00001000)
-
-#define PC_ENET_CLSN	((ushort)0x0010)
-#define PC_ENET_RENA	((ushort)0x0020)
-
-#define SICR_ENET_MASK	((uint)0x000000ff)
-#define SICR_ENET_CLKRT	((uint)0x0000002c)
-
-/* 68160 PHY control */
-
-#define PC_ENET_ETHLOOP ((ushort)0x0800)
-#define PC_ENET_TPFLDL	((ushort)0x0400)
-#define PC_ENET_TPSQEL  ((ushort)0x0200)
-
-#endif	/* MPC860ADS */
-
-/***  AMX860  **********************************************/
-
-#if defined(CONFIG_AMX860)
-
-/* This ENET stuff is for the AMX860 with ethernet on SCC1.
- */
-
-#define PROFF_ENET	PROFF_SCC1
-#define CPM_CR_ENET	CPM_CR_CH_SCC1
-#define SCC_ENET	0
-
-#define PA_ENET_RXD	((ushort)0x0001)
-#define PA_ENET_TXD	((ushort)0x0002)
-#define PA_ENET_TCLK	((ushort)0x0400)
-#define PA_ENET_RCLK	((ushort)0x0800)
-
-#define PB_ENET_TENA	((uint)0x00001000)
-
-#define PC_ENET_CLSN	((ushort)0x0010)
-#define PC_ENET_RENA	((ushort)0x0020)
-
-#define SICR_ENET_MASK	((uint)0x000000ff)
-#define SICR_ENET_CLKRT	((uint)0x0000003e)
-
-/* 68160 PHY control */
-
-#define PB_ENET_ETHLOOP	((uint)0x00020000)
-#define PB_ENET_TPFLDL	((uint)0x00010000)
-#define PB_ENET_TPSQEL	((uint)0x00008000)
-#define PD_ENET_ETH_EN	((ushort)0x0004)
-
-#endif	/* CONFIG_AMX860 */
-
 /***  BSEIP  **********************************************************/
 
 #ifdef CONFIG_BSEIP
@@ -547,66 +477,6 @@ typedef struct scc_enet {
 #define SICR_ENET_CLKRT	((uint)0x00003400)
 #endif	/* CONFIG_FLAGADM */
 
-/***  C2MON  **********************************************************/
-
-#ifdef CONFIG_C2MON
-
-# ifndef CONFIG_FEC_ENET	/* use SCC for 10Mbps Ethernet	*/
-#  error "Ethernet on SCC not supported on C2MON Board!"
-# else				/* Use FEC for Fast Ethernet */
-
-#undef	SCC_ENET
-#define FEC_ENET
-
-#define PD_MII_TXD1	((ushort)0x1000)	/* PD  3 */
-#define PD_MII_TXD2	((ushort)0x0800)	/* PD  4 */
-#define PD_MII_TXD3	((ushort)0x0400)	/* PD  5 */
-#define PD_MII_RX_DV	((ushort)0x0200)	/* PD  6 */
-#define PD_MII_RX_ERR	((ushort)0x0100)	/* PD  7 */
-#define PD_MII_RX_CLK	((ushort)0x0080)	/* PD  8 */
-#define PD_MII_TXD0	((ushort)0x0040)	/* PD  9 */
-#define PD_MII_RXD0	((ushort)0x0020)	/* PD 10 */
-#define PD_MII_TX_ERR	((ushort)0x0010)	/* PD 11 */
-#define PD_MII_MDC	((ushort)0x0008)	/* PD 12 */
-#define PD_MII_RXD1	((ushort)0x0004)	/* PD 13 */
-#define PD_MII_RXD2	((ushort)0x0002)	/* PD 14 */
-#define PD_MII_RXD3	((ushort)0x0001)	/* PD 15 */
-
-#define PD_MII_MASK	((ushort)0x1FFF)	/* PD 3...15 */
-
-# endif	/* CONFIG_FEC_ENET */
-#endif	/* CONFIG_C2MON */
-
-/*********************************************************************/
-
-
-/***  CCM  and  PCU E  ***********************************************/
-
-/* The PCU E  and  CCM  use the FEC on a MPC860T for Ethernet */
-
-#if defined (CONFIG_PCU_E) || defined(CONFIG_CCM)
-
-#define	FEC_ENET	/* use FEC for EThernet */
-#undef	SCC_ENET
-
-#define PD_MII_TXD1	((ushort)0x1000)	/* PD  3 */
-#define PD_MII_TXD2	((ushort)0x0800)	/* PD  4 */
-#define PD_MII_TXD3	((ushort)0x0400)	/* PD  5 */
-#define PD_MII_RX_DV	((ushort)0x0200)	/* PD  6 */
-#define PD_MII_RX_ERR	((ushort)0x0100)	/* PD  7 */
-#define PD_MII_RX_CLK	((ushort)0x0080)	/* PD  8 */
-#define PD_MII_TXD0	((ushort)0x0040)	/* PD  9 */
-#define PD_MII_RXD0	((ushort)0x0020)	/* PD 10 */
-#define PD_MII_TX_ERR	((ushort)0x0010)	/* PD 11 */
-#define PD_MII_MDC	((ushort)0x0008)	/* PD 12 */
-#define PD_MII_RXD1	((ushort)0x0004)	/* PD 13 */
-#define PD_MII_RXD2	((ushort)0x0002)	/* PD 14 */
-#define PD_MII_RXD3	((ushort)0x0001)	/* PD 15 */
-
-#define PD_MII_MASK	((ushort)0x1FFF)	/* PD 3...15 */
-
-#endif	/* CONFIG_PCU_E, CONFIG_CCM */
-
 /***  ELPT860 *********************************************************/
 
 #ifdef CONFIG_ELPT860
@@ -661,62 +531,6 @@ typedef struct scc_enet {
 
 #endif
 
-/***  FADS823  ********************************************************/
-
-#if defined(CONFIG_MPC823FADS) && defined(CONFIG_FADS)
-/* This ENET stuff is for the MPC823FADS with ethernet on SCC2.
- */
-#ifdef CONFIG_SCC2_ENET
-#define	PROFF_ENET	PROFF_SCC2
-#define	CPM_CR_ENET	CPM_CR_CH_SCC2
-#define	SCC_ENET	1
-#define CPMVEC_ENET	CPMVEC_SCC2
-#endif
-
-#ifdef CONFIG_SCC1_ENET
-#define	PROFF_ENET	PROFF_SCC1
-#define	CPM_CR_ENET	CPM_CR_CH_SCC1
-#define	SCC_ENET	0
-#define CPMVEC_ENET	CPMVEC_SCC1
-#endif
-
-#define PA_ENET_RXD	((ushort)0x0004)
-#define PA_ENET_TXD	((ushort)0x0008)
-#define PA_ENET_TCLK	((ushort)0x0400)
-#define PA_ENET_RCLK	((ushort)0x0200)
-
-#define PB_ENET_TENA	((uint)0x00002000)
-
-#define PC_ENET_CLSN	((ushort)0x0040)
-#define PC_ENET_RENA	((ushort)0x0080)
-
-#define SICR_ENET_MASK	((uint)0x0000ff00)
-#define SICR_ENET_CLKRT	((uint)0x00002e00)
-
-#endif	/* CONFIG_FADS823FADS */
-
-/***  FADS850SAR  ********************************************************/
-
-#if defined(CONFIG_MPC850SAR) && defined(CONFIG_FADS)
-/* This ENET stuff is for the MPC850SAR with ethernet on SCC2.  Some of
- * this may be unique to the FADS850SAR configuration.
- * Note TENA is on Port B.
- */
-#define	PROFF_ENET	PROFF_SCC2
-#define	CPM_CR_ENET	CPM_CR_CH_SCC2
-#define	SCC_ENET	1
-#define PA_ENET_RXD	((ushort)0x0004)	/* PA 13 */
-#define PA_ENET_TXD	((ushort)0x0008)	/* PA 12 */
-#define PA_ENET_RCLK	((ushort)0x0200)	/* PA 6 */
-#define PA_ENET_TCLK	((ushort)0x0800)	/* PA 4 */
-#define PB_ENET_TENA	((uint)0x00002000)	/* PB 18 */
-#define PC_ENET_CLSN	((ushort)0x0040)	/* PC 9 */
-#define PC_ENET_RENA	((ushort)0x0080)	/* PC 8 */
-
-#define SICR_ENET_MASK	((uint)0x0000ff00)
-#define SICR_ENET_CLKRT	((uint)0x00002f00)	/* RCLK-CLK2, TCLK-CLK4 */
-#endif	/* CONFIG_FADS850SAR */
-
 /***  FADS860T********************************************************/
 
 #if defined(CONFIG_FADS) && defined(CONFIG_MPC86x)
@@ -786,80 +600,22 @@ typedef struct scc_enet {
 #undef	SCC_ENET
 #define	FEC_ENET
 
-#define PD_MII_TXD1	((ushort)0x1000)	/* PD  3 	*/
-#define PD_MII_TXD2	((ushort)0x0800)	/* PD  4 	*/
-#define PD_MII_TXD3	((ushort)0x0400)	/* PD  5 	*/
-#define PD_MII_RX_DV	((ushort)0x0200)	/* PD  6 	*/
-#define PD_MII_RX_ERR	((ushort)0x0100)	/* PD  7 	*/
-#define PD_MII_RX_CLK	((ushort)0x0080)	/* PD  8 	*/
-#define PD_MII_TXD0	((ushort)0x0040)	/* PD  9 	*/
-#define PD_MII_RXD0	((ushort)0x0020)	/* PD 10 	*/
-#define PD_MII_TX_ERR	((ushort)0x0010)	/* PD 11 	*/
-#define PD_MII_MDC	((ushort)0x0008)	/* PD 12 	*/
-#define PD_MII_RXD1	((ushort)0x0004)	/* PD 13 	*/
-#define PD_MII_RXD2	((ushort)0x0002)	/* PD 14 	*/
-#define PD_MII_RXD3	((ushort)0x0001)	/* PD 15 	*/
+#define PD_MII_TXD1	((ushort)0x1000)	/* PD  3	*/
+#define PD_MII_TXD2	((ushort)0x0800)	/* PD  4	*/
+#define PD_MII_TXD3	((ushort)0x0400)	/* PD  5	*/
+#define PD_MII_RX_DV	((ushort)0x0200)	/* PD  6	*/
+#define PD_MII_RX_ERR	((ushort)0x0100)	/* PD  7	*/
+#define PD_MII_RX_CLK	((ushort)0x0080)	/* PD  8	*/
+#define PD_MII_TXD0	((ushort)0x0040)	/* PD  9	*/
+#define PD_MII_RXD0	((ushort)0x0020)	/* PD 10	*/
+#define PD_MII_TX_ERR	((ushort)0x0010)	/* PD 11	*/
+#define PD_MII_MDC	((ushort)0x0008)	/* PD 12	*/
+#define PD_MII_RXD1	((ushort)0x0004)	/* PD 13	*/
+#define PD_MII_RXD2	((ushort)0x0002)	/* PD 14	*/
+#define PD_MII_RXD3	((ushort)0x0001)	/* PD 15	*/
 #define PD_MII_MASK	((ushort)0x1FFF)	/* PD 3-15	*/
 #endif	/* CONFIG_GEN860T */
 
-/***  GENIETV  ********************************************************/
-
-#if defined(CONFIG_GENIETV)
-/* Ethernet is only on SCC2 */
-
-#define CONFIG_SCC2_ENET
-#define	PROFF_ENET	PROFF_SCC2
-#define	CPM_CR_ENET	CPM_CR_CH_SCC2
-#define	SCC_ENET	1
-#define CPMVEC_ENET	CPMVEC_SCC2
-
-#define PA_ENET_RXD	((ushort)0x0004)	/* PA 13 */
-#define PA_ENET_TXD	((ushort)0x0008)	/* PA 12 */
-#define PA_ENET_TCLK	((ushort)0x0400)	/* PA  5 */
-#define PA_ENET_RCLK	((ushort)0x0200)	/* PA  6 */
-
-#define PB_ENET_TENA	((uint)0x00002000)	/* PB 18 */
-
-#define PC_ENET_CLSN	((ushort)0x0040)	/* PC  9 */
-#define PC_ENET_RENA	((ushort)0x0080)	/* PC  8 */
-
-#define SICR_ENET_MASK	((uint)0x0000ff00)
-#define SICR_ENET_CLKRT	((uint)0x00002e00)
-
-#endif	/* CONFIG_GENIETV */
-
-/*** GTH ******************************************************/
-
-#ifdef CONFIG_GTH
-#ifdef CONFIG_FEC_ENET
-#define	FEC_ENET	/* use FEC for EThernet */
-#endif	/* CONFIG_FEC_ETHERNET */
-
-/* This ENET stuff is for GTH 10 Mbit ( SCC ) */
-#define	PROFF_ENET	PROFF_SCC1
-#define	CPM_CR_ENET	CPM_CR_CH_SCC1
-#define	SCC_ENET	0
-
-#define PA_ENET_RXD	((ushort)0x0001) /* PA15 */
-#define PA_ENET_TXD	((ushort)0x0002) /* PA14 */
-#define PA_ENET_TCLK	((ushort)0x0800) /* PA4 */
-#define PA_ENET_RCLK	((ushort)0x0400) /* PA5 */
-
-#define PB_ENET_TENA	((uint)0x00001000) /* PB19 */
-
-#define PC_ENET_CLSN	((ushort)0x0010) /* PC11 */
-#define PC_ENET_RENA	((ushort)0x0020) /* PC10 */
-
-/* NOTE. This is reset for 10Mbit port only */
-#define PC_ENET_RESET	((ushort)0x0100)	/* PC 7 */
-
-#define SICR_ENET_MASK	((uint)0x000000ff)
-
-/* TCLK PA4 -->CLK4, RCLK PA5 -->CLK3 */
-#define SICR_ENET_CLKRT	((uint)0x00000037)
-
-#endif	/* CONFIG_GTH */
-
 /*** HERMES-PRO ******************************************************/
 
 /* The HERMES-PRO uses the FEC on a MPC860T for Ethernet */
@@ -888,33 +644,6 @@ typedef struct scc_enet {
 
 #endif	/* CONFIG_HERMES */
 
-/***  IAD210  **********************************************************/
-
-/* The IAD210 uses the FEC on a MPC860P for Ethernet */
-
-#if defined(CONFIG_IAD210)
-
-# define  FEC_ENET    /* use FEC for Ethernet */
-# undef   SCC_ENET
-
-# define PD_MII_TXD1    ((ushort) 0x1000 )	/* PD  3 */
-# define PD_MII_TXD2    ((ushort) 0x0800 )	/* PD  4 */
-# define PD_MII_TXD3    ((ushort) 0x0400 )	/* PD  5 */
-# define PD_MII_RX_DV   ((ushort) 0x0200 )	/* PD  6 */
-# define PD_MII_RX_ERR  ((ushort) 0x0100 )	/* PD  7 */
-# define PD_MII_RX_CLK  ((ushort) 0x0080 )	/* PD  8 */
-# define PD_MII_TXD0    ((ushort) 0x0040 )	/* PD  9 */
-# define PD_MII_RXD0    ((ushort) 0x0020 )	/* PD 10 */
-# define PD_MII_TX_ERR  ((ushort) 0x0010 )	/* PD 11 */
-# define PD_MII_MDC     ((ushort) 0x0008 )	/* PD 12 */
-# define PD_MII_RXD1    ((ushort) 0x0004 )	/* PD 13 */
-# define PD_MII_RXD2    ((ushort) 0x0002 )	/* PD 14 */
-# define PD_MII_RXD3    ((ushort) 0x0001 )	/* PD 15 */
-
-# define PD_MII_MASK    ((ushort) 0x1FFF )   /* PD 3...15 */
-
-#endif	/* CONFIG_IAD210 */
-
 /*** ICU862  **********************************************************/
 
 #if defined(CONFIG_ICU862)
@@ -1014,34 +743,6 @@ typedef struct scc_enet {
 
 #endif	/* CONFIG_KUP4K */
 
-
-/***  LANTEC  *********************************************************/
-
-#if defined(CONFIG_LANTEC) && CONFIG_LANTEC >= 2
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC2 use.
- */
-#define	PROFF_ENET	PROFF_SCC2
-#define	CPM_CR_ENET	CPM_CR_CH_SCC2
-#define	SCC_ENET	1
-#define PA_ENET_RXD	((ushort)0x0004)	/* PA 13 */
-#define PA_ENET_TXD	((ushort)0x0008)	/* PA 12 */
-#define PA_ENET_RCLK	((ushort)0x0200)	/* PA  6 */
-#define PA_ENET_TCLK	((ushort)0x0400)	/* PA  5 */
-
-#define PB_ENET_TENA	((uint)0x00002000)	/* PB 18 */
-
-#define PC_ENET_LBK	((ushort)0x0010)	/* PC 11 */
-#define PC_ENET_CLSN	((ushort)0x0040)	/* PC  9 */
-#define PC_ENET_RENA	((ushort)0x0080)	/* PC  8 */
-
-/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK2) to
- * SCC2.  Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
- */
-#define SICR_ENET_MASK	((uint)0x0000FF00)
-#define SICR_ENET_CLKRT	((uint)0x00002E00)
-#endif	/* CONFIG_LANTEC v2 */
-
 /***  LWMON  **********************************************************/
 
 #if defined(CONFIG_LWMON)
@@ -1068,65 +769,11 @@ typedef struct scc_enet {
 #define SICR_ENET_CLKRT	((uint)0x00003E00)
 #endif	/* CONFIG_LWMON */
 
-/***  NX823  ***********************************************/
-
-#if defined(CONFIG_NX823)
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- */
-#define PROFF_ENET	PROFF_SCC2
-#define CPM_CR_ENET	CPM_CR_CH_SCC2
-#define SCC_ENET	1
-#define PA_ENET_RXD	((ushort)0x0004)  /* PA 13 */
-#define PA_ENET_TXD	((ushort)0x0008)  /* PA 12 */
-#define PA_ENET_RCLK	((ushort)0x0200)  /* PA  6 */
-#define PA_ENET_TCLK	((ushort)0x0800)  /* PA  4 */
-
-#define PB_ENET_TENA	((uint)0x00002000)   /* PB 18 */
-
-#define PC_ENET_CLSN	((ushort)0x0040)  /* PC  9 */
-#define PC_ENET_RENA	((ushort)0x0080)  /* PC  8 */
-
-/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
- * SCC2.  Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
- */
-#define SICR_ENET_MASK	((uint)0x0000ff00)
-#define SICR_ENET_CLKRT	((uint)0x00002f00)
-
-#endif   /* CONFIG_NX823 */
-
-/***  MBX  ************************************************************/
-
-#ifdef CONFIG_MBX
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.  The TCLK and RCLK seem unique
- * to the MBX860 board.  Any two of the four available clocks could be
- * used, and the MPC860 cookbook manual has an example using different
- * clock pins.
- */
-#define	PROFF_ENET	PROFF_SCC1
-#define	CPM_CR_ENET	CPM_CR_CH_SCC1
-#define	SCC_ENET	0
-#define PA_ENET_RXD	((ushort)0x0001)
-#define PA_ENET_TXD	((ushort)0x0002)
-#define PA_ENET_TCLK	((ushort)0x0200)
-#define PA_ENET_RCLK	((ushort)0x0800)
-#define PC_ENET_TENA	((ushort)0x0001)
-#define PC_ENET_CLSN	((ushort)0x0010)
-#define PC_ENET_RENA	((ushort)0x0020)
-
-/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
- * SCC1.  Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK	((uint)0x000000ff)
-#define SICR_ENET_CLKRT	((uint)0x0000003d)
-#endif	/* CONFIG_MBX */
-
-/***  MGSUVD  *********************************************************/
+/***  KM8XX  *********************************************************/
 
-/* The MGSUVD Service Module uses SCC3 for Ethernet */
+/* The KM8XX Service Module uses SCC3 for Ethernet */
 
-#ifdef CONFIG_MGSUVD
+#ifdef CONFIG_KM8XX
 #define PROFF_ENET	PROFF_SCC3		/* Ethernet on SCC3 */
 #define CPM_CR_ENET	CPM_CR_CH_SCC3
 #define SCC_ENET	2
@@ -1145,7 +792,7 @@ typedef struct scc_enet {
  */
 #define SICR_ENET_MASK	((uint)0x00FF0000)
 #define SICR_ENET_CLKRT	((uint)0x00250000)
-#endif	/* CONFIG_MGSUVD */
+#endif	/* CONFIG_KM8XX */
 
 
 /***  MHPC  ********************************************************/
@@ -1307,41 +954,6 @@ typedef struct scc_enet {
 
 #endif /* CONFIG_QS860T */
 
-/***  RPXCLASSIC  *****************************************************/
-
-#ifdef CONFIG_RPXCLASSIC
-
-#ifdef CONFIG_FEC_ENET
-
-# define FEC_ENET				/* use FEC for EThernet */
-# undef SCC_ENET
-
-#else	/* ! CONFIG_FEC_ENET */
-
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- */
-#define	PROFF_ENET	PROFF_SCC1
-#define	CPM_CR_ENET	CPM_CR_CH_SCC1
-#define	SCC_ENET	0
-#define PA_ENET_RXD	((ushort)0x0001)
-#define PA_ENET_TXD	((ushort)0x0002)
-#define PA_ENET_TCLK	((ushort)0x0200)
-#define PA_ENET_RCLK	((ushort)0x0800)
-#define PB_ENET_TENA	((uint)0x00001000)
-#define PC_ENET_CLSN	((ushort)0x0010)
-#define PC_ENET_RENA	((ushort)0x0020)
-
-/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
- * SCC1.  Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK	((uint)0x000000ff)
-#define SICR_ENET_CLKRT	((uint)0x0000003d)
-
-#endif	/* CONFIG_FEC_ENET */
-
-#endif	/* CONFIG_RPXCLASSIC */
-
 /***  RPXLITE  ********************************************************/
 
 #ifdef CONFIG_RPXLITE
@@ -1433,15 +1045,14 @@ typedef struct scc_enet {
 
 #endif	/* CONFIG_SXNI855T */
 
-/***  MVS1, TQM823L/M, TQM850L/M, TQM885D, ETX094, R360MPI  **********/
+/***  MVS1, TQM823L/M, TQM850L/M, TQM885D, R360MPI  **********/
 
 #if (defined(CONFIG_MVS) && CONFIG_MVS < 2) || \
     defined(CONFIG_R360MPI) || defined(CONFIG_RBC823)  || \
-    defined(CONFIG_TQM823L) || defined(CONFIG_TQM823M) || \
-    defined(CONFIG_TQM850L) || defined(CONFIG_TQM850M) || \
-    defined(CONFIG_TQM885D) || defined(CONFIG_ETX094)  || \
-    defined(CONFIG_RRVISION)|| defined(CONFIG_VIRTLAB2)|| \
-   (defined(CONFIG_LANTEC) && CONFIG_LANTEC < 2)
+    defined(CONFIG_RRVISION)|| defined(CONFIG_TQM823L) || \
+    defined(CONFIG_TQM823M) || defined(CONFIG_TQM850L) || \
+    defined(CONFIG_TQM850M) || defined(CONFIG_TQM885D) || \
+    defined(CONFIG_RRVISION)|| defined(CONFIG_VIRTLAB2)
 
 /* Bits in parallel I/O port registers that have to be set/cleared
  * to configure the pins for SCC2 use.