X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=include%2Fconfigs%2FBC3450.h;h=802e9cce1fb61e3ac50c2844bb4417e02d905bfa;hp=44befe9edfa09793e3050e582851b6002a602acc;hb=8e4ab1d58265884bbc9da6c6720d7a635f00fb2b;hpb=859500a2be94bfa77a845b9c8a4c499587035fd5

diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h
index 44befe9edf..802e9cce1f 100644
--- a/include/configs/BC3450.h
+++ b/include/configs/BC3450.h
@@ -13,23 +13,7 @@
  * History:
  *	1.1 - add define CONFIG_ZERO_BOOTDELAY_CHECK
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -38,8 +22,7 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU	    */
-#define CONFIG_MPC5200		1	/* (more precisely a MPC5200 CPU)   */
+#define CONFIG_MPC5200		1	/* This is a MPC5200 CPU	    */
 #define CONFIG_TQM5200		1	/* ... on a TQM5200 module	    */
 
 #define CONFIG_BC3450		1	/* ... on a BC3450 mainboard	    */
@@ -56,10 +39,17 @@
 #define CONFIG_BC3450_FP	1	/*  + enable FP O/P		    */
 #undef CONFIG_BC3450_CRT		/*  + enable CRT O/P (Debug only!)  */
 
-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz	    */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFC000000	boot low (standard configuration with room for
+ *		max 64 MByte Flash ROM)
+ * 0x00100000	boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE	0xFC000000
+#endif
 
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM		0x02	/* Software reboot		    */
+#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz	    */
 
 #define CONFIG_HIGH_BATS	1	/* High BATs supported		    */
 
@@ -99,7 +89,6 @@
 #define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
 #define CONFIG_PCI_IO_SIZE	0x01000000
 
-#define CONFIG_NET_MULTI	1
 /*#define CONFIG_EEPRO100	XXX - FIXME: conflicts when CONFIG_MII is enabled */
 #define CONFIG_SYS_RX_ETH_BUFFER	8	/* use 8 rx buffer on eepro100	*/
 #define CONFIG_NS8382X		1
@@ -207,7 +196,7 @@
 
 #define CONFIG_TIMESTAMP		/* display image timestamps */
 
-#if (TEXT_BASE == 0xFC000000)		/* Boot low */
+#if (CONFIG_SYS_TEXT_BASE == 0xFC000000)		/* Boot low */
 #   define CONFIG_SYS_LOWBOOT		1
 #endif
 
@@ -324,7 +313,7 @@
 /*
  * Flash configuration
  */
-#define CONFIG_SYS_FLASH_BASE		TEXT_BASE /* 0xFC000000 */
+#define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_TEXT_BASE /* 0xFC000000 */
 
 /* use CFI flash driver if no module variant is spezified */
 #define CONFIG_SYS_FLASH_CFI		1	/* Flash is CFI conformant */
@@ -377,16 +366,15 @@
 #define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
 #ifdef CONFIG_POST
 /* preserve space for the post_word at end of on-chip SRAM */
-# define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE
+# define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_POST_SIZE
 #else
-# define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
+# define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE
 #endif /*CONFIG_POST*/
 
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* Bytes reserved for initial data  */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #   define CONFIG_SYS_RAMBOOT		1
 #endif
@@ -438,7 +426,6 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP				/* undef to save memory	    */
-#define CONFIG_SYS_PROMPT		"=> "		/* Monitor Command Prompt   */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE		1024		/* Console I/O Buffer Size  */
 #else
@@ -456,8 +443,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address	    */
 
-#define CONFIG_SYS_HZ			1000		/* dec freq: 1ms ticks	    */
-
 #define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs		    */
 #if defined(CONFIG_CMD_KGDB)
 #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value    */