X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=include%2Fconfigs%2Fdevkit3250.h;h=d3b7620af11e9648e0fa68ec80740aec6ccd46b0;hp=9f15ffb0fd40d3778f37dfb5679d226aa8e207f9;hb=ca614c164012789ee27de57bab615994f9c2ec25;hpb=8fa3d2b8161bb73b759c9db5c811c885ca5ec60c diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 9f15ffb0fd..d3b7620af1 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -1,29 +1,16 @@ /* * Embest/Timll DevKit3250 board configuration file * - * Copyright (C) 2011 Vladimir Zapolskiy + * Copyright (C) 2011-2015 Vladimir Zapolskiy * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_DEVKIT3250_H__ #define __CONFIG_DEVKIT3250_H__ /* SoC and board defines */ -#include +#include #include /* @@ -34,16 +21,16 @@ #define CONFIG_SYS_ICACHE_OFF #define CONFIG_SYS_DCACHE_OFF +#if !defined(CONFIG_SPL_BUILD) #define CONFIG_SKIP_LOWLEVEL_INIT +#endif #define CONFIG_BOARD_EARLY_INIT_F /* * Memory configurations */ #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_STACKSIZE SZ_32K #define CONFIG_SYS_MALLOC_LEN SZ_1M -#define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_64M #define CONFIG_SYS_TEXT_BASE 0x83FA0000 @@ -58,24 +45,82 @@ /* * Serial Driver */ -#define CONFIG_SYS_LPC32XX_UART 2 /* UART2 */ +#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 */ #define CONFIG_BAUDRATE 115200 +/* + * I2C + */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_LPC32XX +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_CMD_I2C + +/* + * GPIO + */ +#define CONFIG_LPC32XX_GPIO +#define CONFIG_CMD_GPIO + +/* + * SSP/SPI + */ +#define CONFIG_LPC32XX_SSP +#define CONFIG_LPC32XX_SSP_TIMEOUT 100000 +#define CONFIG_CMD_SPI + +/* + * Ethernet + */ +#define CONFIG_RMII +#define CONFIG_PHY_SMSC +#define CONFIG_LPC32XX_ETH +#define CONFIG_PHYLIB +#define CONFIG_PHY_ADDR 0x1F +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP + /* * NOR Flash */ -#define CONFIG_CMD_FLASH #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE #define CONFIG_SYS_FLASH_SIZE SZ_4M #define CONFIG_SYS_FLASH_CFI +/* + * NAND controller + */ +#define CONFIG_NAND_LPC32XX_SLC +#define CONFIG_SYS_NAND_BASE SLC_NAND_BASE +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } + +/* + * NAND chip timings + */ +#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14 +#define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666 +#define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000 +#define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000 +#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 14 +#define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666 +#define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000 +#define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000 + +#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 +#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE +#define CONFIG_SYS_NAND_USE_FLASH_BBT + +#define CONFIG_CMD_NAND + /* * U-Boot General Configurations */ #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_PROMPT "=> " #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) @@ -88,13 +133,37 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DOS_PARTITION -#define CONFIG_ENV_IS_NOWHERE +/* + * Pass open firmware flat tree + */ +#define CONFIG_OF_LIBFDT + +/* + * Environment + */ +#define CONFIG_ENV_IS_IN_NAND 1 #define CONFIG_ENV_SIZE SZ_128K +#define CONFIG_ENV_OFFSET 0x000A0000 + +#define CONFIG_BOOTCOMMAND \ + "dhcp; " \ + "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; " \ + "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; " \ + "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; " \ + "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; " \ + "bootm ${loadaddr} - ${dtbaddr}" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=no\0" \ + "ethaddr=00:01:90:00:C0:81\0" \ + "dtbaddr=0x81000000\0" \ + "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \ + "tftpdir=vladimir/oe/devkit3250\0" \ + "userargs=oops=panic\0" /* * U-Boot Commands */ -#include #define CONFIG_CMD_CACHE /* @@ -103,12 +172,52 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_ZERO_BOOTDELAY_CHECK -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_BOOTFILE "uImage" -#define CONFIG_BOOTARGS "console=ttyS2,115200n8" +#define CONFIG_BOOTARGS "console=ttyS0,115200n8" #define CONFIG_LOADADDR 0x80008000 +/* + * SPL specific defines + */ +/* SPL will be executed at offset 0 */ +#define CONFIG_SPL_TEXT_BASE 0x00000000 + +/* SPL will use SRAM as stack */ +#define CONFIG_SPL_STACK 0x0000FFF8 +#define CONFIG_SPL_BOARD_INIT + +/* Use the framework and generic lib */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT + +/* SPL will use serial */ +#define CONFIG_SPL_SERIAL_SUPPORT + +/* SPL loads an image from NAND */ +#define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_NAND_RAW_ONLY +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_DRIVERS + +#define CONFIG_SPL_NAND_ECC +#define CONFIG_SPL_NAND_SOFTECC + +#define CONFIG_SPL_MAX_SIZE 0x20000 +#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE + +/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE + +/* See common/spl/spl.c spl_set_header_raw_uboot() */ +#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE + /* * Include SoC specific configuration */