X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=blobdiff_plain;f=include%2Fconfigs%2Fsc3.h;h=14e033dd8025914f62e392a2ec7011c8650b01e8;hp=873d3b4df0a398bcb4d2ea5abc2021165e7b10fb;hb=4b19b7448e63bab8af17abbb30acff00d8f0dc99;hpb=ee8028b7f108bd049eb389f01b590be0b75adaf6 diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 873d3b4df0..14e033dd80 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -6,23 +6,7 @@ * (C) Copyright 2003 * Juergen Beisert, EuroDesign embedded technologies, jbeisert@eurodsn.de * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -59,7 +43,6 @@ */ #define CONFIG_SC3 1 -#define CONFIG_4xx 1 #define CONFIG_405GP 1 #define CONFIG_SYS_TEXT_BASE 0xFFFA0000 @@ -83,7 +66,6 @@ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_serial_clock() -#define CONFIG_SERIAL_MULTI /* * define CONFIG_SYS_CLK_FREQ to your base crystal clock in Hz @@ -162,7 +144,6 @@ #undef CONFIG_LOADS_ECHO /* no echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -#define CONFIG_NET_MULTI /* #define CONFIG_EEPRO100_SROM_WRITE */ /* #define CONFIG_SHOW_MAC */ #define CONFIG_EEPRO100 @@ -242,22 +223,20 @@ #define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */ #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - /*----------------------------------------------------------------------- * IIC stuff *----------------------------------------------------------------------- */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_PPC4XX +#define CONFIG_SYS_I2C_PPC4XX_CH0 #define I2C_INIT #define I2C_ACTIVE 0 #define I2C_TRISTATE 0 -#define CONFIG_SYS_I2C_SPEED 100000 /* use the standard 100kHz speed */ -#define CONFIG_SYS_I2C_SLAVE 0x7F /* mask valid bits */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* mask valid bits */ #define CONFIG_RTC_DS1337 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 @@ -271,6 +250,7 @@ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ #define CONFIG_PCI /* include pci support */ +#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ @@ -480,7 +460,6 @@ (offset only) */ -/* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* Initial value of the stack pointern in internal SRAM */ #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET @@ -533,9 +512,9 @@ #define CONFIG_SYS_ISA_MEM_BASE_ADDRESS 0x78000000 /* - Die Grafik-Treiber greifen über die Adresse in diesem Macro auf den Chip zu. + Die Grafik-Treiber greifen über die Adresse in diesem Macro auf den Chip zu. Das funktioniert bei deren Karten, weil sie eine PCI-Bridge benutzen, die - das gleiche Mapping durchführen kann, wie der SC520 (also Aufteilen von IO-Zugriffen + das gleiche Mapping durchführen kann, wie der SC520 (also Aufteilen von IO-Zugriffen auf ISA- und PCI-Zyklen) */ #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000