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mxs: spl_mem_init: Skip the initialization of some DRAM_CTL registers
authorFabio Estevam <fabio.estevam@freescale.com>
Fri, 3 May 2013 04:37:12 +0000 (04:37 +0000)
committerStefano Babic <sbabic@denx.de>
Sun, 5 May 2013 15:08:46 +0000 (17:08 +0200)
commit39a538d9920f9422edbe339f00abe2eb7e038741
treef35ac1cd9d75b153d325de4275b2e106a1068cc7tree | snapshot
parentb0d4bf9f0c061945e5b87150fc364e8794162a10commit | diff
mxs: spl_mem_init: Skip the initialization of some DRAM_CTL registers

HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per
FSL bootlets code.

mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved".

HW_DRAM_CTL8 is setup as the last element.

So skip the initialization of these DRAM_CTL registers.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c diff | blob | history
UBoot for KaRo TX COM modules