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(parent: d2c7074) | patch
Tegra114: Fix PLLX M, N, P init settings
authorJimmy Zhang <jimmzhang@nvidia.com>
Mon, 23 Sep 2013 20:07:49 +0000 (22:07 +0200)
committerTom Warren <twarren@nvidia.com>
Wed, 18 Dec 2013 17:19:48 +0000 (10:19 -0700)
commit44de8e22ecfc0106c0aea7f39b9aa85aebf46b9c
tree4e8f3d994677a356141774cf292cce01a993c304tree | snapshot
parentd2c7074b9593d822e2359a09c21747248fdf5faccommit | diff
Tegra114: Fix PLLX M, N, P init settings

The M, N and P width have been changed from Tegra30. The maximum value
for N is limited to 255. So, the tegra_pll_x_table for Tegra114 should
be set accordingly.

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Reviewed-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/cpu/arm720t/tegra-common/cpu.c diff | blob | history
UBoot for KaRo TX COM modules