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armv8/fsl-lsch3: Add support for second DDR clock
authorYork Sun <yorksun@freescale.com>
Tue, 6 Jan 2015 21:18:49 +0000 (13:18 -0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Tue, 1 Sep 2015 11:53:58 +0000 (13:53 +0200)
commit7e843e051fa5ee59cb4f0517121071e096586014
treee5e8fca3f3106b222281dc6812dd02fb172b28d1tree | snapshot
parent36d54d4916a68fc11b2e0c1db82302d994f3fd9ecommit | diff
armv8/fsl-lsch3: Add support for second DDR clock

FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for
general DDR controlers, and another clock for DP-DDR. DDR driver needs to
change to support multiple clocks.

Signed-off-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv8/fsl-lsch3/cpu.c diff | blob | history
arch/arm/cpu/armv8/fsl-lsch3/speed.c diff | blob | history
arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h diff | blob | history
arch/arm/include/asm/global_data.h diff | blob | history
UBoot for KaRo TX COM modules