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(parent: f1ae382) | patch
pcnet: align rx buffers for cache invalidation
authorPaul Burton <paul.burton@imgtec.com>
Mon, 7 Apr 2014 15:41:47 +0000 (16:41 +0100)
committerTom Rini <trini@ti.com>
Fri, 18 Apr 2014 14:42:30 +0000 (10:42 -0400)
commita354ddc3d7412c6d7cc702de60be32e580ccf348
treecf49a6530090852c02dab05228ebc358de25787atree | snapshot
parentf1ae382dfd3850f4fbf34d794a31b8a1d1a5c389commit | diff
pcnet: align rx buffers for cache invalidation

The RX buffers are invalidated when a packet is received, however they
were not suitably cache-line aligned. Allocate them seperately to the
pcnet_priv structure and align to ARCH_DMA_MINALIGN in order to ensure
suitable alignment for the cache invalidation, preventing anything else
being placed in the same lines & lost.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
drivers/net/pcnet.c diff | blob | history
UBoot for KaRo TX COM modules