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(parent: fcea306) | patch
powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving
authorYork Sun <yorksun@freescale.com>
Fri, 17 Aug 2012 08:22:39 +0000 (08:22 +0000)
committerAndy Fleming <afleming@freescale.com>
Thu, 23 Aug 2012 17:16:55 +0000 (12:16 -0500)
commita4c66509f1b95884e5753d5a30cf2cf884adb821
tree0e6a44b7d2b286afc7bafff558277d51ca182195tree | snapshot
parentfcea30688fd8c47d54473ffd0f551a5e6efc74a0commit | diff
powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving

Restructure DDR interleaving option to support 3 and 4 DDR controllers
for 2-, 3- and 4-way interleaving.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
arch/powerpc/cpu/mpc85xx/cpu.c diff | blob | history
arch/powerpc/cpu/mpc85xx/ddr-gen3.c diff | blob | history
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c diff | blob | history
arch/powerpc/cpu/mpc8xxx/ddr/main.c diff | blob | history
arch/powerpc/cpu/mpc8xxx/ddr/options.c diff | blob | history
arch/powerpc/cpu/mpc8xxx/ddr/util.c diff | blob | history
arch/powerpc/include/asm/fsl_ddr_sdram.h diff | blob | history
arch/powerpc/include/asm/fsl_law.h diff | blob | history
arch/powerpc/include/asm/immap_85xx.h diff | blob | history
doc/README.fsl-ddr diff | blob | history
UBoot for KaRo TX COM modules