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ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay...
authorMarek Vasut <marex@denx.de>
Sat, 18 Jul 2015 02:20:26 +0000 (04:20 +0200)
committerLothar Waßmann <LW@KARO-electronics.de>
Thu, 10 Sep 2015 06:17:29 +0000 (08:17 +0200)
commitc8259f40fdf4442b3c87ba0de2402e8992e7ffc4
treebb8dccca6200a5ca60f0b686dbab13c8944cb014tree | snapshot
parent5ebb86f0fb848d5781c4000191de28e927f67a27commit | diff
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() part 2

The read_group and write_group params have the same value for all (one)
invocations of this function, just merge them into a single param.

Signed-off-by: Marek Vasut <marex@denx.de>
drivers/ddr/altera/sequencer.c diff | blob | history
UBoot for KaRo TX COM modules