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T4240: Address T4240/T4160 Rev2.0 DDR clock change
authorZang Roy-R61911 <tie-fei.zang@freescale.com>
Thu, 28 Nov 2013 05:23:37 +0000 (13:23 +0800)
committerYork Sun <yorksun@freescale.com>
Wed, 4 Dec 2013 22:54:42 +0000 (14:54 -0800)
commite88f421e7a65e5bd0c6131e5202d710e73dd4aae
tree29daad933328ec9d6d20b8861399ec8f68319e45tree | snapshot
parent7aa6c455c357f6d767acec747bbecb23664eeacbcommit | diff
T4240: Address T4240/T4160 Rev2.0 DDR clock change

MEM_PLL_RAT on T4240/T4160 Rev2.0 uses a value which is half of Rev1.0.
It's 12 in Rev1.0, for Rev2.0 it uses 6.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
arch/powerpc/cpu/mpc85xx/speed.c diff | blob | history
UBoot for KaRo TX COM modules