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powerpc/85xx: Refactor P2041RDB to use common p_corenet files
authorKumar Gala <galak@kernel.crashing.org>
Tue, 30 Aug 2011 22:40:11 +0000 (17:40 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 30 Sep 2011 00:01:06 +0000 (19:01 -0500)
commitf8bc7bb5a79b392db3af9f62b63caefab8afbc31
tree9ee756eebfdcab351f4a00a52fa4505b5e2f0febtree | snapshot
parent360275b362e50f480b09c7c8770019ea4287afadcommit | diff
powerpc/85xx: Refactor P2041RDB to use common p_corenet files

The P2041RDB has almost identical setup for TLB, LAWS, and PCI with
other P-Series CoreNet platforms.

The only difference between P2041RDB & P3041DS/P4080DS/P5020DS is the
CPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the
TLB and LAW setup tables.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
board/freescale/common/Makefile diff | blob | history
board/freescale/common/p_corenet/law.c diff | blob | history
board/freescale/common/p_corenet/tlb.c diff | blob | history
board/freescale/p2041rdb/Makefile diff | blob | history
board/freescale/p2041rdb/law.c [deleted file] blob | history
board/freescale/p2041rdb/pci.c [deleted file] blob | history
board/freescale/p2041rdb/tlb.c [deleted file] blob | history
UBoot for KaRo TX COM modules