net: fec_mxc: don't try to clear read-only registers

The registers in the affected address range are all read only. There
is no use in trying to clear them.

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index aed7e07fc62bb0bb42e9bb3d4a6e5e396d1f3e03..61f2db834c3db2d55d0804b96332e8112b7881f9 100644 (file)
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -531,8 +531,6 @@ static int fec_open(struct eth_device *edev)
 static int fec_init(struct eth_device *dev, bd_t* bd)
 {
        struct fec_priv *fec = dev->priv;
 static int fec_init(struct eth_device *dev, bd_t* bd)
 {
        struct fec_priv *fec = dev->priv;

-       uint32_t *mib_ptr = (uint32_t *)&fec->eth->rmon_t_drop;
-       int i;

 
        /* Initialize MAC address */
        fec_set_hwaddr(dev);
 
        /* Initialize MAC address */
        fec_set_hwaddr(dev);


@@ -561,11 +559,6 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
        writel(0x00000000, &fec->eth->gaddr1);
        writel(0x00000000, &fec->eth->gaddr2);
 
        writel(0x00000000, &fec->eth->gaddr1);
        writel(0x00000000, &fec->eth->gaddr2);
 

-
-       /* clear MIB RAM */
-       for (i = 0; i <= 0xfc >> 2; i++)
-               writel(0, &mib_ptr[i]);
-

        /* FIFO receive start register */
        writel(0x520, &fec->eth->r_fstart);
 
        /* FIFO receive start register */
        writel(0x520, &fec->eth->r_fstart);