avr32: rename mmu.h definitions

Prefix mmu.h PAGE_xxx definitions with MMU_ in order to prevent a naming
conflict with other definitions.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

diff --git a/arch/avr32/cpu/at32ap700x/mmu.c b/arch/avr32/cpu/at32ap700x/mmu.c
index 0e28b21eefd4c8436801e63ff792db221857dc49..f5e62f27ebd2dbaacf3b8c799eff1ca49feb6f7f 100644 (file)
--- a/arch/avr32/cpu/at32ap700x/mmu.c
+++ b/arch/avr32/cpu/at32ap700x/mmu.c
@@ -7,7 +7,7 @@ void mmu_init_r(unsigned long dest_addr)
        uintptr_t       vmr_table_addr;
 
        /* Round monitor address down to the nearest page boundary */
        uintptr_t       vmr_table_addr;
 
        /* Round monitor address down to the nearest page boundary */

-       dest_addr &= PAGE_ADDR_MASK;
+       dest_addr &= MMU_PAGE_ADDR_MASK;

 
        /* Initialize TLB entry 0 to cover the monitor, and lock it */
        sysreg_write(TLBEHI, dest_addr | SYSREG_BIT(TLBEHI_V));
 
        /* Initialize TLB entry 0 to cover the monitor, and lock it */
        sysreg_write(TLBEHI, dest_addr | SYSREG_BIT(TLBEHI_V));


@@ -36,7 +36,7 @@ int mmu_handle_tlb_miss(void)
        unsigned int fault_pgno;
        int first, last;
 
        unsigned int fault_pgno;
        int first, last;
 

-       fault_pgno = sysreg_read(TLBEAR) >> PAGE_SHIFT;
+       fault_pgno = sysreg_read(TLBEAR) >> MMU_PAGE_SHIFT;

        vmr_table = (const struct mmu_vm_range *)sysreg_read(PTBR);
 
        /* Do a binary search through the VM ranges */
        vmr_table = (const struct mmu_vm_range *)sysreg_read(PTBR);
 
        /* Do a binary search through the VM ranges */


@@ -60,8 +60,8 @@ int mmu_handle_tlb_miss(void)
                        /* Got it; let's slam it into the TLB */
                        uint32_t tlbelo;
 
                        /* Got it; let's slam it into the TLB */
                        uint32_t tlbelo;
 

-                       tlbelo = vmr->phys & ~PAGE_ADDR_MASK;
-                       tlbelo |= fault_pgno << PAGE_SHIFT;
+                       tlbelo = vmr->phys & ~MMU_PAGE_ADDR_MASK;
+                       tlbelo |= fault_pgno << MMU_PAGE_SHIFT;

                        sysreg_write(TLBELO, tlbelo);
                        __builtin_tlbw();
 
                        sysreg_write(TLBELO, tlbelo);
                        __builtin_tlbw();
 

diff --git a/arch/avr32/include/asm/arch-at32ap700x/mmu.h b/arch/avr32/include/asm/arch-at32ap700x/mmu.h
index fcd9a0560929df51e768b5a733d176ed03418cf3..4736312f5dbc9cfedd937d4476c91f27367a3744 100644 (file)
--- a/arch/avr32/include/asm/arch-at32ap700x/mmu.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/mmu.h
@@ -13,9 +13,9 @@
 
 #include <asm/sysreg.h>
 
 
 #include <asm/sysreg.h>
 

-#define PAGE_SHIFT     20
-#define PAGE_SIZE      (1UL << PAGE_SHIFT)
-#define PAGE_ADDR_MASK (~(PAGE_SIZE - 1))
+#define MMU_PAGE_SHIFT 20
+#define MMU_PAGE_SIZE  (1UL << MMU_PAGE_SHIFT)
+#define MMU_PAGE_ADDR_MASK     (~(MMU_PAGE_SIZE - 1))

 
 #define MMU_VMR_CACHE_NONE                                             \
        (SYSREG_BF(AP, 3) | SYSREG_BF(SZ, 3) | SYSREG_BIT(TLBELO_D))
 
 #define MMU_VMR_CACHE_NONE                                             \
        (SYSREG_BF(AP, 3) | SYSREG_BF(SZ, 3) | SYSREG_BIT(TLBELO_D))

diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c
index 03d767a4a88dac63a2646187501d0030b9d4901f..ed09c8c7e41ceb28d73450be128b36eb72cac8e9 100644 (file)
--- a/board/atmel/atngw100/atngw100.c
+++ b/board/atmel/atngw100/atngw100.c
@@ -18,14 +18,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {

-               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
-               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_NONE,
        }, {
                                        | MMU_VMR_CACHE_NONE,
        }, {

-               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
-               .nr_pages       = EBI_SDRAM_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_WRBACK,
        },
 };
                                        | MMU_VMR_CACHE_WRBACK,
        },
 };

diff --git a/board/atmel/atngw100mkii/atngw100mkii.c b/board/atmel/atngw100mkii/atngw100mkii.c
index 72d19e430ef8c8818028b71417593641fee647a9..912ea10fe405816611b64dcb4a26dbf536215366 100644 (file)
--- a/board/atmel/atngw100mkii/atngw100mkii.c
+++ b/board/atmel/atngw100mkii/atngw100mkii.c
@@ -23,21 +23,21 @@ DECLARE_GLOBAL_DATA_PTR;
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {
                /* Atmel AT49BV640D 8 MiB x16 NOR flash on NCS0 */
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {
                /* Atmel AT49BV640D 8 MiB x16 NOR flash on NCS0 */

-               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
-               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_NONE,
        }, {
                /* Micron MT29F2G16AAD 256 MiB x16 NAND flash on NCS3 */
                                        | MMU_VMR_CACHE_NONE,
        }, {
                /* Micron MT29F2G16AAD 256 MiB x16 NAND flash on NCS3 */

-               .virt_pgno      = EBI_SRAM_CS3_BASE >> PAGE_SHIFT,
-               .nr_pages       = EBI_SRAM_CS3_SIZE >> PAGE_SHIFT,
-               .phys           = (EBI_SRAM_CS3_BASE >> PAGE_SHIFT)
+               .virt_pgno      = EBI_SRAM_CS3_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = EBI_SRAM_CS3_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (EBI_SRAM_CS3_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_NONE,
        }, {
                /* 2x16-bit ISSI IS42S16320B 64 MiB SDRAM (128 MiB total) */
                                        | MMU_VMR_CACHE_NONE,
        }, {
                /* 2x16-bit ISSI IS42S16320B 64 MiB SDRAM (128 MiB total) */

-               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
-               .nr_pages       = EBI_SDRAM_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_WRBACK,
        },
 };
                                        | MMU_VMR_CACHE_WRBACK,
        },
 };

diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c
index 4b6b90f683dcca568c9778462fd42f3d7e8079eb..f3546946c4a516548ea350ca8d878499c80209bc 100644 (file)
--- a/board/atmel/atstk1000/atstk1000.c
+++ b/board/atmel/atstk1000/atstk1000.c
@@ -17,14 +17,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {

-               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
-               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_NONE,
        }, {
                                        | MMU_VMR_CACHE_NONE,
        }, {

-               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
-               .nr_pages       = EBI_SDRAM_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_WRBACK,
        },
 };
                                        | MMU_VMR_CACHE_WRBACK,
        },
 };

diff --git a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c
index a74547bf65106f4e73764e7da5000110439bb79f..f9fde793f5cb8447756b8ae1efa344470eb8fb9b 100644 (file)
--- a/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c
+++ b/board/earthlcd/favr-32-ezkit/favr-32-ezkit.c
@@ -17,14 +17,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {

-               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
-               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_NONE,
        }, {
                                        | MMU_VMR_CACHE_NONE,
        }, {

-               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
-               .nr_pages       = EBI_SDRAM_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_WRBACK,
        },
 };
                                        | MMU_VMR_CACHE_WRBACK,
        },
 };

diff --git a/board/in-circuit/grasshopper/grasshopper.c b/board/in-circuit/grasshopper/grasshopper.c
index 340b7131883d46b88f30e55588b59c69c7f094e1..2ac54db2956eebd1414b972ea7654204236823f6 100644 (file)
--- a/board/in-circuit/grasshopper/grasshopper.c
+++ b/board/in-circuit/grasshopper/grasshopper.c
@@ -18,14 +18,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {

-               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
-               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)

                                | MMU_VMR_CACHE_NONE,
        }, {
                                | MMU_VMR_CACHE_NONE,
        }, {

-               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
-               .nr_pages       = EBI_SDRAM_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)

                                | MMU_VMR_CACHE_WRBACK,
        },
 };
                                | MMU_VMR_CACHE_WRBACK,
        },
 };

diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c
index 2ad53ec2ab6d8d6f9b172bd9ab8b6d426bd9e8cb..186ac7df62583773ae33cbf7f27692aac592cca5 100644 (file)
--- a/board/mimc/mimc200/mimc200.c
+++ b/board/mimc/mimc200/mimc200.c
@@ -20,19 +20,19 @@
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {

-               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
-               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_NONE,
        }, {
                                        | MMU_VMR_CACHE_NONE,
        }, {

-               .virt_pgno      = EBI_SRAM_CS2_BASE >> PAGE_SHIFT,
-               .nr_pages       = EBI_SRAM_CS2_SIZE >> PAGE_SHIFT,
-               .phys           = (EBI_SRAM_CS2_BASE >> PAGE_SHIFT)
+               .virt_pgno      = EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = EBI_SRAM_CS2_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (EBI_SRAM_CS2_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_NONE,
        }, {
                                        | MMU_VMR_CACHE_NONE,
        }, {

-               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
-               .nr_pages       = EBI_SDRAM_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_WRBACK,
        },
 };
                                        | MMU_VMR_CACHE_WRBACK,
        },
 };

diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c
index d82fee7b90fd4eb4d15290e9239eb20413ca7c23..e9a9e4b3cf6d6e88c902fb636f7d30fa83d1e8fa 100644 (file)
--- a/board/miromico/hammerhead/hammerhead.c
+++ b/board/miromico/hammerhead/hammerhead.c
@@ -21,14 +21,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {
 
 struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
        {

-               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
-               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = CONFIG_SYS_FLASH_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_FLASH_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_NONE,
        }, {
                                        | MMU_VMR_CACHE_NONE,
        }, {

-               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
-               .nr_pages       = EBI_SDRAM_SIZE >> PAGE_SHIFT,
-               .phys           = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
+               .virt_pgno      = CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT,
+               .nr_pages       = EBI_SDRAM_SIZE >> MMU_PAGE_SHIFT,
+               .phys           = (CONFIG_SYS_SDRAM_BASE >> MMU_PAGE_SHIFT)

                                        | MMU_VMR_CACHE_WRBACK,
        },
 };
                                        | MMU_VMR_CACHE_WRBACK,
        },
 };