ARM: i.MX: provide access to reset cause through get_imx_reset_cause()

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>

diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index b915a0014f650fdb85efd81d9e62b38d2285a74f..a39e053c570c486800ae64deacb15c9307e2899a 100644 (file)
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -24,13 +24,16 @@
 #include <fsl_esdhc.h>
 #endif
 
-char *get_reset_cause(void)
+static u32 reset_cause = -1;
+
+static char *get_reset_cause(void)
 {
        u32 cause;
        struct src *src_regs = (struct src *)SRC_BASE_ADDR;
 
        cause = readl(&src_regs->srsr);
        writel(cause, &src_regs->srsr);
+       reset_cause = cause;
 
        switch (cause) {
        case 0x00001:
@@ -53,6 +56,11 @@ char *get_reset_cause(void)
        }
 }
 
+u32 get_imx_reset_cause(void)
+{
+       return reset_cause;
+}
+
 #if defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
 #if defined(CONFIG_SOC_MX53)
 #define MEMCTL_BASE    ESDCTL_BASE_ADDR

diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 254136e2288323ed436d8ac1a1fa3a09fe7acc9c..4715f4e8946820639dddb69bfe50f567eae3dcf5 100644 (file)
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -17,3 +17,5 @@
 #define CS0_64M_CS1_64M                                1
 #define CS0_64M_CS1_32M_CS2_32M                        2
 #define CS0_32M_CS1_32M_CS2_32M_CS3_32M                3
+
+u32 get_imx_reset_cause(void);