]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
x86: Set serial port IRQ for SMSC LPC47M
authorBin Meng <bmeng.cn@gmail.com>
Tue, 31 Mar 2015 03:25:03 +0000 (11:25 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Tue, 8 Sep 2015 20:35:14 +0000 (22:35 +0200)
For starting a Linux console on the superio serial port under
interrupt mode, the IRQ number must be configured.

Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/include/asm/ibmpc.h
board/intel/crownbay/crownbay.c
board/intel/minnowmax/minnowmax.c
drivers/misc/smsc_lpc47m.c
include/smsc_lpc47m.h

index c3b5187c2242dbadd99bc91a91747e4b4ab82a59..678cde4c86832c6c5b78a7940d546a5be32b1d9f 100644 (file)
@@ -21,4 +21,7 @@
 #define UART0_BASE     0x3f8
 #define UART1_BASE     0x2f8
 
+#define UART0_IRQ      4
+#define UART1_IRQ      3
+
 #endif
index 2a254efe3dd77bb600305d4a5f6b9272157b73f6..31bb3202130fc05bec72542571608fd9848297f1 100644 (file)
@@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_early_init_f(void)
 {
-       lpc47m_enable_serial(SERIAL_DEV, UART0_BASE);
+       lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
 
        return 0;
 }
index 6e82b163350ae1072b6798828a87e2e13edeceed..fd2070afb28660b31d0adb255169f56ec9a31b47 100644 (file)
@@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_early_init_f(void)
 {
-       lpc47m_enable_serial(SERIAL_DEV, UART0_BASE);
+       lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
 
        return 0;
 }
index d51f8e3024538da7d4d87087c724694cb00e0c16..1e50d5b82620761596294a1bffb97f21e86e88cd 100644 (file)
@@ -22,12 +22,13 @@ static void pnp_exit_conf_state(u16 dev)
        outb(0xaa, port);
 }
 
-void lpc47m_enable_serial(u16 dev, u16 iobase)
+void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq)
 {
        pnp_enter_conf_state(dev);
        pnp_set_logical_device(dev);
        pnp_set_enable(dev, 0);
        pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+       pnp_set_irq(dev, PNP_IDX_IRQ0, irq);
        pnp_set_enable(dev, 1);
        pnp_exit_conf_state(dev);
 }
index bffd622f0fdb3630db279a69f3cfbf9f7937b1ac..32b069df6f02d6a8373183e70518d6976df25879 100644 (file)
@@ -13,7 +13,8 @@
  *
  * @dev: High 8 bits = Super I/O port, low 8 bits = logical device number.
  * @iobase: Processor I/O port address to assign to this serial device.
+ * @irq: Processor IRQ number to assign to this serial device.
  */
-void lpc47m_enable_serial(u16 dev, u16 iobase);
+void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq);
 
 #endif /* _SMSC_LPC47M_H_ */