F: drivers/mtd/jedec_flash.c
COLDFIRE
-M: Jason Jin <jason.jin@freescale.com>
+M: Huan Wang <alison.wang@freescale.com>
+M: Angelo Dureghello <angelo@sysam.it>
S: Maintained
T: git git://git.denx.de/u-boot-coldfire.git
F: arch/m68k/
UBI
M: Kyungmin Park <kmpark@infradead.org>
+M: Heiko Schocher <hs@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-ubi.git
F: drivers/mtd/ubi/
-path ./include/config/auto.conf -newer $(KCONFIG_CONFIG)))
ifneq ($(autoconf_is_current),)
include $(srctree)/config.mk
+include $(srctree)/arch/$(ARCH)/Makefile
endif
# If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
#########################################################################
# U-Boot objects....order is important (i.e. start must be first)
-head-y := $(CPUDIR)/start.o
-head-$(CONFIG_4xx) += arch/powerpc/cpu/ppc4xx/resetvec.o
-head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o
-
HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makefile),y,n)
libs-y += lib/
libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
-libs-y += $(CPUDIR)/
libs-$(CONFIG_OF_EMBED) += dts/
-libs-y += arch/$(ARCH)/lib/
libs-y += fs/
libs-y += net/
libs-y += disk/
libs-y += drivers/usb/phy/
libs-y += drivers/usb/ulpi/
libs-y += common/
-libs-y += lib/libfdt/
libs-$(CONFIG_API) += api/
libs-$(CONFIG_HAS_POST) += post/
libs-y += test/
libs-y += test/dm/
-ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
-libs-y += arch/$(ARCH)/imx-common/
-endif
-
-ifneq (,$(filter $(SOC), armada-xp kirkwood))
-libs-y += arch/$(ARCH)/mvebu-common/
-endif
-
-libs-$(CONFIG_ARM) += arch/arm/cpu/
-libs-$(CONFIG_PPC) += arch/powerpc/cpu/
-
libs-y += $(if $(BOARDDIR),board/$(BOARDDIR)/)
libs-y := $(sort $(libs-y))
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS,
- CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION
- Address, size and partition on the MMC to load U-Boot from
+ Address and partition on the MMC to load U-Boot from
when the MMC is being used in raw mode.
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
+ Partition on the MMC to load U-Boot from when the MMC is being
+ used in raw mode
+
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
Sector to load kernel uImage from when MMC is being
used in raw mode (for Falcon mode)
parameters from when MMC is being used in raw mode
(for falcon mode)
+ CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
+ Partition on the MMC to load U-Boot from when the MMC is being
+ used in fs mode
+
CONFIG_SPL_FAT_SUPPORT
Support for fs/fat/libfat.o in SPL binary
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/arc/cpu/$(CPU)/start.o
+
+libs-y += arch/arc/cpu/$(CPU)/
+libs-y += arch/arc/lib/
bool "Support mx35pdk"
select CPU_ARM1136
-config TARGET_RPI_B
- bool "Support rpi_b"
+config TARGET_RPI
+ bool "Support rpi"
select CPU_ARM1176
config TARGET_TNETV107X_EVM
source "board/phytec/pcm051/Kconfig"
source "board/ppcag/bg0900/Kconfig"
source "board/pxa255_idp/Kconfig"
-source "board/raspberrypi/rpi_b/Kconfig"
+source "board/raspberrypi/rpi/Kconfig"
source "board/ronetix/pm9261/Kconfig"
source "board/ronetix/pm9263/Kconfig"
source "board/ronetix/pm9g45/Kconfig"
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/arm/cpu/$(CPU)/start.o
+
+ifeq ($(CONFIG_SPL_BUILD),y)
+ifneq ($(CONFIG_SPL_START_S_PATH),)
+head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)/start.o
+endif
+endif
+
+libs-y += arch/arm/cpu/$(CPU)/
+libs-y += arch/arm/cpu/
+libs-y += arch/arm/lib/
+
+ifeq ($(CONFIG_SPL_BUILD),y)
+ifneq (,$(CONFIG_MX23)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35))
+libs-y += arch/arm/imx-common/
+endif
+else
+ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
+libs-y += arch/arm/imx-common/
+endif
+endif
+
+ifneq (,$(filter $(SOC), armada-xp kirkwood))
+libs-y += arch/arm/mvebu-common/
+endif
default "uniphier"
config SYS_CONFIG_NAME
- default "ph1_pro4" if MACH_PH1_PRO4
- default "ph1_ld4" if MACH_PH1_LD4
- default "ph1_sld8" if MACH_PH1_SLD8
+ default "uniphier"
+
+config UNIPHIER_SMP
+ bool
choice
prompt "UniPhier SoC select"
config MACH_PH1_PRO4
bool "PH1-Pro4"
+ select UNIPHIER_SMP
config MACH_PH1_LD4
bool "PH1-LD4"
endchoice
+choice
+ prompt "UniPhier Support Card select"
+ optional
+
+config PFC_MICRO_SUPPORT_CARD
+ bool "Support card with PFC CPLD"
+ help
+ This option provides support for the expansion board with PFC
+ original address mapping.
+
+ Say Y to use the on-board UART, Ether, LED devices.
+
+config DCC_MICRO_SUPPORT_CARD
+ bool "Support card with DCC CPLD"
+ help
+ This option provides support for the expansion board with DCC-
+ arranged address mapping that is compatible with legacy UniPhier
+ reference boards.
+
+ Say Y to use the on-board UART, Ether, LED devices.
+
+endchoice
+
config CMD_PINMON
bool "Enable boot mode pins monitor command"
depends on !SPL_BUILD
obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o
obj-y += dram_init.o
obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
+obj-$(CONFIG_BOARD_EARLY_INIT_R) += board_early_init_r.o
obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o
obj-$(CONFIG_UNIPHIER_SMP) += smp.o
obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o
--- /dev/null
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/board.h>
+
+int board_early_init_r(void)
+{
+ uniphier_board_late_init();
+ return 0;
+}
#endif
}
-static void nand_denali_fixup(void)
-{
-#if defined(CONFIG_NAND_DENALI) && \
- (defined(CONFIG_MACH_PH1_SLD8) || defined(CONFIG_MACH_PH1_PRO4))
- /*
- * The Denali NAND controller on some of UniPhier SoCs does not
- * automatically query the device parameters. For those SoCs,
- * some registers must be set after the device is probed.
- */
- void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;
- struct mtd_info *mtd;
- struct nand_chip *chip;
-
- if (nand_curr_device < 0 ||
- nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE) {
- /* NAND was not detected. Just return. */
- return;
- }
-
- mtd = &nand_info[nand_curr_device];
- chip = mtd->priv;
-
- writel(mtd->erasesize / mtd->writesize, denali_reg + PAGES_PER_BLOCK);
- writel(0, denali_reg + DEVICE_WIDTH);
- writel(mtd->writesize, denali_reg + DEVICE_MAIN_AREA_SIZE);
- writel(mtd->oobsize, denali_reg + DEVICE_SPARE_AREA_SIZE);
- writel(1, denali_reg + DEVICES_CONNECTED);
-
- /*
- * chip->scan_bbt in nand_scan_tail() has been skipped.
- * It should be done in here.
- */
- chip->scan_bbt(mtd);
-#endif
-}
-
int board_late_init(void)
{
puts("MODE: ");
case BOOT_DEVICE_MMC1:
printf("eMMC Boot\n");
setenv("bootmode", "emmcboot");
- nand_denali_fixup();
break;
case BOOT_DEVICE_NAND:
printf("NAND Boot\n");
case BOOT_DEVICE_NOR:
printf("NOR Boot\n");
setenv("bootmode", "norboot");
- nand_denali_fixup();
break;
default:
printf("Unsupported Boot Mode\n");
#define IS_SSC(x) ((IS_SPL_TEXT_AREA(x)) || \
(IS_INIT_STACK_AREA(x)))
#define IS_EXT(x) ((x) < 0x100)
-#define IS_REG(x) (0x500 <= (x) && (x) < 0x700)
+
+/* 0x20000000-0x2fffffff, 0xf0000000-0xffffffff are only used by PH1-sLD3 */
+#define IS_REG(x) (0x200 <= (x) && (x) < 0x300) || \
+ (0x500 <= (x) && (x) < 0x700) || \
+ (0xf00 <= (x))
+
#define IS_DDR(x) (0x800 <= (x) && (x) < 0xf00)
#define MMU_FLAGS(x) (IS_SSC(x)) ? SSC : \
writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
- if (readl(SBBASE0) & 0x1) {
- /*
- * Boot Swap Off: boot from mask ROM
- * 0x00000000-0x01ffffff: mask ROM
- * 0x02000000-0x3effffff: memory bank (31MB)
- * 0x03f00000-0x3fffffff: peripherals (1MB)
- */
- writel(0x0000be01, SBBASE0); /* dummy */
- writel(0x0200be01, SBBASE1);
- } else {
+ if (boot_is_swapped()) {
/*
* Boot Swap On: boot from external NOR/SRAM
* 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff.
* 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals
*/
writel(0x0000bc01, SBBASE0);
+ } else {
+ /*
+ * Boot Swap Off: boot from mask ROM
+ * 0x00000000-0x01ffffff: mask ROM
+ * 0x02000000-0x3effffff: memory bank (31MB)
+ * 0x03f00000-0x3fffffff: peripherals (1MB)
+ */
+ writel(0x0000be01, SBBASE0); /* dummy */
+ writel(0x0200be01, SBBASE1);
}
#elif defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
#if !defined(CONFIG_SPL_BUILD)
}
#endif
+int check_support_card(void)
+{
+ printf("SC: Micro Support Card ");
+ return support_card_show_revision();
+}
+
void support_card_init(void)
{
/*
support_card_reset_deassert();
}
-int check_support_card(void)
-{
- printf("SC: Micro Support Card ");
- return support_card_show_revision();
-}
-
#if defined(CONFIG_SMC911X)
#include <netdev.h>
#if !defined(CONFIG_SYS_NO_FLASH)
#include <mtd/cfi_flash.h>
+#include <asm/arch/sbc-regs.h>
-#if CONFIG_SYS_MAX_FLASH_BANKS > 1
-static phys_addr_t flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS] =
- CONFIG_SYS_FLASH_BANKS_LIST;
+struct memory_bank {
+ phys_addr_t base;
+ unsigned long size;
+};
-phys_addr_t cfi_flash_bank_addr(int i)
-{
- return flash_banks_list[i];
-}
-#endif
-
-int mem_is_flash(phys_addr_t base)
+static int mem_is_flash(const struct memory_bank *mem)
{
const int loop = 128;
u32 *scratch_addr;
int ret = 1;
int i;
- scratch_addr = map_physmem(base + 0x01e00000,
- sizeof(u32) * loop, MAP_NOCACHE);
+ /* just in case, use the tail of the memory bank */
+ scratch_addr = map_physmem(mem->base + mem->size - sizeof(u32) * loop,
+ sizeof(u32) * loop, MAP_NOCACHE);
for (i = 0; i < loop; i++, scratch_addr++) {
saved_value = readl(scratch_addr);
return ret;
}
-int board_flash_wp_on(void)
+#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
+ /* {address, size} */
+static const struct memory_bank memory_banks_boot_swap_off[] = {
+ {0x02000000, 0x01f00000},
+};
+
+static const struct memory_bank memory_banks_boot_swap_on[] = {
+ {0x00000000, 0x01f00000},
+};
+#endif
+
+#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
+static const struct memory_bank memory_banks_boot_swap_off[] = {
+ {0x04000000, 0x04000000},
+};
+
+static const struct memory_bank memory_banks_boot_swap_on[] = {
+ {0x00000000, 0x04000000},
+ {0x04000000, 0x04000000},
+};
+#endif
+
+static const struct memory_bank
+*flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT];
+
+phys_addr_t cfi_flash_bank_addr(int i)
{
- int i;
- int ret = 1;
+ return flash_banks_list[i]->base;
+}
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- if (mem_is_flash(cfi_flash_bank_addr(i))) {
- /*
- * We found at least one flash.
- * We need to return 0 and call flash_init().
- */
- ret = 0;
- }
-#if CONFIG_SYS_MAX_FLASH_BANKS > 1
- else {
- /*
- * We might have a SRAM here.
- * To prevent SRAM data from being destroyed,
- * we set dummy address (SDRAM).
- */
- flash_banks_list[i] = 0x80000000 + 0x10000 * i;
+unsigned long cfi_flash_bank_size(int i)
+{
+ return flash_banks_list[i]->size;
+}
+
+static void detect_num_flash_banks(void)
+{
+ const struct memory_bank *memory_bank, *end;
+
+ cfi_flash_num_flash_banks = 0;
+
+ if (boot_is_swapped()) {
+ memory_bank = memory_banks_boot_swap_on;
+ end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_on);
+ } else {
+ memory_bank = memory_banks_boot_swap_off;
+ end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_off);
+ }
+
+ for (; memory_bank < end; memory_bank++) {
+ if (cfi_flash_num_flash_banks >=
+ CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
+ break;
+
+ if (mem_is_flash(memory_bank)) {
+ flash_banks_list[cfi_flash_num_flash_banks] =
+ memory_bank;
+
+ debug("flash bank found: base = 0x%lx, size = 0x%lx\n",
+ memory_bank->base, memory_bank->size);
+ cfi_flash_num_flash_banks++;
}
-#endif
}
- return ret;
+ debug("number of flash banks: %d\n", cfi_flash_num_flash_banks);
+}
+#else /* ONFIG_SYS_NO_FLASH */
+void detect_num_flash_banks(void)
+{
+};
+#endif /* ONFIG_SYS_NO_FLASH */
+
+void support_card_late_init(void)
+{
+ detect_num_flash_banks();
}
-#endif
tegra124-jetson-tk1.dtb \
tegra124-venice2.dtb
dtb-$(CONFIG_ARCH_UNIPHIER) += \
+ uniphier-ph1-sld3-ref.dtb \
uniphier-ph1-pro4-ref.dtb \
uniphier-ph1-ld4-ref.dtb \
uniphier-ph1-sld8-ref.dtb
bootargs = "console=ttyPS0,115200 earlyprintk";
stdout-path = &uart0;
};
+
+ aliases {
+ uart0 = &uart0;
+ uart1 = &uart1;
+ uart2 = &uart2;
+ uart3 = &uart3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ };
};
&uart0 {
- status = "okay";
+ status = "okay";
};
&uart1 {
- status = "okay";
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ eeprom {
+ compatible = "i2c-eeprom";
+ reg = <0x50>;
+ };
};
&usb0 {
- status = "okay";
+ status = "okay";
};
&usb1 {
- status = "okay";
+ status = "okay";
};
compatible = "panasonic,ph1-ld4";
cpus {
- #size-cells = <0>;
#address-cells = <1>;
+ #size-cells = <0>;
cpu@0 {
device_type = "cpu";
clock-frequency = <36864000>;
};
+ i2c0: i2c@58400000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58400000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@58480000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58480000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@58500000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58500000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@58580000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58580000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
usb0: usb@5a800100 {
compatible = "panasonic,uniphier-ehci", "usb-ehci";
status = "disabled";
status = "disabled";
reg = <0x5a820100 0x100>;
};
+
+ nand: nand@68000000 {
+ compatible = "denali,denali-nand-dt";
+ reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+ reg-names = "nand_data", "denali_reg";
+ };
};
};
bootargs = "console=ttyPS0,115200 earlyprintk";
stdout-path = &uart0;
};
+
+ aliases {
+ uart0 = &uart0;
+ uart1 = &uart1;
+ uart2 = &uart2;
+ uart3 = &uart3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
+ };
};
&uart0 {
- status = "okay";
+ status = "okay";
};
&uart1 {
- status = "okay";
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ eeprom {
+ compatible = "i2c-eeprom";
+ reg = <0x50>;
+ };
};
&usb0 {
- status = "okay";
+ status = "okay";
};
&usb1 {
- status = "okay";
+ status = "okay";
};
compatible = "panasonic,ph1-pro4";
cpus {
- #size-cells = <0>;
#address-cells = <1>;
+ #size-cells = <0>;
cpu@0 {
device_type = "cpu";
clock-frequency = <73728000>;
};
+ i2c0: i2c@58780000 {
+ compatible = "panasonic,uniphier-fi2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58780000 0x80>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@58781000 {
+ compatible = "panasonic,uniphier-fi2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58781000 0x80>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@58782000 {
+ compatible = "panasonic,uniphier-fi2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58782000 0x80>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@58783000 {
+ compatible = "panasonic,uniphier-fi2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58783000 0x80>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ /* i2c4 does not exist */
+
+ i2c5: i2c@58785000 {
+ compatible = "panasonic,uniphier-fi2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58785000 0x80>;
+ clock-frequency = <400000>;
+ status = "ok";
+ };
+
+ i2c6: i2c@58786000 {
+ compatible = "panasonic,uniphier-fi2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58786000 0x80>;
+ clock-frequency = <400000>;
+ status = "ok";
+ };
+
usb0: usb@5a800100 {
compatible = "panasonic,uniphier-ehci", "usb-ehci";
status = "disabled";
status = "disabled";
reg = <0x5a810100 0x100>;
};
+
+ nand: nand@68000000 {
+ compatible = "denali,denali-nand-dt";
+ reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+ reg-names = "nand_data", "denali_reg";
+ };
};
};
--- /dev/null
+/*
+ * Device Tree Source for UniPhier PH1-sLD3 Reference Board
+ *
+ * Copyright (C) 2014 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-sld3.dtsi"
+
+/ {
+ model = "Panasonic UniPhier PH1-sLD3 Reference Board";
+ compatible = "panasonic,ph1-sld3-ref", "panasonic,ph1-sld3";
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyPS0,115200 earlyprintk";
+ stdout-path = &uart0;
+ };
+
+ aliases {
+ uart0 = &uart0;
+ uart1 = &uart1;
+ uart2 = &uart2;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ eeprom {
+ compatible = "i2c-eeprom";
+ reg = <0x50>;
+ };
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
--- /dev/null
+/*
+ * Device Tree Source for UniPhier PH1-sLD3 SoC
+ *
+ * Copyright (C) 2014 Panasonic Corporation
+ * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "panasonic,ph1-sld3";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ uart0: serial@54006800 {
+ compatible = "panasonic,uniphier-uart";
+ status = "disabled";
+ reg = <0x54006800 0x20>;
+ clock-frequency = <36864000>;
+ };
+
+ uart1: serial@54006900 {
+ compatible = "panasonic,uniphier-uart";
+ status = "disabled";
+ reg = <0x54006900 0x20>;
+ clock-frequency = <36864000>;
+ };
+
+ uart2: serial@54006a00 {
+ compatible = "panasonic,uniphier-uart";
+ status = "disabled";
+ reg = <0x54006a00 0x20>;
+ clock-frequency = <36864000>;
+ };
+
+ i2c0: i2c@58400000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58400000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@58480000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58480000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@58500000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58500000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@58580000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58580000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ usb0: usb@5a800100 {
+ compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ status = "disabled";
+ reg = <0x5a800100 0x100>;
+ };
+
+ usb1: usb@5a810100 {
+ compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ status = "disabled";
+ reg = <0x5a810100 0x100>;
+ };
+
+ usb2: usb@5a820100 {
+ compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ status = "disabled";
+ reg = <0x5a820100 0x100>;
+ };
+
+ usb3: usb@5a830100 {
+ compatible = "panasonic,uniphier-ehci", "usb-ehci";
+ status = "disabled";
+ reg = <0x5a830100 0x100>;
+ };
+
+ nand: nand@f8000000 {
+ compatible = "denali,denali-nand-dt";
+ reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;
+ reg-names = "nand_data", "denali_reg";
+ };
+ };
+};
bootargs = "console=ttyPS0,115200 earlyprintk";
stdout-path = &uart0;
};
+
+ aliases {
+ uart0 = &uart0;
+ uart1 = &uart1;
+ uart2 = &uart2;
+ uart3 = &uart3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ };
};
&uart0 {
- status = "okay";
+ status = "okay";
};
&uart1 {
- status = "okay";
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ eeprom {
+ compatible = "i2c-eeprom";
+ reg = <0x50>;
+ };
};
&usb0 {
- status = "okay";
+ status = "okay";
};
&usb1 {
- status = "okay";
+ status = "okay";
};
compatible = "panasonic,ph1-sld8";
cpus {
- #size-cells = <0>;
#address-cells = <1>;
+ #size-cells = <0>;
cpu@0 {
device_type = "cpu";
clock-frequency = <80000000>;
};
+ i2c0: i2c@58400000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58400000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@58480000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58480000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@58500000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58500000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@58580000 {
+ compatible = "panasonic,uniphier-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x58580000 0x40>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
usb0: usb@5a800100 {
compatible = "panasonic,uniphier-ehci", "usb-ehci";
status = "disabled";
status = "disabled";
reg = <0x5a820100 0x100>;
};
+
+ nand: nand@68000000 {
+ compatible = "denali,denali-nand-dt";
+ reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+ reg-names = "nand_data", "denali_reg";
+ };
};
};
* };
*/
+#define BCM2835_MBOX_TAG_GET_BOARD_REV 0x00010002
+
+/*
+ * 0x2..0xf from:
+ * http://raspberryalphaomega.org.uk/2013/02/06/automatic-raspberry-pi-board-revision-detection-model-a-b1-and-b2/
+ * http://www.raspberrypi.org/forums/viewtopic.php?f=63&t=32733
+ * 0x10, 0x11 from swarren's testing
+ */
+#define BCM2835_BOARD_REV_B_I2C0_2 0x2
+#define BCM2835_BOARD_REV_B_I2C0_3 0x3
+#define BCM2835_BOARD_REV_B_I2C1_4 0x4
+#define BCM2835_BOARD_REV_B_I2C1_5 0x5
+#define BCM2835_BOARD_REV_B_I2C1_6 0x6
+#define BCM2835_BOARD_REV_A_7 0x7
+#define BCM2835_BOARD_REV_A_8 0x8
+#define BCM2835_BOARD_REV_A_9 0x9
+#define BCM2835_BOARD_REV_B_REV2_d 0xd
+#define BCM2835_BOARD_REV_B_REV2_e 0xe
+#define BCM2835_BOARD_REV_B_REV2_f 0xf
+#define BCM2835_BOARD_REV_B_PLUS 0x10
+#define BCM2835_BOARD_REV_CM 0x11
+
+struct bcm2835_mbox_tag_get_board_rev {
+ struct bcm2835_mbox_tag_hdr tag_hdr;
+ union {
+ struct {
+ } req;
+ struct {
+ u32 rev;
+ } resp;
+ } body;
+};
+
#define BCM2835_MBOX_TAG_GET_MAC_ADDRESS 0x00010003
struct bcm2835_mbox_tag_get_mac_address {
defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
void support_card_reset(void);
void support_card_init(void);
+void support_card_late_init(void);
int check_support_card(void);
#else
#define support_card_reset() do {} while (0)
#define support_card_init() do {} while (0)
+#define support_card_late_init() do {} while (0)
static inline int check_support_card(void)
{
return 0;
support_card_init();
}
+static inline void uniphier_board_late_init(void)
+{
+ support_card_late_init();
+}
+
#endif /* ARCH_BOARD_H */
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/avr32/cpu/start.o
+
+libs-y += arch/avr32/cpu/
+libs-y += arch/avr32/lib/
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/blackfin/cpu/start.o
+
+libs-y += arch/blackfin/cpu/
+libs-y += arch/blackfin/lib/
#ifdef __KERNEL__
+#include <linux/compiler.h>
#include <asm/blackfin.h>
-#define __iomem
-
static inline void sync(void)
{
SSYNC();
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/m68k/cpu/$(CPU)/start.o
+
+libs-y += arch/m68k/cpu/$(CPU)/
+libs-y += arch/m68k/lib/
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/microblaze/cpu/start.o
+
+libs-y += arch/microblaze/cpu/
+libs-y += arch/microblaze/lib/
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/mips/cpu/$(CPU)/start.o
+
+libs-y += arch/mips/cpu/$(CPU)/
+libs-y += arch/mips/lib/
#ifndef _ASM_MIPS_UNALIGNED_H
#define _ASM_MIPS_UNALIGNED_H
-#include <compiler.h>
+#include <linux/compiler.h>
#if defined(__MIPSEB__)
#define get_unaligned __get_unaligned_be
#define put_unaligned __put_unaligned_be
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/nds32/cpu/$(CPU)/start.o
+
+libs-y += arch/nds32/cpu/$(CPU)/
+libs-y += arch/nds32/lib/
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/nios2/cpu/start.o
+
+libs-y += arch/nios2/cpu/
+libs-y += arch/nios2/lib/
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/openrisc/cpu/start.o
+
+libs-y += arch/openrisc/cpu/
+libs-y += arch/openrisc/lib/
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/powerpc/cpu/$(CPU)/start.o
+head-$(CONFIG_4xx) += arch/powerpc/cpu/ppc4xx/resetvec.o
+head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o
+
+libs-y += arch/powerpc/cpu/$(CPU)/
+libs-y += arch/powerpc/cpu/
+libs-y += arch/powerpc/lib/
config TARGET_ESTEEM192E
bool "Support ESTEEM192E"
-config TARGET_HERMES
- bool "Support hermes"
-
config TARGET_IP860
bool "Support IP860"
source "board/RRvision/Kconfig"
source "board/cogent/Kconfig"
source "board/esteem192e/Kconfig"
-source "board/hermes/Kconfig"
source "board/ip860/Kconfig"
source "board/ivm/Kconfig"
source "board/kup/kup4k/Kconfig"
* I owe him a free beer. - wd]
*/
-#if defined(CONFIG_HERMES) || \
- defined(CONFIG_IP860) || \
+#if defined(CONFIG_IP860) || \
defined(CONFIG_IVML24) || \
defined(CONFIG_IVMS8) || \
defined(CONFIG_LWMON) || \
mac_read_from_eeprom();
#endif
-#ifdef CONFIG_HERMES
- if ((gd->board_type >> 16) == 2)
- bd->bi_ethspeed = gd->board_type & 0xFFFF;
- else
- bd->bi_ethspeed = 0xFFFF;
-#endif
-
#ifdef CONFIG_CMD_NET
/* kept around for legacy kernels only ... ignore the next section */
eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
misc_init_r();
#endif
-#ifdef CONFIG_HERMES
- if (bd->bi_ethspeed != 0xFFFF)
- hermes_start_lxt980((int) bd->bi_ethspeed);
-#endif
-
#if defined(CONFIG_CMD_KGDB)
WATCHDOG_RESET();
puts("KGDB: ");
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/sandbox/cpu/start.o
+
+libs-y += arch/sandbox/cpu/
+libs-y += arch/sandbox/lib/
done:
closedir(dir);
+ free(fname);
return ret;
}
state->write_ram_buf = true;
state->ram_buf_fname = arg;
- if (os_read_ram_buf(arg)) {
+ err = os_read_ram_buf(arg);
+ if (err) {
printf("Failed to read RAM buffer\n");
return err;
}
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/sh/cpu/$(CPU)/start.o
+
+libs-y += arch/sh/cpu/$(CPU)/
+libs-y += arch/sh/lib/
#include <asm/unaligned-sh4a.h>
#else
/* Otherwise, SH can't handle unaligned accesses. */
-#include <compiler.h>
+#include <linux/compiler.h>
#if defined(__BIG_ENDIAN__)
#define get_unaligned __get_unaligned_be
#define put_unaligned __put_unaligned_be
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/sparc/cpu/$(CPU)/start.o
+
+libs-y += arch/sparc/cpu/$(CPU)/
+libs-y += arch/sparc/lib/
--- /dev/null
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+head-y := arch/x86/cpu/start.o
+ifeq ($(CONFIG_SPL_BUILD),y)
+head-y += arch/x86/cpu/start16.o
+head-y += arch/x86/cpu/resetvec.o
+endif
+
+libs-y += arch/x86/cpu/
+libs-y += arch/x86/lib/
* SUCH DAMAGE.
*/
-#include <compiler.h>
+#include <linux/types.h>
+#include <linux/compiler.h>
#include <asm/arch/ipchecksum.h>
unsigned short ipchksum(const void *vptr, unsigned long nbytes)
#define _COREBOOT_SYSINFO_H
#include <common.h>
-#include <compiler.h>
+#include <linux/compiler.h>
#include <libfdt.h>
#include <asm/arch/tables.h>
#ifndef _COREBOOT_TABLES_H
#define _COREBOOT_TABLES_H
-#include <compiler.h>
+#include <linux/compiler.h>
struct cbuint64 {
u32 lo;
#ifndef _ASM_IO_H
#define _ASM_IO_H
-#include <compiler.h>
+#include <linux/compiler.h>
/*
* This file contains the definitions for the x86 IO instructions
/* From glibc-2.14, sysdeps/i386/memset.c */
-#include <compiler.h>
-#include <asm/string.h>
#include <linux/types.h>
+#include <linux/compiler.h>
+#include <asm/string.h>
typedef uint32_t op_t;
+++ /dev/null
-if TARGET_HERMES
-
-config SYS_BOARD
- default "hermes"
-
-config SYS_CONFIG_NAME
- default "hermes"
-
-endif
+++ /dev/null
-HERMES BOARD
-M: Wolfgang Denk <wd@denx.de>
-S: Maintained
-F: board/hermes/
-F: include/configs/hermes.h
-F: configs/hermes_defconfig
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y = hermes.o flash.o
+++ /dev/null
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_byte (flash_info_t *info, ulong dest, uchar data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size;
- int i;
-
- /* Init: no FLASHes known */
- for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN) {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size, size<<20);
- }
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size & 0xFFFF8000);
- memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) |
- (memctl->memc_br0 & ~(BR_BA_MSK));
-
- /* Re-do sizing to get full correct info */
- size = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
- /* monitor protection ON by default */
- flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- flash_info[0].size = size;
-
- return (size);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default: printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i=0; i<info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " "
- );
- }
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
- uchar value;
- vu_char *caddr = (vu_char *)addr;
- ulong base = (ulong)addr;
-
-
- /* Write auto select command: read Manufacturer ID */
- caddr[0x0AAA] = 0xAA;
- caddr[0x0555] = 0x55;
- caddr[0x0AAA] = 0x90;
-
- value = caddr[0];
- switch (value) {
- case (AMD_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_AMD;
- break;
- case (FUJ_MANUFACT & 0xFF):
- info->flash_id = FLASH_MAN_FUJ;
- break;
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- return (0); /* no or unknown flash */
- }
-
- value = caddr[2]; /* device ID */
-
- switch (value) {
- case (AMD_ID_LV400T & 0xFF):
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV400B & 0xFF):
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00080000;
- break; /* => 512 kB */
-
- case (AMD_ID_LV800T & 0xFF):
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV800B & 0xFF):
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case (AMD_ID_LV160T & 0xFF):
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case (AMD_ID_LV160B & 0xFF):
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00200000;
- break; /* => 2 MB */
-#if 0 /* enable when device IDs are available */
- case (AMD_ID_LV320T & 0xFF):
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case (AMD_ID_LV320B & 0xFF):
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
- /* set up sector start address table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++) {
- /* read sector protection: D0 = 1 if protected */
- caddr = (volatile unsigned char *)(info->start[i]);
- info->protect[i] = caddr[4] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN) {
- caddr = (vu_char *)info->start[0];
-
- *caddr = 0xF0; /* reset bank */
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_char *addr = (vu_char*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
- addr[0x0AAA] = 0x80;
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_char*)(info->start[sect]);
- addr[0] = 0x30;
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_char*)(info->start[l_sect]);
- while ((addr[0] & 0x80) != 0x80) {
- if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (vu_char *)info->start[0];
- addr[0] = 0xF0; /* reset bank */
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- int rc;
-
- while (cnt > 0) {
- if ((rc = write_byte(info, addr++, *src++)) != 0) {
- return (rc);
- }
- --cnt;
- }
-
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_byte (flash_info_t *info, ulong dest, uchar data)
-{
- vu_char *addr = (vu_char*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_char *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
- addr[0x0AAA] = 0xAA;
- addr[0x0555] = 0x55;
- addr[0x0AAA] = 0xA0;
-
- *((vu_char *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
- while ((*((vu_char *)dest) & 0x80) != (data & 0x80)) {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
+++ /dev/null
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <commproc.h>
-#include <mpc8xx.h>
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) bootstage_mark(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-static ulong board_init (void);
-static void send_smi_frame (volatile scc_t * sp, volatile cbd_t * bd,
- uchar * msg);
-
-/* ------------------------------------------------------------------------- */
-
-#define _NOT_USED_ 0xFFFFFFFF
-
-const uint sdram_table[] = {
- /*
- * Single Read. (Offset 0 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
- 0x1ff77c47, /* last */
- /*
- * SDRAM Initialization (offset 5 in UPMA RAM)
- *
- * This is no UPM entry point. The following definition uses
- * the remaining space to establish an initialization
- * sequence, which is executed by a RUN command.
- *
- */
- 0x1fe77c35, 0xffaffc34, 0x1fa57c35, /* last */
- /*
- * Burst Read. (Offset 8 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
- 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Single Write. (Offset 18 in UPMA RAM)
- */
- 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Burst Write. (Offset 20 in UPMA RAM)
- */
- 0x1f07fc04, 0xeeaebc00, 0x10ad4c00, 0xf0afcc00,
- 0xf0afcc00, 0xe1bb8c06, 0x1ff77c47, /* last */
- _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Refresh (Offset 30 in UPMA RAM)
- */
- 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
- 0xfffffc84, 0xfffffc07, /* last */
- _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- /*
- * Exception. (Offset 3c in UPMA RAM)
- */
- 0x7ffffc07, /* last */
- _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* ------------------------------------------------------------------------- */
-
-
-/*
- * Check Board Identity:
- *
- * Test ID string (HERMES...)
- *
- * Return code for board revision and network speed
- */
-
-int checkboard (void)
-{
- char buf[64];
- int i;
- int l = getenv_f("serial#", buf, sizeof(buf));
-
- puts ("Board: ");
-
- if (l < 0 || strncmp(buf, "HERMES", 6)) {
- puts ("### No HW ID - assuming HERMES-PRO");
- } else {
- for (i = 0; i < l; i++) {
- if (buf[i] == ' ')
- break;
- putc (buf[i]);
- }
- }
-
- gd->board_type = board_init ();
-
- printf (" Rev. %ld.x\n", (gd->board_type >> 16));
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-phys_size_t initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size, size8, size9;
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /*
- * Preliminary prescaler for refresh
- */
- memctl->memc_mptpr = 0x0400;
-
- memctl->memc_mar = 0x00000088;
-
- /*
- * Map controller banks 1 to the SDRAM banks at preliminary address
- */
- memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
- memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
-
- /* HERMES-PRO boards have only one bank SDRAM */
-
-
- udelay (200);
-
- /* perform SDRAM initializsation sequence */
-
- memctl->memc_mamr = 0xD0802114;
- memctl->memc_mcr = 0x80002105;
- udelay (1);
- memctl->memc_mamr = 0xD0802118;
- memctl->memc_mcr = 0x80002130;
- udelay (1);
- memctl->memc_mamr = 0xD0802114;
- memctl->memc_mcr = 0x80002106;
-
- udelay (1000);
-
- /*
- * Check Bank 0 Memory Size for re-configuration
- *
- * try 8 column mode
- */
- size8 = dram_size (CONFIG_SYS_MAMR_8COL, (long *) SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
-
- udelay (1000);
-
- /*
- * try 9 column mode
- */
- size9 = dram_size (CONFIG_SYS_MAMR_9COL, (long *) SDRAM_BASE_PRELIM,
- SDRAM_MAX_SIZE);
-
- if (size8 < size9) { /* leave configuration at 9 columns */
- size = size9;
-/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
- } else { /* back to 8 columns */
- size = size8;
- memctl->memc_mamr = CONFIG_SYS_MAMR_8COL;
- udelay (500);
-/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
- }
-
- udelay (1000);
-
- memctl->memc_or1 = ((-size) & 0xFFFF0000) | SDRAM_TIMING;
- memctl->memc_br1 = (CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
- udelay (10000);
-
- return (size);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_mamr = mamr_value;
-
- return (get_ram_size(base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#define PB_LED_3 0x00020000 /* Status LED's */
-#define PB_LED_2 0x00010000
-#define PB_LED_1 0x00008000
-#define PB_LED_0 0x00004000
-
-#define PB_LED_ALL (PB_LED_0 | PB_LED_1 | PB_LED_2 | PB_LED_3)
-
-#define PC_REP_SPD1 0x00000800
-#define PC_REP_SPD0 0x00000400
-
-#define PB_RESET_2081 0x00000020 /* Reset PEB2081 */
-
-#define PB_MAI_4 0x00000010 /* Configuration */
-#define PB_MAI_3 0x00000008
-#define PB_MAI_2 0x00000004
-#define PB_MAI_1 0x00000002
-#define PB_MAI_0 0x00000001
-
-#define PB_MAI_ALL (PB_MAI_0 | PB_MAI_1 | PB_MAI_2 | PB_MAI_3 | PB_MAI_4)
-
-
-#define PC_REP_MGRPRS 0x0200
-#define PC_REP_SPD 0x0040 /* Select 100 Mbps */
-#define PC_REP_RES 0x0004
-#define PC_BIT14 0x0002 /* ??? */
-#define PC_BIT15 0x0001 /* ??? ENDSL ?? */
-
-/* ------------------------------------------------------------------------- */
-
-static ulong board_init (void)
-{
- volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
- ulong reg, revision, speed = 100;
- int ethspeed;
- char *s;
-
- if ((s = getenv ("ethspeed")) != NULL) {
- if (strcmp (s, "100") == 0) {
- ethspeed = 100;
- } else if (strcmp (s, "10") == 0) {
- ethspeed = 10;
- } else {
- ethspeed = 0;
- }
- } else {
- ethspeed = 0;
- }
-
- /* Configure Port B Output Pins => 0x0003cc3F */
- reg = PB_LED_ALL | PC_REP_SPD1 | PC_REP_SPD0 | PB_RESET_2081 |
- PB_MAI_ALL;
- immr->im_cpm.cp_pbpar &= ~reg;
- immr->im_cpm.cp_pbodr &= ~reg;
- immr->im_cpm.cp_pbdat &= ~reg; /* all 0 */
- immr->im_cpm.cp_pbdir |= reg;
-
- /* Check hardware revision */
- if ((immr->im_ioport.iop_pcdat & 0x0003) == 0x0003) {
- /*
- * Revision 3.x hardware
- */
- revision = 3;
-
- immr->im_ioport.iop_pcdat = 0x0240;
- immr->im_ioport.iop_pcdir = (PC_REP_MGRPRS | PC_REP_SPD | PC_REP_RES | PC_BIT14); /* = 0x0246 */
- immr->im_ioport.iop_pcdat |= PC_REP_RES;
- } else {
- immr->im_ioport.iop_pcdat = 0x0002;
- immr->im_ioport.iop_pcdir = (PC_REP_MGRPRS | PC_REP_RES | PC_BIT14 | PC_BIT15); /* = 0x0207 */
-
- if ((immr->im_ioport.iop_pcdat & PC_REP_SPD) == 0) {
- /*
- * Revision 2.x hardware: PC9 connected to PB21
- */
- revision = 2;
-
- if (ethspeed == 0) {
- /* both 10 and 100 Mbps allowed:
- * select 10 Mbps and autonegotiation
- */
- puts (" [10+100]");
- immr->im_cpm.cp_pbdat = 0; /* SPD1:SPD0 = 0:0 - autonegot. */
- speed = 10;
- } else if (ethspeed == 10) {
- /* we are asked for 10 Mbps,
- * so select 10 Mbps
- */
- puts (" [10]");
- immr->im_cpm.cp_pbdat = 0; /* ??? */
- speed = 10;
- } else {
- /* anything else:
- * select 100 Mbps
- */
- puts (" [100]");
- immr->im_cpm.cp_pbdat = PC_REP_SPD0 | PC_REP_SPD1;
- /* SPD1:SPD0 = 1:1 - 100 Mbps */
- speed = 100;
- }
- immr->im_ioport.iop_pcdat |= (PC_REP_RES | PC_BIT14);
-
- /* must be run from RAM */
- /* start_lxt980 (speed); */
- /*************************/
- } else {
- /*
- * Revision 1.x hardware
- */
- revision = 1;
-
- immr->im_ioport.iop_pcdat = PC_REP_MGRPRS | PC_BIT14; /* = 0x0202 */
- immr->im_ioport.iop_pcdir = (PC_REP_MGRPRS | PC_REP_SPD | PC_REP_RES | PC_BIT14 | PC_BIT15); /* = 0x0247 */
-
- if (ethspeed == 0) {
- /* both 10 and 100 Mbps allowed:
- * select 100 Mbps and autonegotiation
- */
- puts (" [10+100]");
- immr->im_cpm.cp_pbdat = 0; /* SPD1:SPD0 = 0:0 - autonegot. */
- immr->im_ioport.iop_pcdat |= PC_REP_SPD;
- } else if (ethspeed == 10) {
- /* we are asked for 10 Mbps,
- * so select 10 Mbps
- */
- puts (" [10]");
- immr->im_cpm.cp_pbdat = PC_REP_SPD0; /* SPD1:SPD0 = 0:1 - 10 Mbps */
- } else {
- /* anything else:
- * select 100 Mbps
- */
- puts (" [100]");
- immr->im_cpm.cp_pbdat = PC_REP_SPD0 | PC_REP_SPD1;
- /* SPD1:SPD0 = 1:1 - 100 Mbps */
- immr->im_ioport.iop_pcdat |= PC_REP_SPD;
- }
-
- immr->im_ioport.iop_pcdat |= PC_REP_RES;
- }
- }
- SHOW_BOOT_PROGRESS(BOOTSTAGE_ID_CHECK_MAGIC);
-
- return ((revision << 16) | (speed & 0xFFFF));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#define SCC_SM 1 /* Index => SCC2 */
-#define PROFF PROFF_SCC2
-
-#define SMI_MSGLEN 8 /* Length of SMI Messages */
-
-#define PHYGPCR_ADDR 0x109 /* Port Enable */
-#define PHYPCR_ADDR 0x132 /* PHY Port Control Reg. (port 1) */
-#define LEDPCR_ADDR 0x141 /* LED Port Control Reg. */
-#define RPRESET_ADDR 0x144 /* Repeater Reset */
-
-#define PHYPCR_SPEED 0x2000 /* on for 100 Mbps, off for 10 Mbps */
-#define PHYPCR_AN 0x1000 /* on to enable Auto-Negotiation */
-#define PHYPCR_REST_AN 0x0200 /* on to restart Auto-Negotiation */
-#define PHYPCR_FDX 0x0100 /* on for Full Duplex, off for HDX */
-#define PHYPCR_COLT 0x0080 /* on to enable COL signal test */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Must run from RAM:
- * uses parameter RAM area which is used for stack while running from ROM
- */
-void hermes_start_lxt980 (int speed)
-{
- volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
- volatile cpm8xx_t *cp = (cpm8xx_t *) & (immr->im_cpm);
- volatile scc_t *sp = (scc_t *) & (cp->cp_scc[SCC_SM]);
- volatile cbd_t *bd;
- volatile hdlc_pram_t *hp;
- uchar smimsg[SMI_MSGLEN];
- ushort phypcrval;
- uint bd_off;
- int pnr;
-
- printf ("LXT9880: %3d Mbps\n", speed);
-
- immr->im_ioport.iop_paodr |= 0x0008; /* init PAODR: PA12 (TXD2) open drain */
- immr->im_ioport.iop_papar |= 0x400c; /* init PAPAR: TXD2, RXD2, BRGO4 */
- immr->im_ioport.iop_padir &= 0xbff3; /* init PADIR: BRGO4 */
- immr->im_ioport.iop_padir |= 0x4000;
-
- /* get temporary BD; no need for permanent alloc */
- bd_off = dpram_base_align (8);
-
- bd = (cbd_t *) (immr->im_cpm.cp_dpmem + bd_off);
-
- bd->cbd_bufaddr = 0;
- bd->cbd_datlen = 0;
- bd->cbd_sc = BD_SC_WRAP | BD_SC_LAST | BD_SC_INTRPT | BD_SC_TC;
-
- /* init. baudrate generator BRG4 */
- cp->cp_brgc4 = (0x00010000 | (50 << 1)); /* output 1 MHz */
-
- cp->cp_sicr &= 0xFFFF00FF; /* SICR: mask SCC2 */
- cp->cp_sicr |= 0x00001B00; /* SICR: SCC2 clk BRG4 */
-
- /* init SCC_SM register */
- sp->scc_psmr = 0x0000; /* init PSMR: no additional flags */
- sp->scc_todr = 0x0000;
- sp->scc_dsr = 0x7e7e;
-
- /* init. SCC_SM parameter area */
- hp = (hdlc_pram_t *) & cp->cp_dparam[PROFF];
-
- hp->tbase = bd_off; /* offset from beginning of DPRAM */
-
- hp->rfcr = 0x18;
- hp->tfcr = 0x18;
- hp->mrblr = 10;
-
- hp->c_mask = 0x0000f0b8;
- hp->c_pres = 0x0000ffff;
-
- hp->disfc = 0;
- hp->crcec = 0;
- hp->abtsc = 0;
- hp->nmarc = 0;
- hp->retrc = 0;
-
- hp->mflr = 10;
-
- hp->rfthr = 1;
-
- hp->hmask = 0;
- hp->haddr1 = 0;
- hp->haddr2 = 0;
- hp->haddr3 = 0;
- hp->haddr4 = 0;
-
- cp->cp_cpcr = SCC_SM << 6 | 0x0001; /* SCC_SM: init TX/RX params */
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* clear all outstanding SCC events */
- sp->scc_scce = ~0;
-
- /* enable transmitter: GSMR_L: TPL=2(16bits), TPP=3(all ones), ENT */
- sp->scc_gsmrh = 0;
- sp->scc_gsmrl |= SCC_GSMRL_TPL_16 | SCC_GSMRL_TPP_ALL1 |
- SCC_GSMRL_ENT | SCC_GSMRL_MODE_HDLC;
-
-#if 0
- smimsg[0] = 0x00; /* CHIP/HUB ID */
- smimsg[1] = 0x38; /* WRITE CMD */
- smimsg[2] = (RPRESET_ADDR << 4) & 0xf0;
- smimsg[3] = RPRESET_ADDR >> 4;
- smimsg[4] = 0x01;
- smimsg[5] = 0x00;
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-#endif
-
- smimsg[0] = 0x7f; /* BROADCAST */
- smimsg[1] = 0x34; /* ASSIGN HUB ID */
- smimsg[2] = 0x00;
- smimsg[3] = 0x00;
- smimsg[4] = 0x00; /* HUB ID = 0 */
- smimsg[5] = 0x00;
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-
- smimsg[0] = 0x7f; /* BROADCAST */
- smimsg[1] = 0x3c; /* SET ARBOUT TO 0 */
- smimsg[2] = 0x00; /* ADDRESS = 0 */
- smimsg[3] = 0x00;
- smimsg[4] = 0x00; /* DATA = 0 */
- smimsg[5] = 0x00;
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-
- if (speed == 100) {
- phypcrval = PHYPCR_SPEED; /* 100 MBIT, disable autoneg. */
- } else {
- phypcrval = 0; /* 10 MBIT, disable autoneg. */
- }
-
- /* send MSGs */
- for (pnr = 0; pnr < 8; pnr++) {
- smimsg[0] = 0x00; /* CHIP/HUB ID */
- smimsg[1] = 0x38; /* WRITE CMD */
- smimsg[2] = ((PHYPCR_ADDR + pnr) << 4) & 0xf0;
- smimsg[3] = (PHYPCR_ADDR + pnr) >> 4;
- smimsg[4] = (unsigned char) (phypcrval & 0xff);
- smimsg[5] = (unsigned char) (phypcrval >> 8);
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
- }
-
- smimsg[0] = 0x00; /* CHIP/HUB ID */
- smimsg[1] = 0x38; /* WRITE CMD */
- smimsg[2] = (PHYGPCR_ADDR << 4) & 0xf0;
- smimsg[3] = PHYGPCR_ADDR >> 4;
- smimsg[4] = 0xff; /* enable port 1-8 */
- smimsg[5] = 0x01; /* enable MII1 (0x01) */
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-
- smimsg[0] = 0x00; /* CHIP/HUB ID */
- smimsg[1] = 0x38; /* WRITE CMD */
- smimsg[2] = (LEDPCR_ADDR << 4) & 0xf0;
- smimsg[3] = LEDPCR_ADDR >> 4;
- smimsg[4] = 0xaa; /* Port 1-8 Conf.bits = 10 (Hardware control) */
- smimsg[5] = 0xaa;
- smimsg[6] = 0x00;
- smimsg[7] = 0x00;
-
- send_smi_frame (sp, bd, smimsg);
-
- /*
- * Disable Transmitter (so that we can free the BD, too)
- */
- sp->scc_gsmrl &= ~SCC_GSMRL_ENT;
-}
-
-/* ------------------------------------------------------------------------- */
-
-static void send_smi_frame (volatile scc_t * sp, volatile cbd_t * bd,
- uchar * msg)
-{
-#ifdef DEBUG
- unsigned hub, chip, cmd, length, addr;
-
- hub = msg[0] & 0x1F;
- chip = msg[0] >> 5;
- cmd = msg[1] & 0x1F;
- length = (msg[1] >> 5) | ((msg[2] & 0x0F) << 3);
- addr = (msg[2] >> 4) | (msg[3] << 4);
-
- printf ("SMI send: Hub %02x Chip %x Cmd %02x Len %d Addr %03x: "
- "%02x %02x %02x %02x\n",
- hub, chip, cmd, length, addr, msg[4], msg[5], msg[6], msg[7]);
-#endif /* DEBUG */
-
- bd->cbd_bufaddr = (uint) msg;
- bd->cbd_datlen = SMI_MSGLEN;
- bd->cbd_sc |= BD_SC_READY;
-
- /* wait for msg transmitted */
- while ((sp->scc_scce & 0x0002) == 0);
- /* clear all events */
- sp->scc_scce = ~0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-void show_boot_progress (int status)
-{
- volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
-
- /* let things compatible */
- if (status < -BOOTSTAGE_ID_POST_FAIL_R)
- status = -1;
- status ^= 0x0F;
- status = (status & 0x0F) << 14;
- immr->im_cpm.cp_pbdat = (immr->im_cpm.cp_pbdat & ~PB_LED_ALL) | status;
-}
-
-/* ------------------------------------------------------------------------- */
+++ /dev/null
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
- arch/powerpc/cpu/mpc8xx/start.o (.text*)
- arch/powerpc/cpu/mpc8xx/traps.o (.text*)
- board/hermes/built-in.o (.text*)
-
- . = env_offset;
- common/env_embedded.o (.text*)
-
- *(.text*)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- _GOT2_TABLE_ = .;
- KEEP(*(.got2))
- KEEP(*(.got))
- PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
- _FIXUP_TABLE_ = .;
- KEEP(*(.fixup))
- }
- __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data*)
- *(.sdata*)
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- *(.bss*)
- *(.sbss*)
- *(COMMON)
- . = ALIGN(4);
- }
- __bss_end = . ;
- PROVIDE (end = .);
-}
+++ /dev/null
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- arch/powerpc/cpu/mpc8xx/start.o (.text)
- arch/powerpc/lib/ppcstring.o (.text)
- arch/powerpc/cpu/mpc8xx/interrupts.o (.text)
- arch/powerpc/lib/time.o (.text)
- arch/powerpc/lib/ticks.o (.text)
- . = env_offset;
- common/env_embedded.o(.text)
-
- *(.text)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- __bss_end = . ;
- PROVIDE (end = .);
-}
-if TARGET_RPI_B
+if TARGET_RPI
config SYS_BOARD
- default "rpi_b"
+ default "rpi"
config SYS_VENDOR
default "raspberrypi"
default "bcm2835"
config SYS_CONFIG_NAME
- default "rpi_b"
+ default "rpi"
endif
--- /dev/null
+RPI BOARD
+M: Stephen Warren <swarren@wwwdotorg.org>
+S: Maintained
+F: board/raspberrypi/rpi/
+F: include/configs/rpi.h
+F: configs/rpi_defconfig
# GNU General Public License for more details.
#
-obj-y := rpi_b.o
+obj-y := rpi.o
u32 end_tag;
};
+struct msg_get_board_rev {
+ struct bcm2835_mbox_hdr hdr;
+ struct bcm2835_mbox_tag_get_board_rev get_board_rev;
+ u32 end_tag;
+};
+
struct msg_get_mac_address {
struct bcm2835_mbox_hdr hdr;
struct bcm2835_mbox_tag_get_mac_address get_mac_address;
u32 end_tag;
};
+/* See comments in mbox.h for data source */
+static const struct {
+ const char *name;
+ const char *fdtfile;
+} models[] = {
+ [BCM2835_BOARD_REV_B_I2C0_2] = {
+ "Model B (no P5)",
+ "bcm2835-rpi-b-i2c0.dtb",
+ },
+ [BCM2835_BOARD_REV_B_I2C0_3] = {
+ "Model B (no P5)",
+ "bcm2835-rpi-b-i2c0.dtb",
+ },
+ [BCM2835_BOARD_REV_B_I2C1_4] = {
+ "Model B",
+ "bcm2835-rpi-b.dtb",
+ },
+ [BCM2835_BOARD_REV_B_I2C1_5] = {
+ "Model B",
+ "bcm2835-rpi-b.dtb",
+ },
+ [BCM2835_BOARD_REV_B_I2C1_6] = {
+ "Model B",
+ "bcm2835-rpi-b.dtb",
+ },
+ [BCM2835_BOARD_REV_A_7] = {
+ "Model A",
+ "bcm2835-rpi-a.dtb",
+ },
+ [BCM2835_BOARD_REV_A_8] = {
+ "Model A",
+ "bcm2835-rpi-a.dtb",
+ },
+ [BCM2835_BOARD_REV_A_9] = {
+ "Model A",
+ "bcm2835-rpi-a.dtb",
+ },
+ [BCM2835_BOARD_REV_B_REV2_d] = {
+ "Model B rev2",
+ "bcm2835-rpi-b-rev2.dtb",
+ },
+ [BCM2835_BOARD_REV_B_REV2_e] = {
+ "Model B rev2",
+ "bcm2835-rpi-b-rev2.dtb",
+ },
+ [BCM2835_BOARD_REV_B_REV2_f] = {
+ "Model B rev2",
+ "bcm2835-rpi-b-rev2.dtb",
+ },
+ [BCM2835_BOARD_REV_B_PLUS] = {
+ "Model B+",
+ "bcm2835-rpi-b-plus.dtb",
+ },
+ [BCM2835_BOARD_REV_CM] = {
+ "Compute Module",
+ "bcm2835-rpi-cm.dtb",
+ },
+};
+
+u32 rpi_board_rev = 0;
+
int dram_init(void)
{
ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16);
return 0;
}
-int misc_init_r(void)
+static void set_fdtfile(void)
+{
+ const char *fdtfile;
+
+ if (getenv("fdtfile"))
+ return;
+
+ fdtfile = models[rpi_board_rev].fdtfile;
+ if (!fdtfile)
+ fdtfile = "bcm2835-rpi-other.dtb";
+
+ setenv("fdtfile", fdtfile);
+}
+
+static void set_usbethaddr(void)
{
ALLOC_ALIGN_BUFFER(struct msg_get_mac_address, msg, 1, 16);
int ret;
if (getenv("usbethaddr"))
- return 0;
+ return;
BCM2835_MBOX_INIT_HDR(msg);
BCM2835_MBOX_INIT_TAG(&msg->get_mac_address, GET_MAC_ADDRESS);
if (ret) {
printf("bcm2835: Could not query MAC address\n");
/* Ignore error; not critical */
- return 0;
+ return;
}
eth_setenv_enetaddr("usbethaddr", msg->get_mac_address.body.resp.mac);
+ return;
+}
+
+int misc_init_r(void)
+{
+ set_fdtfile();
+ set_usbethaddr();
return 0;
}
return 0;
}
+static void get_board_rev(void)
+{
+ ALLOC_ALIGN_BUFFER(struct msg_get_board_rev, msg, 1, 16);
+ int ret;
+ const char *name;
+
+ BCM2835_MBOX_INIT_HDR(msg);
+ BCM2835_MBOX_INIT_TAG(&msg->get_board_rev, GET_BOARD_REV);
+
+ ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr);
+ if (ret) {
+ printf("bcm2835: Could not query board revision\n");
+ /* Ignore error; not critical */
+ return;
+ }
+
+ rpi_board_rev = msg->get_board_rev.body.resp.rev;
+ if (rpi_board_rev >= ARRAY_SIZE(models))
+ rpi_board_rev = 0;
+
+ name = models[rpi_board_rev].name;
+ if (!name)
+ name = "Unknown model";
+ printf("RPI model: %s\n", name);
+}
+
int board_init(void)
{
+ get_board_rev();
+
gd->bd->bi_boot_params = 0x100;
return power_on_module(BCM2835_MBOX_POWER_DEVID_USB_HCD);
+++ /dev/null
-RPI_B BOARD
-M: Stephen Warren <swarren@wwwdotorg.org>
-S: Maintained
-F: board/raspberrypi/rpi_b/
-F: include/configs/rpi_b.h
-F: configs/rpi_b_defconfig
{
ulong flash_size = 0;
bd_t *bd = gd->bd;
- int ok;
puts("Flash: ");
- if (board_flash_wp_on()) {
+ if (board_flash_wp_on())
printf("Uninitialized - Write Protect On\n");
- /* Since WP is on, we can't find real size. Set to 0 */
- ok = 1;
- } else {
+ else
flash_size = flash_init();
- ok = flash_size > 0;
- }
- if (!ok) {
- puts("*** failed ***\n");
-#ifdef CONFIG_PPC
- /* Why does PPC do this? */
- hang();
-#endif
- return -1;
- }
+
print_size(flash_size, "");
#ifdef CONFIG_SYS_FLASH_CHECKSUM
/*
return 0;
}
-#ifdef CONFIG_HERMES
-static int initr_hermes(void)
-{
- if ((gd->board_type >> 16) == 2)
- gd->bd->bi_ethspeed = gd->board_type & 0xFFFF;
- else
- gd->bd->bi_ethspeed = 0xFFFF;
- return 0;
-}
-
-static int initr_hermes_start(void)
-{
- if (gd->bd->bi_ethspeed != 0xFFFF)
- hermes_start_lxt980((int) gd->bd->bi_ethspeed);
- return 0;
-}
-#endif
-
#ifdef CONFIG_SC3
/* TODO: with new initcalls, move this into the driver */
extern void sc3_read_eeprom(void);
#ifdef CONFIG_SC3
initr_sc3_read_eeprom,
#endif
-#ifdef CONFIG_HERMES
- initr_hermes,
-#endif
#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
mac_read_from_eeprom,
#endif
#endif
#ifdef CONFIG_MISC_INIT_R
misc_init_r, /* miscellaneous platform-dependent init */
-#endif
-#ifdef CONFIG_HERMES
- initr_hermes_start,
#endif
INIT_FUNC_WATCHDOG_RESET
#ifdef CONFIG_CMD_KGDB
print_eth(5);
#endif
-#ifdef CONFIG_HERMES
- print_mhz("ethspeed", bd->bi_ethspeed);
-#endif
printf("IP addr = %s\n", getenv("ipaddr"));
printf("baudrate = %6u bps\n", gd->baudrate);
print_num("relocaddr", gd->relocaddr);
err:
puts("ERROR\n");
- return ret;
+ return CMD_RET_FAILURE;
}
U_BOOT_CMD(
#include <dataflash.h>
#endif
#include <hash.h>
+#include <inttypes.h>
#include <watchdog.h>
#include <asm/io.h>
#include <linux/compiler.h>
if (word1 != word2) {
ulong offset = buf1 - base;
#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
- printf("%s at 0x%p (%#0*llx) != %s at 0x%p (%#0*llx)\n",
+ printf("%s at 0x%p (%#0*"PRIx64") != %s at 0x%p (%#0*"
+ PRIx64 ")\n",
type, (void *)(addr1 + offset), size, word1,
type, (void *)(addr2 + offset), size, word2);
#else
printf(" %08x", *((u32 *)ptr));
#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
else if (size == 8)
- printf(" %016llx", *((u64 *)ptr));
+ printf(" %016" PRIx64, *((u64 *)ptr));
#endif
else if (size == 2)
printf(" %04x", *((u16 *)ptr));
*/
switch (file) {
case stdin:
- gd->jt[XF_getc] = dev->getc;
- gd->jt[XF_tstc] = dev->tstc;
+ gd->jt[XF_getc] = getc;
+ gd->jt[XF_tstc] = tstc;
break;
case stdout:
- gd->jt[XF_putc] = dev->putc;
- gd->jt[XF_puts] = dev->puts;
+ gd->jt[XF_putc] = putc;
+ gd->jt[XF_puts] = puts;
gd->jt[XF_printf] = printf;
break;
}
*/
#include <common.h>
+#include <inttypes.h>
#include <stdio_dev.h>
#include <linux/ctype.h>
#include <linux/types.h>
fdt_delprop(blob, off, alias);
}
-#define PRu64 "%llx"
-
/* Max address size we deal with */
#define OF_MAX_ADDR_CELLS 4
#define OF_BAD_ADDR ((u64)-1)
s = of_read_number(range + na + pna, ns);
da = of_read_number(addr, na);
- debug("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n",
- cp, s, da);
+ debug("OF: default map, cp=%" PRIu64 ", s=%" PRIu64
+ ", da=%" PRIu64 "\n", cp, s, da);
if (da < cp || da >= (cp + s))
return OF_BAD_ADDR;
finish:
of_dump_addr("OF: parent translation for:", addr, pna);
- debug("OF: with offset: "PRu64"\n", offset);
+ debug("OF: with offset: %" PRIu64 "\n", offset);
/* Translate it into parent bus space */
return pbus->translate(addr, offset, pna);
dt_addr = fdt_translate_address(fdt, node, reg);
if (addr != dt_addr) {
- printf("Warning: U-Boot configured device %s at address %llx,\n"
- " but the device tree has it address %llx.\n",
- alias, addr, dt_addr);
+ printf("Warning: U-Boot configured device %s at address %"
+ PRIx64 ",\n but the device tree has it address %"
+ PRIx64 ".\n", alias, addr, dt_addr);
return 0;
}
int fdt_noffset;
#endif
const char *select = NULL;
+ int ok_no_fdt = 0;
*of_flat_tree = NULL;
*of_size = 0;
fdt_addr);
fdt_hdr = image_get_fdt(fdt_addr);
if (!fdt_hdr)
- goto error;
+ goto no_fdt;
/*
* move image data to the load address,
break;
default:
puts("ERROR: Did not find a cmdline Flattened Device Tree\n");
- goto error;
+ goto no_fdt;
}
printf(" Booting using the fdt blob at %#08lx\n", fdt_addr);
}
} else {
debug("## No Flattened Device Tree\n");
- return 0;
+ goto no_fdt;
}
} else {
debug("## No Flattened Device Tree\n");
- return 0;
+ goto no_fdt;
}
*of_flat_tree = fdt_blob;
return 0;
+no_fdt:
+ ok_no_fdt = 1;
error:
*of_flat_tree = NULL;
*of_size = 0;
+ if (!select && ok_no_fdt) {
+ debug("Continuing to boot without FDT\n");
+ return 0;
+ }
return 1;
}
lcd_ctrl_init(lcdbase);
/*
- * lcd_ctrl_init() of some drivers (i.e. bcm2835 on rpi_b) ignores
+ * lcd_ctrl_init() of some drivers (i.e. bcm2835 on rpi) ignores
* the 'lcdbase' argument and uses custom lcd base address
* by setting up gd->fb_base. Check for this condition and fixup
* 'lcd_base' address.
DECLARE_GLOBAL_DATA_PTR;
-static int mmc_load_image_raw(struct mmc *mmc, unsigned long sector)
+static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
{
unsigned long err;
u32 image_size_sectors;
return (err == 0);
}
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
+static int mmc_load_image_raw_partition(struct mmc *mmc, int partition)
+{
+ disk_partition_t info;
+
+ if (get_partition_info(&mmc->block_dev, partition, &info)) {
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+ printf("spl: partition error\n");
+#endif
+ return -1;
+ }
+
+ return mmc_load_image_raw_sector(mmc, info.start);
+}
+#endif
+
#ifdef CONFIG_SPL_OS_BOOT
static int mmc_load_image_raw_os(struct mmc *mmc)
{
return -1;
}
- return mmc_load_image_raw(mmc, CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR);
+ return mmc_load_image_raw_sector(mmc,
+ CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR);
}
#endif
#ifdef CONFIG_SPL_OS_BOOT
if (spl_start_uboot() || mmc_load_image_raw_os(mmc))
#endif
- err = mmc_load_image_raw(mmc,
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
+ err = mmc_load_image_raw_partition(mmc,
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);
+#else
+ err = mmc_load_image_raw_sector(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
+#endif
#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
- } else if (boot_mode == MMCSD_MODE_FS) {
+ }
+ if (err || boot_mode == MMCSD_MODE_FS) {
debug("boot mode - FS\n");
#ifdef CONFIG_SPL_FAT_SUPPORT
#ifdef CONFIG_SPL_OS_BOOT
if (spl_start_uboot() || spl_load_image_fat_os(&mmc->block_dev,
- CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION))
+ CONFIG_SYS_MMCSD_FS_BOOT_PARTITION))
#endif
err = spl_load_image_fat(&mmc->block_dev,
- CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION,
+ CONFIG_SYS_MMCSD_FS_BOOT_PARTITION,
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
if(err)
#endif /* CONFIG_SPL_FAT_SUPPORT */
#ifdef CONFIG_SPL_EXT_SUPPORT
#ifdef CONFIG_SPL_OS_BOOT
if (spl_start_uboot() || spl_load_image_ext_os(&mmc->block_dev,
- CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION))
+ CONFIG_SYS_MMCSD_FS_BOOT_PARTITION))
#endif
err = spl_load_image_ext(&mmc->block_dev,
- CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION,
+ CONFIG_SYS_MMCSD_FS_BOOT_PARTITION,
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
#endif /* CONFIG_SPL_EXT_SUPPORT */
}
#ifdef CONFIG_SPL_OS_BOOT
if (spl_start_uboot() || mmc_load_image_raw_os(mmc))
#endif
- err = mmc_load_image_raw(mmc,
+ err = mmc_load_image_raw_sector(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
#endif
} else {
#include <linux/ctype.h>
#include <asm/byteorder.h>
#include <asm/unaligned.h>
-#include <compiler.h>
#include <errno.h>
#include <usb.h>
#ifdef CONFIG_4xx
+++ /dev/null
-CONFIG_PPC=y
-CONFIG_8xx=y
-CONFIG_TARGET_HERMES=y
+S:CONFIG_ARM=y
+S:CONFIG_ARCH_UNIPHIER=y
+S:CONFIG_MACH_PH1_LD4=y
++S:CONFIG_DCC_MICRO_SUPPORT_CARD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BDI=y
CONFIG_CMD_CONSOLE=y
+S:CONFIG_ARM=y
+S:CONFIG_ARCH_UNIPHIER=y
+S:CONFIG_MACH_PH1_PRO4=y
++S:CONFIG_DCC_MICRO_SUPPORT_CARD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BDI=y
CONFIG_CMD_CONSOLE=y
+S:CONFIG_ARM=y
+S:CONFIG_ARCH_UNIPHIER=y
+S:CONFIG_MACH_PH1_SLD8=y
++S:CONFIG_DCC_MICRO_SUPPORT_CARD=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BDI=y
CONFIG_CMD_CONSOLE=y
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_TARGET_RPI_B=y
--- /dev/null
+CONFIG_ARM=y
+CONFIG_TARGET_RPI=y
#include <common.h>
#include <command.h>
#include <ide.h>
+#include <inttypes.h>
#include <malloc.h>
#include <part_efi.h>
#include <linux/ctype.h>
/* Check that the my_lba entry points to the LBA that contains the GPT */
if (le64_to_cpu(pgpt_head->my_lba) != lba) {
- printf("GPT: my_lba incorrect: %llX != %llX\n",
- le64_to_cpu(pgpt_head->my_lba),
- lba);
+ printf("GPT: my_lba incorrect: %llX != %" PRIX64 "\n",
+ le64_to_cpu(pgpt_head->my_lba),
+ lba);
return 0;
}
/* Check the first_usable_lba and last_usable_lba are within the disk. */
lastlba = (u64)dev_desc->lba;
if (le64_to_cpu(pgpt_head->first_usable_lba) > lastlba) {
- printf("GPT: first_usable_lba incorrect: %llX > %llX\n",
- le64_to_cpu(pgpt_head->first_usable_lba), lastlba);
+ printf("GPT: first_usable_lba incorrect: %llX > %" PRIX64 "\n",
+ le64_to_cpu(pgpt_head->first_usable_lba), lastlba);
return 0;
}
if (le64_to_cpu(pgpt_head->last_usable_lba) > lastlba) {
- printf("GPT: last_usable_lba incorrect: %llX > %llX\n",
- le64_to_cpu(pgpt_head->last_usable_lba), lastlba);
+ printf("GPT: last_usable_lba incorrect: %llX > %" PRIX64 "\n",
+ le64_to_cpu(pgpt_head->last_usable_lba), lastlba);
return 0;
}
- debug("GPT: first_usable_lba: %llX last_usable_lba %llX last lba %llX\n",
- le64_to_cpu(pgpt_head->first_usable_lba),
- le64_to_cpu(pgpt_head->last_usable_lba), lastlba);
+ debug("GPT: first_usable_lba: %llX last_usable_lba %llX last lba %"
+ PRIX64 "\n", le64_to_cpu(pgpt_head->first_usable_lba),
+ le64_to_cpu(pgpt_head->last_usable_lba), lastlba);
/* Read and allocate Partition Table Entries */
*pgpt_pte = alloc_read_gpt_entries(dev_desc, pgpt_head);
To compile U-Boot with clang on linux without IAS use e.g.:
export TRIPLET=arm-linux-gnueabi && export CROSS_COMPILE="$TRIPLET-"
-make HOSTCC=clang CC="clang -target $TRIPLET -mllvm -arm-use-movt=0 -no-integrated-as" rpi_b_defconfig
+make HOSTCC=clang CC="clang -target $TRIPLET -mllvm -arm-use-movt=0 -no-integrated-as" rpi_defconfig
make HOSTCC=clang CC="clang -target $TRIPLET -mllvm -arm-use-movt=0 -no-integrated-as" all V=1 -j8
FreeBSD 11 (Current):
# The following commands compile U-Boot using the clang xdev toolchain.
# NOTE: CROSS_COMPILE and target differ on purpose!
export CROSS_COMPILE=arm-gnueabi-freebsd-
-gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0" rpi_b_defconfig
+gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0" rpi_defconfig
gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0" -j8
Given that u-boot will default to gcc, above commands can be
Board Arch CPU Commit Removed Last known maintainer/contact
=================================================================================================
-PRS200 powerpc mpc5200 - -
-MCC200 powerpc mpc5200 - -
+hermes powerpc mpc8xx - - Wolfgang Denk <wd@denx.de>
+PRS200 powerpc mpc5200 ecfdcee 2014-11-12
+MCC200 powerpc mpc5200 ecfdcee 2014-11-12
TOP5200 powerpc mpc5200 d58a945 2014-10-28 Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
TOP860 powerpc mpc860 d58a945 2014-10-28 Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
TOP9000 arm at91sam9xeXXX d58a945 2014-10-28 Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
alias abiessmann Andreas Bießmann <andreas.devel@googlemail.com>
alias afleming Andy Fleming <afleming@gmail.com>
alias ag Anatolij Gustschin <agust@denx.de>
+alias alisonwang Alison Wang <alison.wang@freescale.com>
+alias angelo_ts Angelo Dureghello <angelo@sysam.it>
+alias danielschwierzeck Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
alias galak Kumar Gala <galak@kernel.crashing.org>
alias gruss Graeme Russ <graeme.russ@gmail.com>
alias hs Heiko Schocher <hs@denx.de>
alias bfin uboot, vapier, sonic
alias blackfin bfin
-alias m68k uboot, jasonjin
+alias m68k uboot, alisonwang, angelo_ts
alias coldfire m68k
alias microblaze uboot, monstr
alias mb microblaze
-alias mips uboot, Shinya Kuribayashi <skuribay@pobox.com>
+alias mips uboot, danielschwierzeck
alias nds32 uboot, macpaul
alias nand uboot, scottwood
alias net uboot, jhersh
alias spi uboot, jagan
+alias ubi uboot, hs
alias usb uboot, marex
alias video uboot, ag
alias patman uboot, sjg
#define DRV_NAME "pata-bfin"
#define DRV_VERSION "0.9"
-#define __iomem
#define ATA_REG_CTRL 0x0E
#define ATA_REG_ALTSTATUS ATA_REG_CTRL
return 0;
}
-static int i2c_mux_disconnet_all(void)
+static int i2c_mux_disconnect_all(void)
{
struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS];
int i;
- uint8_t buf;
+ uint8_t buf = 0;
if (I2C_ADAP->init_done == 0)
return 0;
ret = I2C_ADAP->write(I2C_ADAP, chip, 0, 0, &buf, 1);
if (ret != 0) {
- printf("i2c: mux diconnect error\n");
+ printf("i2c: mux disconnect error\n");
return ret;
}
} while (i > 0);
}
#ifndef CONFIG_SYS_I2C_DIRECT_BUS
- i2c_mux_disconnet_all();
+ i2c_mux_disconnect_all();
#endif
gd->cur_i2c_bus = bus;
static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)
{
- int i;
-
sh_mmcif_bitclr(CLK_ENABLE, &host->regs->ce_clk_ctrl);
sh_mmcif_bitclr(CLK_CLEAR, &host->regs->ce_clk_ctrl);
if (!clk)
return;
- if (clk == CLKDEV_EMMC_DATA) {
+
+ if (clk == CLKDEV_EMMC_DATA)
sh_mmcif_bitset(CLK_PCLK, &host->regs->ce_clk_ctrl);
- } else {
- for (i = 1; (unsigned int)host->clk / (1 << i) >= clk; i++)
- ;
- sh_mmcif_bitset((i - 1) << 16, &host->regs->ce_clk_ctrl);
- }
+ else
+ sh_mmcif_bitset((fls(DIV_ROUND_UP(host->clk,
+ clk) - 1) - 1) << 16,
+ &host->regs->ce_clk_ctrl);
sh_mmcif_bitset(CLK_ENABLE, &host->regs->ce_clk_ctrl);
}
.host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT |
MMC_MODE_8BIT | MMC_MODE_HC,
.voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
- .f_min = CLKDEV_MMC_INIT,
- .f_max = CLKDEV_EMMC_DATA,
.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
};
host->regs = (struct sh_mmcif_regs *)CONFIG_SH_MMCIF_ADDR;
host->clk = CONFIG_SH_MMCIF_CLK;
+ sh_mmcif_cfg.f_min = MMC_CLK_DIV_MIN(host->clk);
+ sh_mmcif_cfg.f_max = MMC_CLK_DIV_MAX(host->clk);
+
mmc = mmc_create(&sh_mmcif_cfg, host);
if (mmc == NULL) {
free(host);
#define SOFT_RST_OFF (0 << 31)
#define CLKDEV_EMMC_DATA 52000000 /* 52MHz */
-#define CLKDEV_MMC_INIT 400000 /* 100 - 400 KHz */
+#ifdef CONFIG_RMOBILE
+#define MMC_CLK_DIV_MIN(clk) (clk / (1 << 9))
+#define MMC_CLK_DIV_MAX(clk) (clk / (1 << 1))
+#else
+#define MMC_CLK_DIV_MIN(clk) (clk / (1 << 8))
+#define MMC_CLK_DIV_MAX(clk) CLKDEV_EMMC_DATA
+#endif
#define MMC_BUS_WIDTH_1 0
#define MMC_BUS_WIDTH_4 2
#include <linux/types.h>
#include <power/pmic.h>
#include <i2c.h>
-#include <compiler.h>
+#include <linux/compiler.h>
int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
{
#define _MVRTC_H_
#include <asm/arch/soc.h>
-#include <compiler.h>
+#include <linux/compiler.h>
/* RTC registers */
struct mvrtc_registers {
static int pl01x_generic_serial_init(struct pl01x_regs *regs,
enum pl01x_type type)
{
- unsigned int lcr;
-
+ switch (type) {
+ case TYPE_PL010:
+ /* disable everything */
+ writel(0, ®s->pl010_cr);
+ break;
+ case TYPE_PL011:
#ifdef CONFIG_PL011_SERIAL_FLUSH_ON_INIT
- if (type == TYPE_PL011) {
/* Empty RX fifo if necessary */
if (readl(®s->pl011_cr) & UART_PL011_CR_UARTEN) {
while (!(readl(®s->fr) & UART_PL01x_FR_RXFE))
readl(®s->dr);
}
- }
#endif
+ /* disable everything */
+ writel(0, ®s->pl011_cr);
+ break;
+ default:
+ return -EINVAL;
+ }
- /* First, disable everything */
- writel(0, ®s->pl010_cr);
+ return 0;
+}
- /* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+static int set_line_control(struct pl01x_regs *regs)
+{
+ unsigned int lcr;
+ /*
+ * Internal update of baud rate register require line
+ * control register write
+ */
lcr = UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN;
- writel(lcr, ®s->pl011_lcrh);
-
- switch (type) {
- case TYPE_PL010:
- break;
- case TYPE_PL011: {
#ifdef CONFIG_PL011_SERIAL_RLCR
+ {
int i;
/*
writel(lcr, ®s->fr);
writel(lcr, ®s->pl011_rlcr);
- /* lcrh needs to be set again for change to be effective */
- writel(lcr, ®s->pl011_lcrh);
-#endif
- break;
- }
- default:
- return -EINVAL;
}
-
+#endif
+ writel(lcr, ®s->pl011_lcrh);
return 0;
}
writel(divider, ®s->pl011_ibrd);
writel(fraction, ®s->pl011_fbrd);
+ set_line_control(regs);
/* Finally, enable the UART */
writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
UART_PL011_CR_RXE | UART_PL011_CR_RTS, ®s->pl011_cr);
base_regs = (struct pl01x_regs *)port[CONFIG_CONS_INDEX];
pl01x_generic_serial_init(base_regs, pl01x_type);
- pl01x_generic_setbrg(base_regs, TYPE_PL010, clock, baudrate);
+ pl01x_generic_setbrg(base_regs, pl01x_type, clock, baudrate);
}
/*
#include <config.h>
#include <common.h>
-#include <compiler.h>
+#include <linux/compiler.h>
#include <fdtdec.h>
#include <i2c.h>
#include <tpm.h>
#include <common.h>
#include <fdtdec.h>
-#include <compiler.h>
+#include <linux/compiler.h>
#include <i2c.h>
#include <tpm.h>
#include <asm-generic/errno.h>
extern ssize_t spi_write (uchar *, int, uchar *, int);
#endif
-#ifdef CONFIG_HERMES
-/* $(BOARD)/hermes.c */
-void hermes_start_lxt980 (int speed);
-#endif
-
#ifdef CONFIG_EVB64260
void evb64260_init(void);
void debug_led(int, int);
#define SICR_ENET_CLKRT ((uint)0x00002600)
#endif /* CONFIG_FPS850L, CONFIG_FPS860L */
-/*** HERMES-PRO ******************************************************/
-
-/* The HERMES-PRO uses the FEC on a MPC860T for Ethernet */
-
-#ifdef CONFIG_HERMES
-
-#define FEC_ENET /* use FEC for EThernet */
-#undef SCC_ENET
-
-
-#define PD_MII_TXD1 ((ushort)0x1000) /* PD 3 */
-#define PD_MII_TXD2 ((ushort)0x0800) /* PD 4 */
-#define PD_MII_TXD3 ((ushort)0x0400) /* PD 5 */
-#define PD_MII_RX_DV ((ushort)0x0200) /* PD 6 */
-#define PD_MII_RX_ERR ((ushort)0x0100) /* PD 7 */
-#define PD_MII_RX_CLK ((ushort)0x0080) /* PD 8 */
-#define PD_MII_TXD0 ((ushort)0x0040) /* PD 9 */
-#define PD_MII_RXD0 ((ushort)0x0020) /* PD 10 */
-#define PD_MII_TX_ERR ((ushort)0x0010) /* PD 11 */
-#define PD_MII_MDC ((ushort)0x0008) /* PD 12 */
-#define PD_MII_RXD1 ((ushort)0x0004) /* PD 13 */
-#define PD_MII_RXD2 ((ushort)0x0002) /* PD 14 */
-#define PD_MII_RXD3 ((ushort)0x0001) /* PD 15 */
-
-#define PD_MII_MASK ((ushort)0x1FFF) /* PD 3...15 */
-
-#endif /* CONFIG_HERMES */
-
/*** IP860 **********************************************************/
#if defined(CONFIG_IP860)
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NOR_SUPPORT
#define CONFIG_SPL_TEXT_BASE 0xfc000000
-#define CONFIG_SPL_START_S_PATH "arch/powerpc/cpu/mpc5xxx"
-#define CONFIG_SPL_LDSCRIPT "arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */
#define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
+++ /dev/null
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC860 1 /* This is a MPC860T CPU */
-#define CONFIG_HERMES 1 /* ...on a HERMES-PRO board */
-
-#define CONFIG_SYS_TEXT_BASE 0xFE000000
-
-#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
-#undef CONFIG_8xx_CONS_SMC2
-#undef CONFIG_8xx_CONS_NONE
-#define CONFIG_BAUDRATE 9600
-#if 0
-#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
-#else
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#endif
-
-#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
-
-#define CONFIG_BOARD_TYPES 1 /* support board types */
-
-#define CONFIG_SHOW_BOOT_PROGRESS 1 /* Show boot progress on LEDs */
-
-#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTCOMMAND \
- "bootp; " \
- "setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
- "bootm"
-
-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */
-
-#undef CONFIG_WATCHDOG /* watchdog disabled */
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x00F00000 /* 1 ... 15MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-
-#define CONFIG_SYS_PIO_MODE 0 /* IDE interface in PIO Mode 0 */
-
-#define CONFIG_SYS_ALLOC_DPRAM 1 /* use allocation routines */
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR 0xFF000000 /* Non-Standard value! */
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_SIZE 0x2F00 /* Size of used area in DPRAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_FLASH_BASE 0xFE000000
-#ifdef DEBUG
-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
-#else
-#define CONFIG_SYS_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
-#endif
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 124 /* max number of sectors on one chip */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_OFFSET 0x4000 /* Offset of Environment Sector */
-#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control 11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- * +0x0004
- */
-#if defined(CONFIG_WATCHDOG)
-#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
- SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
-#else
-#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
-#endif
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration 11-6
- *-----------------------------------------------------------------------
- * +0x0000 => 0x000000C0
- */
-#define CONFIG_SYS_SIUMCR 0
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control 11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- * +0x0200 => 0x00C2
- */
-#define CONFIG_SYS_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control 11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- * +0x0240 => 0x0082
- */
-#define CONFIG_SYS_PISCR (PISCR_PS | PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30
- *-----------------------------------------------------------------------
- * Reset PLL lock status sticky bit, timer expired status bit and timer
- * interrupt status bit, set PLL multiplication factor !
- */
-/* +0x0286 => 0x00B0D0C0 */
-#define CONFIG_SYS_PLPRCR \
- ( (11 << PLPRCR_MF_SHIFT) | \
- PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST | \
- /*PLPRCR_CSRC|*/ PLPRCR_LPM_NORMAL | \
- PLPRCR_CSR | PLPRCR_LOLRE /*|PLPRCR_FIOPD*/ \
- )
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register 15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#define SCCR_MASK SCCR_EBDF11
-/* +0x0282 => 0x03800000 */
-#define CONFIG_SYS_SCCR (SCCR_COM00 | SCCR_TBS | \
- SCCR_RTDIV | SCCR_RTSEL | \
- /*SCCR_CRQEN|*/ /*SCCR_PRQEN|*/ \
- SCCR_EBDF00 | SCCR_DFSYNC00 | \
- SCCR_DFBRG00 | SCCR_DFNL000 | \
- SCCR_DFNH000)
-
-/*-----------------------------------------------------------------------
- * RTCSC - Real-Time Clock Status and Control Register 11-27
- *-----------------------------------------------------------------------
- */
-/* +0x0220 => 0x00C3 */
-#define CONFIG_SYS_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
-
-
-/*-----------------------------------------------------------------------
- * RCCR - RISC Controller Configuration Register 19-4
- *-----------------------------------------------------------------------
- */
-/* +0x09C4 => TIMEP=1 */
-#define CONFIG_SYS_RCCR 0x0100
-
-/*-----------------------------------------------------------------------
- * RMDS - RISC Microcode Development Support Control Register
- *-----------------------------------------------------------------------
- */
-#define CONFIG_SYS_RMDS 0
-
-/*-----------------------------------------------------------------------
- *
- *-----------------------------------------------------------------------
- *
- */
-#define CONFIG_SYS_DER 0
-
-/*
- * Init Memory Controller:
- *
- * BR0 and OR0 (FLASH)
- */
-
-#define FLASH_BASE0_PRELIM 0xFE000000 /* FLASH bank #0 */
-
-/* used to re-map FLASH
- * restrict access enough to keep SRAM working (if any)
- * but not too much to meddle with FLASH accesses
- */
-/* allow for max 4 MB of Flash */
-#define CONFIG_SYS_REMAP_OR_AM 0xFFC00000 /* OR addr mask */
-#define CONFIG_SYS_PRELIM_OR_AM 0xFFC00000 /* OR addr mask */
-
-/* FLASH timing: ACS = 11, TRLX = 1, CSNT = 1, SCY = 5, EHTR = 0 */
-#define CONFIG_SYS_OR_TIMING_FLASH ( OR_CSNT_SAM | /*OR_ACS_DIV4 |*/ OR_BI | \
- OR_SCY_5_CLK | OR_TRLX)
-
-#define CONFIG_SYS_OR0_REMAP (CONFIG_SYS_REMAP_OR_AM | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_OR0_PRELIM (CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_FLASH)
-/* 8 bit, bank valid */
-#define CONFIG_SYS_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V )
-
-/*
- * BR1/OR1 - SDRAM
- *
- * Multiplexed addresses, GPL5 output to GPL5_A (don't care)
- */
-#define SDRAM_BASE_PRELIM 0x00000000 /* SDRAM bank */
-#define SDRAM_PRELIM_OR_AM 0xF8000000 /* map max. 128 MB */
-#define SDRAM_TIMING 0x00000A00 /* SDRAM-Timing */
-
-#define SDRAM_MAX_SIZE 0x04000000 /* max 64 MB SDRAM */
-
-#define CONFIG_SYS_OR1_PRELIM (SDRAM_PRELIM_OR_AM | SDRAM_TIMING )
-#define CONFIG_SYS_BR1_PRELIM ((SDRAM_BASE_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
-
-/*
- * BR2/OR2 - HPRO2: PEB2256 @ 0xE0000000, 8 Bit wide
- */
-#define HPRO2_BASE 0xE0000000
-#define HPRO2_OR_AM 0xFFFF8000
-#define HPRO2_TIMING 0x00000934
-
-#define CONFIG_SYS_OR2 (HPRO2_OR_AM | HPRO2_TIMING)
-#define CONFIG_SYS_BR2 ((HPRO2_BASE & BR_BA_MSK) | BR_PS_8 | BR_V )
-
-/*
- * BR3/OR3: not used
- * BR4/OR4: not used
- * BR5/OR5: not used
- * BR6/OR6: not used
- * BR7/OR7: not used
- */
-
-/*
- * MAMR settings for SDRAM
- */
-
-/* periodic timer for refresh */
-#define CONFIG_SYS_MAMR_PTA 97 /* start with divider for 100 MHz */
-
-/* 8 column SDRAM */
-#define CONFIG_SYS_MAMR_8COL ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
- MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
- MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-/* 9 column SDRAM */
-#define CONFIG_SYS_MAMR_9COL ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
- MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
- MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-#endif /* __CONFIG_H */
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x00908000
#define CONFIG_SPL_MAX_SIZE 0x10000
-#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7"
#define CONFIG_SPL_STACK 0x0091FFB8
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#if defined(CONFIG_SPL_MMC_SUPPORT)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 138 /* offset 69KB */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS/2*1024)
#endif
#define CONFIG_SPL_TEXT_BASE 0xffff0000 /* last 64 KiB for SPL */
#define CONFIG_SYS_SPL_MAX_LEN (64 << 10)
#define CONFIG_UBOOT_PAD_TO 458752 /* decimal for 'dd' */
-#define CONFIG_SPL_START_S_PATH "arch/powerpc/cpu/ppc4xx"
-#define CONFIG_SPL_LDSCRIPT "arch/powerpc/cpu/ppc4xx/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */
#define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
/* NAND boot config */
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
/* Partition tables */
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#endif /* __OMAP3_EVM_QUICK_MMC_H */
+++ /dev/null
-/*
- * Copyright (C) 2012-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __PH1_XXX_H
-#define __PH1_XXX_H
-
-/*
- * Support Card Select
- *
- * CONFIG_PFC_MICRO_SUPPORT_CARD - Original Micro Support Card made by PFC.
- * CONFIG_DCC_MICRO_SUPPORT_CARD - DCC version Micro Support Card.
- * CPLD is re-programmed for ARIMA board compatibility.
- * No define - No support card.
- */
-
-#if 0
-#define CONFIG_PFC_MICRO_SUPPORT_CARD
-#else
-#define CONFIG_DCC_MICRO_SUPPORT_CARD
-#endif
-
-/*
- * Serial Configuration
- * SoC UART : enable CONFIG_UNIPHIER_SERIAL
- * On-board UART: enable CONFIG_SYS_NS16550_SERIAL
- */
-#if 0
-#define CONFIG_SYS_NS16550_SERIAL
-#endif
-
-#define CONFIG_SMC911X
-
-#define CONFIG_DDR_NUM_CH0 1
-#define CONFIG_DDR_NUM_CH1 1
-
-/*
- * Memory Size & Mapping
- */
-/* Physical start address of SDRAM */
-#define CONFIG_SDRAM0_BASE 0x80000000
-#define CONFIG_SDRAM0_SIZE 0x10000000
-#define CONFIG_SDRAM1_BASE 0x90000000
-#define CONFIG_SDRAM1_SIZE 0x10000000
-
-#define CONFIG_SPL_TEXT_BASE 0x40000
-
-#include "uniphier-common.h"
-
-#endif /* __PH1_XXX_H */
+++ /dev/null
-/*
- * Copyright (C) 2012-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __PH1_XXX_H
-#define __PH1_XXX_H
-
-/*
- * Support Card Select
- *
- * CONFIG_PFC_MICRO_SUPPORT_CARD - Original Micro Support Card made by PFC.
- * CONFIG_DCC_MICRO_SUPPORT_CARD - DCC version Micro Support Card.
- * CPLD is re-programmed for ARIMA board compatibility.
- * No define - No support card.
- */
-
-#if 0
-#define CONFIG_PFC_MICRO_SUPPORT_CARD
-#else
-#define CONFIG_DCC_MICRO_SUPPORT_CARD
-#endif
-
-/*
- * Serial Configuration
- * SoC UART : enable CONFIG_UNIPHIER_SERIAL
- * On-board UART: enable CONFIG_SYS_NS16550_SERIAL
- */
-#if 0
-#define CONFIG_SYS_NS16550_SERIAL
-#endif
-
-#define CONFIG_SMC911X
-
-#define CONFIG_DDR_NUM_CH0 2
-#define CONFIG_DDR_NUM_CH1 2
-
-#define CONFIG_UNIPHIER_SMP
-
-/*
- * Memory Size & Mapping
- */
-/* Physical start address of SDRAM */
-#define CONFIG_SDRAM0_BASE 0x80000000
-#define CONFIG_SDRAM0_SIZE 0x20000000
-#define CONFIG_SDRAM1_BASE 0xa0000000
-#define CONFIG_SDRAM1_SIZE 0x20000000
-
-#define CONFIG_SPL_TEXT_BASE 0x100000
-
-#include "uniphier-common.h"
-
-#endif /* __PH1_XXX_H */
+++ /dev/null
-/*
- * Copyright (C) 2012-2014 Panasonic Corporation
- * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __PH1_XXX_H
-#define __PH1_XXX_H
-
-/*
- * Support Card Select
- *
- * CONFIG_PFC_MICRO_SUPPORT_CARD - Original Micro Support Card made by PFC.
- * CONFIG_DCC_MICRO_SUPPORT_CARD - DCC version Micro Support Card.
- * CPLD is re-programmed for ARIMA board compatibility.
- * No define - No support card.
- */
-
-#if 0
-#define CONFIG_PFC_MICRO_SUPPORT_CARD
-#else
-#define CONFIG_DCC_MICRO_SUPPORT_CARD
-#endif
-
-/*
- * Serial Configuration
- * SoC UART : enable CONFIG_UNIPHIER_SERIAL
- * On-board UART: enable CONFIG_SYS_NS16550_SERIAL
- */
-#if 0
-#define CONFIG_SYS_NS16550_SERIAL
-#endif
-
-#define CONFIG_SMC911X
-
-#define CONFIG_DDR_NUM_CH0 1
-#define CONFIG_DDR_NUM_CH1 1
-
-/* #define CONFIG_DDR_STANDARD */
-
-/*
- * Memory Size & Mapping
- */
-/* Physical start address of SDRAM */
-#define CONFIG_SDRAM0_BASE 0x80000000
-#define CONFIG_SDRAM0_SIZE 0x10000000
-#define CONFIG_SDRAM1_BASE 0x90000000
-#define CONFIG_SDRAM1_SIZE 0x10000000
-
-#define CONFIG_SPL_TEXT_BASE 0x40000
-
-#include "uniphier-common.h"
-
-#endif /* __PH1_XXX_H */
/* Environment */
#define CONFIG_ENV_SIZE SZ_16K
-#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_FAT
+#define FAT_ENV_INTERFACE "mmc"
+#define FAT_ENV_DEVICE_AND_PART "0:1"
+#define FAT_ENV_FILE "uboot.env"
+#define CONFIG_FAT_WRITE
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_SYS_LOAD_ADDR 0x1000000
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define CONFIG_PREBOOT \
- "if load mmc 0:1 ${loadaddr} /uEnv.txt; then " \
- "env import -t -r ${loadaddr} ${filesize}; " \
- "fi"
/* Shell */
#define CONFIG_SYS_MAXARGS 8
/* Some things don't make sense on this HW or yet */
#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_SAVEENV
/* Environment */
#define ENV_DEVICE_SETTINGS \
"pxefile_addr_r=0x00100000\0" \
"kernel_addr_r=0x01000000\0" \
"fdt_addr_r=0x02000000\0" \
- "fdtfile=bcm2835-rpi-b.dtb\0" \
"ramdisk_addr_r=0x02100000\0" \
#define BOOT_TARGET_DEVICES(func) \
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
/* FAT sd card locations. */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
#ifndef __CONFIG_UNIPHIER_COMMON_H__
#define __CONFIG_UNIPHIER_COMMON_H__
-#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) && \
- defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
-# error "Both CONFIG_PFC_MICRO_SUPPORT_CARD and CONFIG_DCC_MICRO_SUPPORT_CARD \
-are defined. Select only one of them."
+#if defined(CONFIG_MACH_PH1_PRO4)
+#define CONFIG_DDR_NUM_CH0 2
+#define CONFIG_DDR_NUM_CH1 2
+
+/* Physical start address of SDRAM */
+#define CONFIG_SDRAM0_BASE 0x80000000
+#define CONFIG_SDRAM0_SIZE 0x20000000
+#define CONFIG_SDRAM1_BASE 0xa0000000
+#define CONFIG_SDRAM1_SIZE 0x20000000
+#endif
+
+#if defined(CONFIG_MACH_PH1_LD4)
+#define CONFIG_DDR_NUM_CH0 1
+#define CONFIG_DDR_NUM_CH1 1
+
+/* Physical start address of SDRAM */
+#define CONFIG_SDRAM0_BASE 0x80000000
+#define CONFIG_SDRAM0_SIZE 0x10000000
+#define CONFIG_SDRAM1_BASE 0x90000000
+#define CONFIG_SDRAM1_SIZE 0x10000000
+#endif
+
+#if defined(CONFIG_MACH_PH1_SLD8)
+#define CONFIG_DDR_NUM_CH0 1
+#define CONFIG_DDR_NUM_CH1 1
+
+/* Physical start address of SDRAM */
+#define CONFIG_SDRAM0_BASE 0x80000000
+#define CONFIG_SDRAM0_SIZE 0x10000000
+#define CONFIG_SDRAM1_BASE 0x90000000
+#define CONFIG_SDRAM1_SIZE 0x10000000
#endif
/*
#define CONFIG_SYS_NS16550_REG_SIZE -2
#endif
+/* TODO: move to Kconfig and device tree */
+#if 0
+#define CONFIG_SYS_NS16550_SERIAL
+#endif
+
+#define CONFIG_SMC911X
+
#define CONFIG_SMC911X_BASE CONFIG_SUPPORT_CARD_ETHER_BASE
#define CONFIG_SMC911X_32_BIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
-#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
-# define CONFIG_SYS_MAX_FLASH_BANKS 1
-# define CONFIG_SYS_FLASH_BANKS_LIST {0x00000000}
-# define CONFIG_SYS_FLASH_BANKS_SIZES {0x02000000}
-#endif
-
-#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
-# define CONFIG_SYS_MAX_FLASH_BANKS 1
-# define CONFIG_SYS_FLASH_BANKS_LIST {0x04000000}
-# define CONFIG_SYS_FLASH_BANKS_SIZES {0x04000000}
-#endif
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2
/* serial console configuration */
#define CONFIG_BAUDRATE 115200
"image_offset=0x00080000\0" \
"image_size=0x00f00000\0" \
"verify=n\0" \
- "autostart=yes\0" \
"norboot=run add_default_bootargs;" \
"bootm $image_offset\0" \
"nandboot=run add_default_bootargs;" \
#define CONFIG_SYS_TEXT_BASE 0x84000000
+#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
+#define CONFIG_SPL_TEXT_BASE 0x00040000
+#endif
+#if defined(CONFIG_MACH_PH1_PRO4)
+#define CONFIG_SPL_TEXT_BASE 0x00100000
+#endif
+
#define CONFIG_BOARD_POSTCLK_INIT
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
#define cond_resched() do { } while (0)
#define yield() do { } while (0)
-#define __user
#define __init
#define __exit
#define __devinit
#define __devinitdata
#define __devinitconst
-#define __iomem
#define kthread_create(...) __builtin_return_address(0)
#define kthread_stop(...) do { } while (0)
#define cdev_add(...) 0
#define cdev_del(...) do { } while (0)
-#define MAX_ERRNO 4095
-
#define prandom_u32(...) 0
typedef struct {
obj-$(CONFIG_LZMA) += lzma/
obj-$(CONFIG_LZO) += lzo/
obj-$(CONFIG_ZLIB) += zlib/
+obj-$(CONFIG_BZIP2) += bzip2/
obj-$(CONFIG_TIZEN) += tizen/
+obj-$(CONFIG_OF_LIBFDT) += libfdt/
+obj-$(CONFIG_FIT) += libfdt/
obj-$(CONFIG_AES) += aes.o
-obj-$(CONFIG_BZIP2) += bzlib.o
-obj-$(CONFIG_BZIP2) += bzlib_crctable.o
-obj-$(CONFIG_BZIP2) += bzlib_decompress.o
-obj-$(CONFIG_BZIP2) += bzlib_randtable.o
-obj-$(CONFIG_BZIP2) += bzlib_huffman.o
obj-$(CONFIG_USB_TTY) += circbuf.o
obj-y += crc7.o
obj-y += crc8.o
--- /dev/null
+obj-y += bzlib.o bzlib_crctable.o bzlib_decompress.o \
+ bzlib_randtable.o bzlib_huffman.o
# SPDX-License-Identifier: GPL-2.0+
#
-COBJS-libfdt += fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_sw.o fdt_wip.o \
+obj-y += fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_sw.o fdt_wip.o \
fdt_empty_tree.o fdt_addresses.o
-
-obj-$(CONFIG_OF_LIBFDT) += $(COBJS-libfdt)
-obj-$(CONFIG_FIT) += $(COBJS-libfdt)
#define __GLUE_ZLIB_H__
#include <common.h>
-#include <compiler.h>
+#include <linux/compiler.h>
#include <asm/unaligned.h>
#include <watchdog.h>
#include "u-boot/zlib.h"
if (tmp_ip != 0)
NetCopyIP(&NetServerIP, &bp->bp_siaddr);
memcpy(NetServerEther, ((struct ethernet_hdr *)NetRxPacket)->et_src, 6);
-#endif
- NetCopyIP(&NetOurIP, &bp->bp_yiaddr);
if (strlen(bp->bp_file) > 0)
copy_filename(BootFile, bp->bp_file, sizeof(BootFile));
*/
if (*BootFile)
setenv("bootfile", BootFile);
+#endif
+ NetCopyIP(&NetOurIP, &bp->bp_yiaddr);
}
static int truncate_sz(const char *name, int maxlen, int curlen)
endif
include $(srctree)/config.mk
+include $(srctree)/arch/$(ARCH)/Makefile
# Enable garbage collection of un-used sections for SPL
KBUILD_CFLAGS += -ffunction-sections -fdata-sections
HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makefile),y,n)
-ifdef CONFIG_SPL_START_S_PATH
-START_PATH := $(CONFIG_SPL_START_S_PATH:"%"=%)
-else
-START_PATH := $(CPUDIR)
-endif
-
-head-y := $(START_PATH)/start.o
-head-$(CONFIG_X86) += $(START_PATH)/start16.o $(START_PATH)/resetvec.o
-head-$(CONFIG_4xx) += $(START_PATH)/resetvec.o
-head-$(CONFIG_MPC85xx) += $(START_PATH)/resetvec.o
-
-libs-y += arch/$(ARCH)/lib/
-
-libs-y += $(CPUDIR)/
-
libs-y += $(if $(BOARDDIR),board/$(BOARDDIR)/)
libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
libs-$(CONFIG_OMAP_USB_PHY) += drivers/usb/phy/
libs-$(CONFIG_SPL_SATA_SUPPORT) += drivers/block/
-ifneq (,$(CONFIG_MX23)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35))
-libs-y += arch/$(ARCH)/imx-common/
-endif
-
-libs-$(CONFIG_ARM) += arch/arm/cpu/
-libs-$(CONFIG_PPC) += arch/powerpc/cpu/
-
head-y := $(addprefix $(obj)/,$(head-y))
libs-y := $(addprefix $(obj)/,$(libs-y))
u-boot-spl-dirs := $(patsubst %/,%,$(filter %/, $(libs-y)))
if ($lk_path ne "" && substr($lk_path,length($lk_path)-1,1) ne "/") {
$lk_path .= "/";
}
- if ( (-f "${lk_path}CREDITS")
- && (-f "${lk_path}Kbuild")
+ if ( (-f "${lk_path}Kbuild")
&& (-f "${lk_path}MAINTAINERS")
&& (-f "${lk_path}Makefile")
&& (-f "${lk_path}README")
{
int i, j;
struct menu *submenu[8], *menu, *location = NULL;
- struct jump_key *jump;
+ struct jump_key *jump = NULL;
str_printf(r, _("Prompt: %s\n"), _(prop->text));
menu = prop->menu->parent;
str_printf(r, _(" Location:\n"));
for (j = 4; --i >= 0; j += 2) {
menu = submenu[i];
- if (head && location && menu == location)
+ if (jump && menu == location)
jump->offset = strlen(r->s);
str_printf(r, "%*c-> %s", j, ' ',
_(menu_get_prompt(menu)));
valid value, and all will be well. Otherwise buildman will perform random
actions. Use -n to check what the random actions might be.
-If you just want to build the current source tree, leave off the -b flag.
-This will display results and errors as they happen. You can still look
-at them later using -s. Note that buildman will assume that the source
-has changed, and will build all specified boards in this case.
+If you just want to build the current source tree, leave off the -b flag
+and add -e. This will display results and errors as they happen. You can
+still look at them later using -se. Note that buildman will assume that the
+source has changed, and will build all specified boards in this case.
Buildman is optimised for building many commits at once, for many boards.
On multi-core machines, Buildman is fast because it uses most of the
==================
If you have made changes and want to do a quick sanity check of the
-currently-checked-out source, run buildman without the -b flag. This will
-build the selected boards and display build status and errors as it runs
-(i.e. -v amd -e are enabled automatically).
+currently checked-out source, run buildman without the -b flag. This will
+build the selected boards and display build status as it runs (i.e. -v is
+enabled automatically). Use -e to see errors/warnings as well.
Other options
flag to see the full errors and -l to see which boards caused which errors.
If you really want to see build results as they happen, use -v when doing a
-build (-e will be enabled automatically).
+build (and -e to see the errors/warnings too).
You don't need to stick around on that branch while buildman is running. It
checks out its own copy of the source code, so you can change branches,
This has mostly be written in my spare time as a response to my difficulties
in testing large series of patches. Apart from tidying up there is quite a
-bit of scope for improvement. Things like better error diffs, easier access
-to log files, error display while building. Also it would be nice it buildman
-could 'hunt' for problems, perhaps by building a few boards for each arch,
-or checking commits for changed files and building only boards which use
-those files.
+bit of scope for improvement. Things like better error diffs and easier
+access to log files. Also it would be nice it buildman could 'hunt' for
+problems, perhaps by building a few boards for each arch, or checking
+commits for changed files and building only boards which use those files.
Credits
if self._list_error_boards:
names = []
for board in line_boards[line]:
- names.append(board.target)
+ if not board.target in names:
+ names.append(board.target)
names_str = '(%s) ' % ','.join(names)
else:
names_str = ''
# Now write the actual build output
if keep_outputs:
- patterns = ['u-boot', '*.bin', 'u-boot.dtb', '*.map',
+ patterns = ['u-boot', '*.bin', 'u-boot.dtb', '*.map', '*.img',
'include/autoconf.mk', 'spl/u-boot-spl',
'spl/u-boot-spl.bin']
for pattern in patterns:
if commits:
for upto in range(0, len(series.commits), options.step):
commit = series.commits[upto]
- print ' ', col.Color(col.YELLOW, commit.hash, bright=False),
+ print ' ', col.Color(col.YELLOW, commit.hash[:8], bright=False),
print commit.subject
print
for arg in why_selected:
else:
series = None
options.verbose = True
- options.show_errors = True
# By default we have one thread per CPU. But if there are not enough jobs
# we can have fewer threads and use a high '-j' value for make.
# Detect the start of a new commit
elif commit_match:
self.CloseCommit()
- # TODO: We should store the whole hash, and just display a subset
- self.commit = commit.Commit(commit_match.group(1)[:8])
+ self.commit = commit.Commit(commit_match.group(1))
# Detect tags in the commit message
elif tag_match:
projects / karo-tx-uboot.git / commitdiff