]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
mtd: nand: omap: remove unused #defines from common omap_gpmc.h
authorpekon gupta <pekon@ti.com>
Fri, 22 Nov 2013 11:23:27 +0000 (16:53 +0530)
committerScott Wood <scottwood@freescale.com>
Tue, 4 Mar 2014 23:23:54 +0000 (17:23 -0600)
OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI
params or nand_id[] table. And based on that it defines ECC layout.
This patch
1) removes following board configs used for defining NAND ECC layout
- GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND)
- GPMC_NAND_ECC_LP_x8_LAYOUT  (for large page x8 NAND)
- GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND)
- GPMC_NAND_ECC_SP_x8_LAYOUT  (for small page x8 NAND)

2) removes unused #defines in common omap_gpmc.h depending on above configs

Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5

Signed-off-by: Pekon Gupta <pekon@ti.com>
19 files changed:
arch/arm/include/asm/omap_gpmc.h
include/configs/am335x_evm.h
include/configs/am335x_igep0033.h
include/configs/am3517_crane.h
include/configs/am3517_evm.h
include/configs/cm_t35.h
include/configs/devkit8000.h
include/configs/dig297.h
include/configs/mcx.h
include/configs/omap3_beagle.h
include/configs/omap3_evm_common.h
include/configs/omap3_igep00x0.h
include/configs/omap3_logic.h
include/configs/omap3_overo.h
include/configs/omap3_pandora.h
include/configs/omap3_zoom1.h
include/configs/siemens-am33x-common.h
include/configs/tam3517-common.h
include/configs/tricorder.h

index 5250109a5bd9b5431ff0588260d3ec8e1f791a48..3caaed85fbcb1ce09e7caff2defc38ebaeb4b7a1 100644 (file)
 #define GPMC_BUF_EMPTY 0
 #define GPMC_BUF_FULL  1
 
-/* Generic ECC Layouts */
-/* Large Page x8 NAND device Layout */
-#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-       .eccbytes = 12,\
-       .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
-               9, 10, 11, 12},\
-       .oobfree = {\
-               {.offset = 13,\
-                .length = 51 } } \
-}
-#endif
-
-/* Large Page x16 NAND device Layout */
-#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-       .eccbytes = 12,\
-       .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
-               10, 11, 12, 13},\
-       .oobfree = {\
-               {.offset = 14,\
-                .length = 50 } } \
-}
-#endif
-
-/* Small Page x8 NAND device Layout */
-#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-       .eccbytes = 3,\
-       .eccpos = {1, 2, 3},\
-       .oobfree = {\
-               {.offset = 4,\
-                .length = 12 } } \
-}
-#endif
-
-/* Small Page x16 NAND device Layout */
-#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-       .eccbytes = 3,\
-       .eccpos = {2, 3, 4},\
-       .oobfree = {\
-               {.offset = 5,\
-                .length = 11 } } \
-}
-#endif
-
 enum omap_ecc {
        /* 1-bit  ECC calculation by Software, Error detection by Software */
        OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
index 59a8f36d16947d45b8726fac86973307a40db7d2..a5736b7f0ab9e7928e67d9697338f7e2588983c0 100644 (file)
 /* NAND support */
 #ifdef CONFIG_NAND
 #define CONFIG_CMD_NAND
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
 #define MTDIDS_DEFAULT                 "nand0=omap2-nand.0"
 #define MTDPARTS_DEFAULT               "mtdparts=omap2-nand.0:128k(SPL)," \
index 115d1b37c9e9439b17d949c7e1a4d6220a284401..c00d54f7b275b9b9952b865ee5885ee491e01029 100644 (file)
 #define CONFIG_NAND
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_NAND_OMAP_ELM
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_SYS_NAND_BASE           (0x08000000)    /* phys address CS0 */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_ONFI_DETECTION 1
index 468fb43ea8e4b88106c9472b2f7738becd076146..4407b454dd133ba8e5d6892d1954f2238a0290d1 100644 (file)
 #define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_FLASH_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_ENV_IS_IN_NAND          1
 #define SMNAND_ENV_OFFSET              0x260000 /* environment starts here */
 
index b8b99c806fa535e583dde2fc43f3c6b1291fcb46..0102ff5b7f90bbdb2fc4ffb781270f206bcb8c42 100644 (file)
 #define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_FLASH_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_ENV_IS_IN_NAND          1
 #define SMNAND_ENV_OFFSET              0x260000 /* environment starts here */
 
index 08c67f588c1f9235a0ba6f6d7d99946fd02ddace..cfc4f9bb8ebb2856c6508ca1e0c304d876453cfb 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x8_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 /* Environment information */
index 4f43ba988227d0b067b482118473374e52197a35..16a00ebe867aee0f0c4b4e1ea82fed107e7a9d5f 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 #define CONFIG_JFFS2_NAND
index 5049afca7a7025a00939217285c165424ecaa7a4..af6f56bb348199b5d1ecfc12d53a6d5c3ae5ecf8 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
 
 #if defined(CONFIG_CMD_NET)
index 7c5c2f4d1c57972149ab04c97dc925e96b0ae9eb..47244c003434d7a8f826ba2ecb5410066029d750 100644 (file)
 #define PISMO1_NAND_SIZE               GPMC_SIZE_128M
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_IS_IN_NAND
 #define SMNAND_ENV_OFFSET              0x180000 /* environment starts here */
 
index c58bc91a50c5b1410526a6f266ef737a78d128e3..ac0ed4371cf6b4a4989854bc1ab445e0747a81b1 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 
index 43616e2b029b791e809063e21bc5b203dc2b7254..7f3424b4f0e00f985dffc5bb24886d9422ec45bd 100644 (file)
 #define CONFIG_SYS_FLASH_BASE          PISMO1_NAND_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_OFFSET              SMNAND_ENV_OFFSET
 #elif defined(CONFIG_CMD_ONENAND)
 #define CONFIG_SYS_FLASH_BASE          PISMO1_ONEN_BASE
index 20fbbecdfbd05231a68314ccf0d6339a01d86d93..12d8141e2272a4192e8f85fc89393d32ef3a13aa 100644 (file)
 
 #ifdef CONFIG_NAND
 #define PISMO1_NAND_SIZE               GPMC_SIZE_128M /* Configure the PISMO */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_ENV_OFFSET              0x260000 /* environment starts here */
 #define CONFIG_ENV_IS_IN_NAND          1
 #define CONFIG_ENV_SIZE                        (512 << 10) /* Total Size Environment */
index bedd6f9cb39b61794fefd71c270879f6ae3c8117..0d03c75ce3012a28043154aa13d7df63e9ef1f31 100644 (file)
 
 #if defined(CONFIG_CMD_NAND)
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET              SMNAND_ENV_OFFSET
 #endif
index e0f026269fc497ffb814e89d47c88d3c940d23e2..007e27f9f1185df13ee15b18b51624499536c01d 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand */
                                                        /* at CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND */
                                                /* devices */
 #define CONFIG_JFFS2_NAND
index eacdfaaa53b04a8df199ed973690cafd44bafa3e..da67787e69ef5c1410302239364afa866b885969 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand */
                                                        /* at CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND */
                                                /* devices */
 
index 1dd53fa13308a8ca244c3d83d1c050dc9a909239..f0fa96efcb82e76d1781cb455c650801eba5b57f 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 #define CONFIG_JFFS2_NAND
index 286304295d1df5c56a28bba6b8d6bf90c83e3c71..98b6e7206d9fdaf59f986bdd5375f4ad71342c07 100644 (file)
 
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_NAND_OMAP_ELM
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_SYS_NAND_BASE           (0x08000000)    /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
index d44b5c036de2a80ed1d1462c2919525f85314f5a..3522c1a07a7a379a0cd50865bc284263df462900 100644 (file)
 #define PISMO1_NAND_SIZE               GPMC_SIZE_128M
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_IS_IN_NAND
 #define SMNAND_ENV_OFFSET              0x180000 /* environment starts here */
 
index cc4001fcd13a1cee45585f3d9b35846aef7263d5..62f97d24fb490eaab1bc641e84eb31fd781e32b2 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 #define CONFIG_BCH