]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
AT91: Use AT91_CPU_CLOCK in displays
authorStelian Pop <stelian@popies.net>
Fri, 7 Nov 2008 12:55:14 +0000 (13:55 +0100)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fri, 21 Nov 2008 00:41:14 +0000 (01:41 +0100)
Introduce AT91_CPU_CLOCK and use it for displaying the CPU
speed in the LCD driver.

Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the
corresponding board clocks.

Signed-off-by: Stelian Pop <stelian@popies.net>
board/atmel/at91cap9adk/at91cap9adk.c
board/atmel/at91sam9261ek/at91sam9261ek.c
board/atmel/at91sam9263ek/at91sam9263ek.c
board/atmel/at91sam9rlek/at91sam9rlek.c
include/configs/at91cap9adk.h
include/configs/at91sam9260ek.h
include/configs/at91sam9261ek.h
include/configs/at91sam9263ek.h
include/configs/at91sam9rlek.h

index af145cc7c0c96c2dd796871abed186cd36775db3..f7d68b705e3023c77ec230b26343aa03b683f47f 100644 (file)
@@ -342,7 +342,7 @@ void lcd_show_board_info(void)
        lcd_printf ("at91support@atmel.com\n");
        lcd_printf ("%s CPU at %s MHz\n",
                AT91_CPU_NAME,
-               strmhz(temp, AT91_MAIN_CLOCK));
+               strmhz(temp, AT91_CPU_CLOCK));
 
        dram_size = 0;
        for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
index 185d6e1307d025ffd11b267752de3a61799b7b20..14f236da23b8868b95ecc8adec3af9bf3b35ecda 100644 (file)
@@ -225,7 +225,7 @@ void lcd_show_board_info(void)
        lcd_printf ("at91support@atmel.com\n");
        lcd_printf ("%s CPU at %s MHz\n",
                AT91_CPU_NAME,
-               strmhz(temp, AT91_MAIN_CLOCK));
+               strmhz(temp, AT91_CPU_CLOCK));
 
        dram_size = 0;
        for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
index 4feed9a52f383b615c9fc95db0b7095474033912..ebd464976c76ecc7491cad4fdb1b3393d08317c5 100644 (file)
@@ -276,7 +276,7 @@ void lcd_show_board_info(void)
        lcd_printf ("at91support@atmel.com\n");
        lcd_printf ("%s CPU at %s MHz\n",
                AT91_CPU_NAME,
-               strmhz(temp, AT91_MAIN_CLOCK));
+               strmhz(temp, AT91_CPU_CLOCK));
 
        dram_size = 0;
        for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
index 992dd4cd2c9597ce46dcd759cf39bb36c4b31986..b6fef9d6f5f005f6ee4873b399f3675f5cc328ff 100644 (file)
@@ -197,7 +197,7 @@ void lcd_show_board_info(void)
        lcd_printf ("at91support@atmel.com\n");
        lcd_printf ("%s CPU at %s MHz\n",
                AT91_CPU_NAME,
-               strmhz(temp, AT91_MAIN_CLOCK));
+               strmhz(temp, AT91_CPU_CLOCK));
 
        dram_size = 0;
        for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
index 30a7cb41f9b0c2fc666dc859f6f7b0bd898f2461..667e0496b600c09fcdc3fb3610c70574c783e5c9 100644 (file)
 
 /* ARM asynchronous clock */
 #define AT91_CPU_NAME          "AT91CAP9"
-#define AT91_MAIN_CLOCK                200000000       /* from 12 MHz crystal */
-#define AT91_MASTER_CLOCK      100000000       /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ                  1000000         /* 1us resolution */
+#define AT91_MAIN_CLOCK                12000000        /* 12 MHz crystal */
+#define AT91_MASTER_CLOCK      100000000       /* peripheral */
+#define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */
 
index be9a8eb51e3c89cdd0dd59161ee18ba90cd7bf75..81c8d39b24dc766ac733d6f2480ff507a7a12fbc 100644 (file)
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                198656000       /* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK      99328000        /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ                  1000000         /* 1us resolution */
+#define AT91_CPU_NAME          "AT91SAM9260"
+#define AT91_MAIN_CLOCK                18432000        /* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK      100000000       /* peripheral */
+#define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */
 
index add31c95a9719e638f059cc07b1aa3389a4ab345..efe35a4b762755f4635ea202087a603b597dfc4f 100644 (file)
 
 /* ARM asynchronous clock */
 #define AT91_CPU_NAME          "AT91SAM9261"
-#define AT91_MAIN_CLOCK                198656000       /* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK      99328000        /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ                  1000000         /* 1us resolution */
+#define AT91_MAIN_CLOCK                18432000        /* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK      100000000       /* peripheral */
+#define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */
 
index 555cb7f2ea06fedb32e89f09aed0aa27da716404..ef5b666311f5958193eb9f9687910e5387eed3af 100644 (file)
 
 /* ARM asynchronous clock */
 #define AT91_CPU_NAME          "AT91SAM9263"
-#define AT91_MAIN_CLOCK                199919000       /* from 16.367 MHz crystal */
-#define AT91_MASTER_CLOCK      99959500        /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ                  1000000         /* 1us resolution */
+#define AT91_MAIN_CLOCK                16367660        /* 16.367 MHz crystal */
+#define AT91_MASTER_CLOCK      100000000       /* peripheral */
+#define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */
 
index 648d60ef1d30749b79e73eab2813211d6a80b894..35dac47ba1cccdbd3c33302233d9899e340a9da4 100644 (file)
 
 /* ARM asynchronous clock */
 #define AT91_CPU_NAME          "AT91SAM9RL"
-#define AT91_MAIN_CLOCK                200000000       /* from 12.000 MHz crystal */
-#define AT91_MASTER_CLOCK      100000000       /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ                  1000000         /* 1us resolution */
+#define AT91_MAIN_CLOCK                12000000        /* 12 MHz crystal */
+#define AT91_MASTER_CLOCK      100000000       /* peripheral */
+#define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */