]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
ARM: zynq: Enable the Neon instructions
authorMichal Simek <michal.simek@xilinx.com>
Fri, 23 Jan 2015 08:45:12 +0000 (09:45 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 26 Jan 2015 07:55:31 +0000 (08:55 +0100)
Added the lowlevel_init to enable the Neon instructions.

Initially the u-boot was causing undefined instruction
exception if loaded through tcl, and working fine if loaded
through FSBL. The exception was causing in convertion formula
of given time to ticks. It was because, the Neon instructions
were disabled and hence causing the undefined exception. In
FSBL case, the FSBL was enabling the Neon instructions. Hence,
added the lowlevel_init to enable the Neon instructions.

Also enable neon instructions for non-xilinx toolchain.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/cpu/armv7/zynq/Makefile
arch/arm/cpu/armv7/zynq/config.mk [new file with mode: 0644]
arch/arm/cpu/armv7/zynq/cpu.c
arch/arm/cpu/armv7/zynq/lowlevel_init.S [new file with mode: 0644]

index 3363a3c71b9837270e8b5ccfdcc360dc911da0fa..901f2ce4cbb79c73720252b7a54f040ae70a3b7f 100644 (file)
@@ -13,4 +13,5 @@ obj-y += cpu.o
 obj-y  += ddrc.o
 obj-y  += slcr.o
 obj-y  += clk.o
+obj-y  += lowlevel_init.o
 obj-$(CONFIG_SPL_BUILD)        += spl.o
diff --git a/arch/arm/cpu/armv7/zynq/config.mk b/arch/arm/cpu/armv7/zynq/config.mk
new file mode 100644 (file)
index 0000000..778a377
--- /dev/null
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2013 - 2015 Xilinx, Inc. All rights reserved.
+#
+# SPDX-License-Identifier:      GPL-2.0
+#
+# Allow NEON instructions (needed for lowlevel_init.S with GNU toolchain)
+PLATFORM_RELFLAGS += -mfpu=neon
index 816d0c5da7a5c69104c5458939bf799256e04229..d1bfec9f715e7cf92354608f6e6d17b277e10509 100644 (file)
@@ -10,9 +10,6 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/hardware.h>
 
-void lowlevel_init(void)
-{
-}
 
 #define ZYNQ_SILICON_VER_MASK  0xF0000000
 #define ZYNQ_SILICON_VER_SHIFT 28
diff --git a/arch/arm/cpu/armv7/zynq/lowlevel_init.S b/arch/arm/cpu/armv7/zynq/lowlevel_init.S
new file mode 100644 (file)
index 0000000..6d714b7
--- /dev/null
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2013 Xilinx, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm-offsets.h>
+#include <config.h>
+#include <linux/linkage.h>
+
+ENTRY(lowlevel_init)
+
+       /* Enable the the VFP */
+       mrc     p15, 0, r1, c1, c0, 2
+       orr     r1, r1, #(0x3 << 20)
+       orr     r1, r1, #(0x3 << 20)
+       mcr     p15, 0, r1, c1, c0, 2
+       isb
+       fmrx    r1, FPEXC
+       orr     r1,r1, #(1<<30)
+       fmxr    FPEXC, r1
+
+       /* Move back to caller */
+       mov     pc, lr
+
+ENDPROC(lowlevel_init)