x86: minnowmax: use the correct NOR in the configuration

The SPI NOR on the minnowboard max is a MICRON N25Q064A

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 4be227a3b08f9206256ca7b79bc5332485d63834..0233f614172e4e5ad6a34d298f394a0412844169 100644 (file)
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -74,7 +74,7 @@
                compatible = "intel,ich-spi";
                spi-flash@0 {
                        reg = <0>;
                compatible = "intel,ich-spi";
                spi-flash@0 {
                        reg = <0>;

-                       compatible = "sst,25vf016b", "spi-flash";
+                       compatible = "stmicro,n25q064a", "spi-flash";

                        memory-map = <0xff800000 0x00800000>;
                };
        };
                        memory-map = <0xff800000 0x00800000>;
                };
        };

diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h
index 6dbae8faf4064c12a9a725a4a9ebdeb1639eb131..2a1915d8722bce83b5fc4138c6b9841dc3e50033 100644 (file)
--- a/include/configs/minnowmax.h
+++ b/include/configs/minnowmax.h
@@ -42,7 +42,7 @@
 
 #define CONFIG_SCSI_DEV_LIST            \
        {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}
 
 #define CONFIG_SCSI_DEV_LIST            \
        {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}

-#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_FLASH_STMICRO

 
 #define CONFIG_MMC
 #define CONFIG_SDHCI
 
 #define CONFIG_MMC
 #define CONFIG_SDHCI