arm: socfpga: Unbind CPU type from board type

The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
selected both a board and a CPU. This is not correct as these macros
are supposed to select only board.

All would be good, if QTS-generated header files didn't check for
these macros exactly to determine if the platform is Cyclone V or
Arria V. Thus, for the sake of compatibility with not well fleshed
out header file generator, this patch makes these two macros into
a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK
and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the
previous stub config option.

The result is that compatibility with QTS is preserved and the new
CONFIG_TARGET_* select actual target boards.

Signed-off-by: Marek Vasut <marex@denx.de>

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index e46c3489959c57ed39f701fd4db7201fc8fdb3d3..1a441ff4ad38112fbbf8c01640f6bb8a7f5e45d2 100644 (file)
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -1,28 +1,38 @@
 if ARCH_SOCFPGA
 
+config TARGET_SOCFPGA_ARRIA5
+       bool
+
+config TARGET_SOCFPGA_CYCLONE5
+       bool
+
 choice
        prompt "Altera SOCFPGA board select"
        optional
 
-config TARGET_SOCFPGA_ARRIA5
-       bool "Altera SOCFPGA Arria V"
+config TARGET_SOCFPGA_ARRIA5_SOCDK
+       bool "Altera SOCFPGA SoCDK (Arria V)"
+       select TARGET_SOCFPGA_ARRIA5
 
-config TARGET_SOCFPGA_CYCLONE5
-       bool "Altera SOCFPGA Cyclone V"
+config TARGET_SOCFPGA_CYCLONE5_SOCDK
+       bool "Altera SOCFPGA SoCDK (Cyclone V)"
+       select TARGET_SOCFPGA_CYCLONE5
 
 endchoice
 
 config SYS_BOARD
-       default "socfpga"
+       default "socfpga" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "socfpga" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 
 config SYS_VENDOR
-       default "altera"
+       default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 
 config SYS_SOC
        default "socfpga"
 
 config SYS_CONFIG_NAME
-       default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5
-       default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5
+       default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 
 endif

diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index c2ba3aba0e2b975a8177f2d24672ac62d3250a75..dcd5cb34ee0a3b3d47b6f1aef25a69fc4202fa6c 100644 (file)
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -1,14 +1,21 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_TARGET_SOCFPGA_ARRIA5=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
 CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x00800000
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_SPL_DM=y
 CONFIG_SPI_FLASH=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_SYS_MALLOC_F_LEN=0x2000

diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 92e116e270c4ef381392376d05ed3cfa38008fd9..190cdae8527ce545bbc263a060b42f468414072e 100644 (file)
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -1,11 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_TARGET_SOCFPGA_CYCLONE5=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
 CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x00800000
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_OF_CONTROL=y
@@ -15,3 +13,12 @@ CONFIG_DM_ETH=y
 CONFIG_NETDEVICES=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SPL_DM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_SYS_MALLOC_F_LEN=0x2000

diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index d54439dc69625c9bdc78369f7212b2a4da78bcdc..16bfb7d4e06d3c7ac89d5dfe358ffa30f23d5a4d 100644 (file)
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -1,11 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_TARGET_SOCFPGA_CYCLONE5=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
 CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x00800000
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_OF_CONTROL=y
@@ -15,3 +13,12 @@ CONFIG_DM_ETH=y
 CONFIG_NETDEVICES=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SPL_DM=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_SPL_SIMPLE_BUS=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x00800000
+CONFIG_SYS_MALLOC_F_LEN=0x2000