ARM: tegra: Tegra124 pinmux cleanup

This renames all the pinmux pins, drive groups, and functions so they
have a prefix which matches the type name. These lists are also auto-
generated using scripts that were also used to generate the kernel
pinctrl drivers. This ensures that the lists are consistent between the
two.

The entries in tegra124_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

There are differences in the set of drive groups. I have validated this
against the TRM. There are differences order of pin definitions in
pinmux.c; these previously had significant mismatches with the correct
order:-( I adjusted a few entries in pinmux-config-venice2.h since the
set of legal functions for some pins was updated to match the TRM.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

diff --git a/arch/arm/cpu/arm720t/tegra124/cpu.c b/arch/arm/cpu/arm720t/tegra124/cpu.c
index 97f5928bd7da0471e08f484a7c5e6032e3cb8baa..6ff6aeb5463a1ad2622f3f1be3e4056050778fe9 100644 (file)
--- a/arch/arm/cpu/arm720t/tegra124/cpu.c
+++ b/arch/arm/cpu/arm720t/tegra124/cpu.c
@@ -26,8 +26,8 @@ static void enable_cpu_power_rail(void)
        debug("enable_cpu_power_rail entry\n");
 
        /* un-tristate PWR_I2C SCL/SDA, rest of the defaults are correct */
        debug("enable_cpu_power_rail entry\n");
 
        /* un-tristate PWR_I2C SCL/SDA, rest of the defaults are correct */

-       pinmux_tristate_disable(PINGRP_PWR_I2C_SCL);
-       pinmux_tristate_disable(PINGRP_PWR_I2C_SDA);
+       pinmux_tristate_disable(PMUX_PINGRP_PWR_I2C_SCL_PZ6);
+       pinmux_tristate_disable(PMUX_PINGRP_PWR_I2C_SDA_PZ7);

 
        pmic_enable_cpu_vdd();
 
 
        pmic_enable_cpu_vdd();
 

diff --git a/arch/arm/cpu/tegra124-common/funcmux.c b/arch/arm/cpu/tegra124-common/funcmux.c
index d19fda06c55c6c85ddc852125973a0b47694ebc0..cced787e6b6d6299d713118b92e53939ae7f9256 100644 (file)
--- a/arch/arm/cpu/tegra124-common/funcmux.c
+++ b/arch/arm/cpu/tegra124-common/funcmux.c
@@ -20,20 +20,20 @@ int funcmux_select(enum periph_id id, int config)
        case PERIPH_ID_UART4:
                switch (config) {
                case FUNCMUX_UART4_GPIO: /* TXD,RXD,CTS,RTS */
        case PERIPH_ID_UART4:
                switch (config) {
                case FUNCMUX_UART4_GPIO: /* TXD,RXD,CTS,RTS */

-                       pinmux_set_func(PINGRP_GPIO_PJ7, PMUX_FUNC_UARTD);
-                       pinmux_set_func(PINGRP_GPIO_PB0, PMUX_FUNC_UARTD);
-                       pinmux_set_func(PINGRP_GPIO_PB1, PMUX_FUNC_UARTD);
-                       pinmux_set_func(PINGRP_GPIO_PK7, PMUX_FUNC_UARTD);
+                       pinmux_set_func(PMUX_PINGRP_PJ7, PMUX_FUNC_UARTD);
+                       pinmux_set_func(PMUX_PINGRP_PB0, PMUX_FUNC_UARTD);
+                       pinmux_set_func(PMUX_PINGRP_PB1, PMUX_FUNC_UARTD);
+                       pinmux_set_func(PMUX_PINGRP_PK7, PMUX_FUNC_UARTD);

 
 

-                       pinmux_set_io(PINGRP_GPIO_PJ7, PMUX_PIN_OUTPUT);
-                       pinmux_set_io(PINGRP_GPIO_PB0, PMUX_PIN_INPUT);
-                       pinmux_set_io(PINGRP_GPIO_PB1, PMUX_PIN_INPUT);
-                       pinmux_set_io(PINGRP_GPIO_PK7, PMUX_PIN_OUTPUT);
+                       pinmux_set_io(PMUX_PINGRP_PJ7, PMUX_PIN_OUTPUT);
+                       pinmux_set_io(PMUX_PINGRP_PB0, PMUX_PIN_INPUT);
+                       pinmux_set_io(PMUX_PINGRP_PB1, PMUX_PIN_INPUT);
+                       pinmux_set_io(PMUX_PINGRP_PK7, PMUX_PIN_OUTPUT);

 
 

-                       pinmux_tristate_disable(PINGRP_GPIO_PJ7);
-                       pinmux_tristate_disable(PINGRP_GPIO_PB0);
-                       pinmux_tristate_disable(PINGRP_GPIO_PB1);
-                       pinmux_tristate_disable(PINGRP_GPIO_PK7);
+                       pinmux_tristate_disable(PMUX_PINGRP_PJ7);
+                       pinmux_tristate_disable(PMUX_PINGRP_PB0);
+                       pinmux_tristate_disable(PMUX_PINGRP_PB1);
+                       pinmux_tristate_disable(PMUX_PINGRP_PK7);

                        break;
                }
                break;
                        break;
                }
                break;


@@ -41,14 +41,16 @@ int funcmux_select(enum periph_id id, int config)
        case PERIPH_ID_UART1:
                switch (config) {
                case FUNCMUX_UART1_KBC:
        case PERIPH_ID_UART1:
                switch (config) {
                case FUNCMUX_UART1_KBC:

-                       pinmux_set_func(PINGRP_KB_ROW9, PMUX_FUNC_UARTA);
-                       pinmux_set_func(PINGRP_KB_ROW10, PMUX_FUNC_UARTA);
+                       pinmux_set_func(PMUX_PINGRP_KB_ROW9_PS1,
+                                       PMUX_FUNC_UARTA);
+                       pinmux_set_func(PMUX_PINGRP_KB_ROW10_PS2,
+                                       PMUX_FUNC_UARTA);

 
 

-                       pinmux_set_io(PINGRP_KB_ROW9, PMUX_PIN_OUTPUT);
-                       pinmux_set_io(PINGRP_KB_ROW10, PMUX_PIN_INPUT);
+                       pinmux_set_io(PMUX_PINGRP_KB_ROW9_PS1, PMUX_PIN_OUTPUT);
+                       pinmux_set_io(PMUX_PINGRP_KB_ROW10_PS2, PMUX_PIN_INPUT);

 
 

-                       pinmux_tristate_disable(PINGRP_KB_ROW9);
-                       pinmux_tristate_disable(PINGRP_KB_ROW10);
+                       pinmux_tristate_disable(PMUX_PINGRP_KB_ROW9_PS1);
+                       pinmux_tristate_disable(PMUX_PINGRP_KB_ROW10_PS2);

                        break;
                }
                break;
                        break;
                }
                break;

diff --git a/arch/arm/cpu/tegra124-common/pinmux.c b/arch/arm/cpu/tegra124-common/pinmux.c
index a2385653055cba81b57bbc75c790b78eb2abd4f7..c6685eaae1e9817c4de448c2958722da201dbc8f 100644 (file)
--- a/arch/arm/cpu/tegra124-common/pinmux.c
+++ b/arch/arm/cpu/tegra124-common/pinmux.c
@@ -1,68 +1,59 @@
 /*
 /*

- * (C) Copyright 2013
- * NVIDIA Corporation <www.nvidia.com>
+ * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.

  *
  *

- * SPDX-License-Identifier:     GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+

  */
 
  */
 

-/* Tegra124 pin multiplexing functions */
-

 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/pinmux.h>
 
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/pinmux.h>
 

-/* Convenient macro for defining pin group properties */
-#define PIN(pg_name, vdd, f0, f1, f2, f3, iod) \
-       {                                               \
-               .funcs = {                              \
-                       PMUX_FUNC_ ## f0,               \
-                       PMUX_FUNC_ ## f1,               \
-                       PMUX_FUNC_ ## f2,               \
-                       PMUX_FUNC_ ## f3,               \
-               },                                      \
+#define PIN(pin, f0, f1, f2, f3)       \
+       {                               \
+               .funcs = {              \
+                       PMUX_FUNC_##f0, \
+                       PMUX_FUNC_##f1, \
+                       PMUX_FUNC_##f2, \
+                       PMUX_FUNC_##f3, \
+               },                      \

        }
 
        }
 

-/* Input and output pins */
-#define PINI(pg_name, vdd, f0, f1, f2, f3) \
-       PIN(pg_name, vdd, f0, f1, f2, f3, INPUT)
-#define PINO(pg_name, vdd, f0, f1, f2, f3) \
-       PIN(pg_name, vdd, f0, f1, f2, f3, OUTPUT)
-
-/* A pin group number which is not used */
-#define PIN_RESERVED \
-       PIN(NONE, NONE, INVALID, INVALID, INVALID, INVALID, NONE)
+#define PIN_RESERVED {}

 
 

-static const struct pmux_pingrp_desc tegra124_pingroups[PMUX_PINGRP_COUNT] = {
-       /*      NAME      VDD      f0           f1         f2       f3  */
-       PINI(ULPI_DATA0,  BB,      SPI3,       HSI,        UARTA,   ULPI),
-       PINI(ULPI_DATA1,  BB,      SPI3,       HSI,        UARTA,   ULPI),
-       PINI(ULPI_DATA2,  BB,      SPI3,       HSI,        UARTA,   ULPI),
-       PINI(ULPI_DATA3,  BB,      SPI3,        HSI,       UARTA,   ULPI),
-       PINI(ULPI_DATA4,  BB,      SPI2,        HSI,       UARTA,   ULPI),
-       PINI(ULPI_DATA5,  BB,      SPI2,        HSI,       UARTA,   ULPI),
-       PINI(ULPI_DATA6,  BB,      SPI2,        HSI,       UARTA,   ULPI),
-       PINI(ULPI_DATA7,  BB,      SPI2,        HSI,       UARTA,   ULPI),
-       PINI(ULPI_CLK,    BB,      SPI1,       SPI5,       UARTD,   ULPI),
-       PINI(ULPI_DIR,    BB,      SPI1,       SPI5,       UARTD,   ULPI),
-       PINI(ULPI_NXT,    BB,      SPI1,       SPI5,       UARTD,   ULPI),
-       PINI(ULPI_STP,    BB,      SPI1,       SPI5,       UARTD,   ULPI),
-       PINI(DAP3_FS,     BB,      I2S2,       SPI5,       DISPA,   DISPB),
-       PINI(DAP3_DIN,    BB,      I2S2,       SPI5,       DISPA,   DISPB),
-       PINI(DAP3_DOUT,   BB,      I2S2,       SPI5,       DISPA,   DISPB),
-       PINI(DAP3_SCLK,   BB,      I2S2,       SPI5,       DISPA,   DISPB),
-       PINI(GPIO_PV0,    BB,      USB,        RSVD2,      RSVD3,   RSVD4),
-       PINI(GPIO_PV1,    BB,      RSVD1,      RSVD2,      RSVD3,   RSVD4),
-       PINI(SDMMC1_CLK,  SDMMC1,  SDMMC1,     CLK12,      RSVD3,   RSVD4),
-       PINI(SDMMC1_CMD,  SDMMC1,  SDMMC1,     SPDIF,      SPI4,    UARTA),
-       PINI(SDMMC1_DAT3, SDMMC1,  SDMMC1,     SPDIF,      SPI4,    UARTA),
-       PINI(SDMMC1_DAT2, SDMMC1,  SDMMC1,     PWM0,       SPI4,    UARTA),
-       PINI(SDMMC1_DAT1, SDMMC1,  SDMMC1,     PWM1,       SPI4,    UARTA),
-       PINI(SDMMC1_DAT0, SDMMC1,  SDMMC1,     RSVD2,      SPI4,    UARTA),
-       PIN_RESERVED,   /* Reserved: 0x3060 - 0x3064 */
+static const struct pmux_pingrp_desc tegra124_pingroups[] = {
+       /*  pin,                    f0,         f1,       f2,           f3 */
+       /* Offset 0x3000 */
+       PIN(ULPI_DATA0_PO1,         SPI3,       HSI,      UARTA,        ULPI),
+       PIN(ULPI_DATA1_PO2,         SPI3,       HSI,      UARTA,        ULPI),
+       PIN(ULPI_DATA2_PO3,         SPI3,       HSI,      UARTA,        ULPI),
+       PIN(ULPI_DATA3_PO4,         SPI3,       HSI,      UARTA,        ULPI),
+       PIN(ULPI_DATA4_PO5,         SPI2,       HSI,      UARTA,        ULPI),
+       PIN(ULPI_DATA5_PO6,         SPI2,       HSI,      UARTA,        ULPI),
+       PIN(ULPI_DATA6_PO7,         SPI2,       HSI,      UARTA,        ULPI),
+       PIN(ULPI_DATA7_PO0,         SPI2,       HSI,      UARTA,        ULPI),
+       PIN(ULPI_CLK_PY0,           SPI1,       SPI5,     UARTD,        ULPI),
+       PIN(ULPI_DIR_PY1,           SPI1,       SPI5,     UARTD,        ULPI),
+       PIN(ULPI_NXT_PY2,           SPI1,       SPI5,     UARTD,        ULPI),
+       PIN(ULPI_STP_PY3,           SPI1,       SPI5,     UARTD,        ULPI),
+       PIN(DAP3_FS_PP0,            I2S2,       SPI5,     DISPLAYA,     DISPLAYB),
+       PIN(DAP3_DIN_PP1,           I2S2,       SPI5,     DISPLAYA,     DISPLAYB),
+       PIN(DAP3_DOUT_PP2,          I2S2,       SPI5,     DISPLAYA,     RSVD4),
+       PIN(DAP3_SCLK_PP3,          I2S2,       SPI5,     RSVD3,        DISPLAYB),
+       PIN(PV0,                    RSVD1,      RSVD2,    RSVD3,        RSVD4),
+       PIN(PV1,                    RSVD1,      RSVD2,    RSVD3,        RSVD4),
+       PIN(SDMMC1_CLK_PZ0,         SDMMC1,     CLK12,    RSVD3,        RSVD4),
+       PIN(SDMMC1_CMD_PZ1,         SDMMC1,     SPDIF,    SPI4,         UARTA),
+       PIN(SDMMC1_DAT3_PY4,        SDMMC1,     SPDIF,    SPI4,         UARTA),
+       PIN(SDMMC1_DAT2_PY5,        SDMMC1,     PWM0,     SPI4,         UARTA),
+       PIN(SDMMC1_DAT1_PY6,        SDMMC1,     PWM1,     SPI4,         UARTA),
+       PIN(SDMMC1_DAT0_PY7,        SDMMC1,     RSVD2,    SPI4,         UARTA),
+       PIN_RESERVED,
+       PIN_RESERVED,
+       /* Offset 0x3068 */
+       PIN(CLK2_OUT_PW5,           EXTPERIPH2, RSVD2,    RSVD3,        RSVD4),
+       PIN(CLK2_REQ_PCC5,          DAP,        RSVD2,    RSVD3,        RSVD4),
+       PIN_RESERVED,

        PIN_RESERVED,
        PIN_RESERVED,

-       PINI(CLK2_OUT,    SDMMC1,  EXTPERIPH2, RSVD2,      RSVD3,   RSVD4),
-       PINI(CLK2_REQ,    SDMMC1,  DAP,        RSVD2,      RSVD3,   RSVD4),
-       PIN_RESERVED,   /* Reserved: 0x3070 - 0x310c */

        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,


@@ -101,11 +92,11 @@ static const struct pmux_pingrp_desc tegra124_pingroups[PMUX_PINGRP_COUNT] = {
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,

+       /* Offset 0x3110 */
+       PIN(HDMI_INT_PN7,           RSVD1,      RSVD2,    RSVD3,        RSVD4),
+       PIN(DDC_SCL_PV4,            I2C4,       RSVD2,    RSVD3,        RSVD4),
+       PIN(DDC_SDA_PV5,            I2C4,       RSVD2,    RSVD3,        RSVD4),

        PIN_RESERVED,
        PIN_RESERVED,

-       PINI(HDMI_INT,    LCD,     RSVD1,      RSVD2,      RSVD3,   RSVD4),
-       PINI(DDC_SCL,     LCD,     I2C4,       RSVD2,      RSVD3,   RSVD4),
-       PINI(DDC_SDA,     LCD,     I2C4,       RSVD2,      RSVD3,   RSVD4),
-       PIN_RESERVED,   /* Reserved: 0x311c - 0x3160 */

        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,


@@ -123,175 +114,193 @@ static const struct pmux_pingrp_desc tegra124_pingroups[PMUX_PINGRP_COUNT] = {
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,
        PIN_RESERVED,

-       PINI(UART2_RXD,   UART,    UARTB,      SPDIF,      UARTA,   SPI4),
-       PINI(UART2_TXD,   UART,    UARTB,      SPDIF,      UARTA,   SPI4),
-       PINI(UART2_RTS_N, UART,    UARTA,      UARTB,      RSVD3,   SPI4),
-       PINI(UART2_CTS_N, UART,    UARTA,      UARTB,      RSVD3,   SPI4),
-       PINI(UART3_TXD,   UART,    UARTC,      RSVD2,      RSVD3,   SPI4),
-       PINI(UART3_RXD,   UART,    UARTC,      RSVD2,      RSVD3,   SPI4),
-       PINI(UART3_CTS_N, UART,    UARTC,      SDMMC1,     DTV,     SPI4),
-       PINI(UART3_RTS_N, UART,    UARTC,      PWM0,       DTV,     DISPA),
-       PINI(GPIO_PU0,    UART,    OWR,        UARTA,      RSVD3,   RSVD4),
-       PINI(GPIO_PU1,    UART,    RSVD1,      UARTA,      RSVD3,   RSVD4),
-       PINI(GPIO_PU2,    UART,    RSVD1,      UARTA,      RSVD3,   RSVD4),
-       PINI(GPIO_PU3,    UART,    PWM0,       UARTA,      DISPA,   DISPB),
-       PINI(GPIO_PU4,    UART,    PWM1,       UARTA,      DISPA,   DISPB),
-       PINI(GPIO_PU5,    UART,    PWM2,       UARTA,      DISPA,   DISPB),
-       PINI(GPIO_PU6,    UART,    PWM3,       UARTA,      USB,     DISPB),
-       PINI(GEN1_I2C_SDA, UART,   I2C1,       RSVD2,      RSVD3,   RSVD4),
-       PINI(GEN1_I2C_SCL, UART,   I2C1,       RSVD2,      RSVD3,   RSVD4),
-       PINI(DAP4_FS,     UART,    I2S3,       RSVD2,      DTV,     RSVD4),
-       PINI(DAP4_DIN,    UART,    I2S3,       RSVD2,      RSVD3,   RSVD4),
-       PINI(DAP4_DOUT,   UART,    I2S3,       RSVD2,      DTV,     RSVD4),
-       PINI(DAP4_SCLK,   UART,    I2S3,       RSVD2,      RSVD3,   RSVD4),
-       PINI(CLK3_OUT,    UART,    EXTPERIPH3, RSVD2,      RSVD3,   RSVD4),
-       PINI(CLK3_REQ,    UART,    DEV3,       RSVD2,      RSVD3,   RSVD4),
-       PINI(GMI_WP_N,    GMI,     RSVD1,      NAND,       GMI,     GMI_ALT),
-       PINI(GMI_IORDY,   GMI,     SDMMC2,     RSVD2,      GMI,     TRACE),
-       PINI(GMI_WAIT,    GMI,     SPI4,       NAND,       GMI,     DTV),
-       PINI(GMI_ADV_N,   GMI,     RSVD1,      NAND,       GMI,     TRACE),
-       PINI(GMI_CLK,     GMI,     SDMMC2,     NAND,       GMI,     TRACE),
-       PINI(GMI_CS0_N,   GMI,     RSVD1,      NAND,       GMI,     USB),
-       PINI(GMI_CS1_N,   GMI,     RSVD1,      NAND,       GMI,     SOC),
-       PINI(GMI_CS2_N,   GMI,     SDMMC2,     NAND,       GMI,     TRACE),
-       PINI(GMI_CS3_N,   GMI,     SDMMC2,     NAND,       GMI,     GMI_ALT),
-       PINI(GMI_CS4_N,   GMI,     USB,        NAND,       GMI,     TRACE),
-       PINI(GMI_CS6_N,   GMI,     NAND,       NAND_ALT,   GMI,     SPI4),
-       PINI(GMI_CS7_N,   GMI,     NAND,       NAND_ALT,   GMI,     SDMMC2),
-       PINI(GMI_AD0,     GMI,     RSVD1,      NAND,       GMI,     RSVD4),
-       PINI(GMI_AD1,     GMI,     RSVD1,      NAND,       GMI,     RSVD4),
-       PINI(GMI_AD2,     GMI,     RSVD1,      NAND,       GMI,     RSVD4),
-       PINI(GMI_AD3,     GMI,     RSVD1,      NAND,       GMI,     RSVD4),
-       PINI(GMI_AD4,     GMI,     RSVD1,      NAND,       GMI,     RSVD4),
-       PINI(GMI_AD5,     GMI,     RSVD1,      NAND,       GMI,     SPI4),
-       PINI(GMI_AD6,     GMI,     RSVD1,      NAND,       GMI,     SPI4),
-       PINI(GMI_AD7,     GMI,     RSVD1,      NAND,       GMI,     SPI4),
-       PINI(GMI_AD8,     GMI,     PWM0,       NAND,       GMI,     DTV),
-       PINI(GMI_AD9,     GMI,     PWM1,       NAND,       GMI,     CLDVFS),
-       PINI(GMI_AD10,    GMI,     PWM2,       NAND,       GMI,     CLDVFS),
-       PINI(GMI_AD11,    GMI,     PWM3,       NAND,       GMI,     USB),
-       PINI(GMI_AD12,    GMI,     SDMMC2,     NAND,       GMI,     RSVD4),
-       PINI(GMI_AD13,    GMI,     SDMMC2,     NAND,       GMI,     RSVD4),
-       PINI(GMI_AD14,    GMI,     SDMMC2,     NAND,       GMI,     DTV),
-       PINI(GMI_AD15,    GMI,     SDMMC2,     NAND,       GMI,     DTV),
-       PINI(GMI_A16,     GMI,     UARTD,      TRACE,      GMI,     GMI_ALT),
-       PINI(GMI_A17,     GMI,     UARTD,      RSVD2,      GMI,     TRACE),
-       PINI(GMI_A18,     GMI,     UARTD,      RSVD2,      GMI,     TRACE),
-       PINI(GMI_A19,     GMI,     UARTD,      SPI4,       GMI,     TRACE),
-       PINI(GMI_WR_N,    GMI,     RSVD1,      NAND,       GMI,     SPI4),
-       PINI(GMI_OE_N,    GMI,     RSVD1,      NAND,       GMI,     SOC),
-       PINI(GMI_DQS,     GMI,     SDMMC2,     NAND,       GMI,     TRACE),
-       PINI(GMI_RST_N,   GMI,     NAND,       NAND_ALT,   GMI,     RSVD4),
-       PINI(GEN2_I2C_SCL, GMI,    I2C2,       RSVD2,      GMI,     RSVD4),
-       PINI(GEN2_I2C_SDA, GMI,    I2C2,       RSVD2,      GMI,     RSVD4),
-       PINI(SDMMC4_CLK,  SDMMC4,  SDMMC4,     RSVD2,      GMI,     RSVD4),
-       PINI(SDMMC4_CMD,  SDMMC4,  SDMMC4,     RSVD2,      GMI,     RSVD4),
-       PINI(SDMMC4_DAT0, SDMMC4,  SDMMC4,     SPI3,       GMI,     RSVD4),
-       PINI(SDMMC4_DAT1, SDMMC4,  SDMMC4,     SPI3,       GMI,     RSVD4),
-       PINI(SDMMC4_DAT2, SDMMC4,  SDMMC4,     SPI3,       GMI,     RSVD4),
-       PINI(SDMMC4_DAT3, SDMMC4,  SDMMC4,     SPI3,       GMI,     RSVD4),
-       PINI(SDMMC4_DAT4, SDMMC4,  SDMMC4,     SPI3,       GMI,     RSVD4),
-       PINI(SDMMC4_DAT5, SDMMC4,  SDMMC4,     SPI3,       GMI,     RSVD4),
-       PINI(SDMMC4_DAT6, SDMMC4,  SDMMC4,     SPI3,       GMI,     RSVD4),
-       PINI(SDMMC4_DAT7, SDMMC4,  SDMMC4,     RSVD2,      GMI,     RSVD4),
-       PIN_RESERVED,   /* Reserved: 0x3280 */
-       PINI(CAM_MCLK,    CAM,     VI,         VI_ALT1,    VI_ALT3, RSVD4),
-       PINI(GPIO_PCC1,   CAM,     I2S4,       RSVD2,      RSVD3,   RSVD4),
-       PINI(GPIO_PBB0,   CAM,     I2S4,       VI,         VI_ALT1, VI_ALT3),
-       PINI(CAM_I2C_SCL, CAM,     VGP1,       I2C3,       RSVD3,   RSVD4),
-       PINI(CAM_I2C_SDA, CAM,     VGP2,       I2C3,       RSVD3,   RSVD4),
-       PINI(GPIO_PBB3,   CAM,     VGP3,       DISPA,      DISPB,   RSVD4),
-       PINI(GPIO_PBB4,   CAM,     VGP4,       DISPA,      DISPB,   RSVD4),
-       PINI(GPIO_PBB5,   CAM,     VGP5,       DISPA,      DISPB,   RSVD4),
-       PINI(GPIO_PBB6,   CAM,     VGP6,       DISPA,      DISPB,   RSVD4),
-       PINI(GPIO_PBB7,   CAM,     I2S4,       RSVD2,      RSVD3,   RSVD4),
-       PINI(GPIO_PCC2,   CAM,     I2S4,       RSVD2,      RSVD3,   RSVD4),
-       PINI(JTAG_RTCK,   SYS,     RTCK,       RSVD2,      RSVD3,   RSVD4),
-       PINI(PWR_I2C_SCL, SYS,     I2CPWR,     RSVD2,      RSVD3,   RSVD4),
-       PINI(PWR_I2C_SDA, SYS,     I2CPWR,     RSVD2,      RSVD3,   RSVD4),
-       PINI(KB_ROW0,     SYS,     KBC,        RSVD2,      DTV,     RSVD4),
-       PINI(KB_ROW1,     SYS,     KBC,        RSVD2,      DTV,     RSVD4),
-       PINI(KB_ROW2,     SYS,     KBC,        RSVD2,      DTV,     SOC),
-       PINI(KB_ROW3,     SYS,     KBC,        DISPA,      RSVD3,   DISPB),
-       PINI(KB_ROW4,     SYS,     KBC,        DISPA,      SPI2,    DISPB),
-       PINI(KB_ROW5,     SYS,     KBC,        DISPA,      SPI2,    DISPB),
-       PINI(KB_ROW6,     SYS,     KBC,        DISPA,      RSVD3,   DISPB),
-       PINI(KB_ROW7,     SYS,     KBC,        RSVD2,      CLDVFS,  UARTA),
-       PINI(KB_ROW8,     SYS,     KBC,        RSVD2,      RSVD3,   UARTA),
-       PINI(KB_ROW9,     SYS,     KBC,        RSVD2,      RSVD3,   UARTA),
-       PINI(KB_ROW10,    SYS,     KBC,        RSVD2,      RSVD3,   UARTA),
-       PIN_RESERVED,   /* Reserved: 0x32e8 - 0x32f8 */
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PINI(KB_COL0,     SYS,     KBC,        USB,        SPI2,    EMC_DLL),
-       PINI(KB_COL1,     SYS,     KBC,        RSVD2,      SPI2,    EMC_DLL),
-       PINI(KB_COL2,     SYS,     KBC,        RSVD2,      SPI2,    RSVD4),
-       PINI(KB_COL3,     SYS,     KBC,        DISPA,      PWM2,    UARTA),
-       PINI(KB_COL4,     SYS,     KBC,        OWR,        SDMMC3,  UARTA),
-       PINI(KB_COL5,     SYS,     KBC,        RSVD2,      SDMMC1,  RSVD4),
-       PINI(KB_COL6,     SYS,     KBC,        RSVD2,      SPI2,    RSVD4),
-       PINI(KB_COL7,     SYS,     KBC,        RSVD2,      SPI2,    RSVD4),
-       PINI(CLK_32K_OUT, SYS,     BLINK,      SOC,        RSVD3,   RSVD4),
-       PINI(SYS_CLK_REQ, SYS,     SYSCLK,     RSVD2,      RSVD3,   RSVD4),
-       PINI(CORE_PWR_REQ, SYS,    PWRON,      RSVD2,      RSVD3,   RSVD4),
-       PINI(CPU_PWR_REQ, SYS,     CPU,        RSVD2,      RSVD3,   RSVD4),
-       PINI(PWR_INT_N,   SYS,     PMI,        RSVD2,      RSVD3,   RSVD4),
-       PINI(CLK_32K_IN,  SYS,     CLK,        RSVD2,      RSVD3,   RSVD4),
-       PINI(OWR,         SYS,     OWR,        RSVD2,      RSVD3,   RSVD4),
-       PINI(DAP1_FS,     AUDIO,   I2S0,       HDA,        GMI,     RSVD4),
-       PINI(DAP1_DIN,    AUDIO,   I2S0,       HDA,        GMI,     RSVD4),
-       PINI(DAP1_DOUT,   AUDIO,   I2S0,       HDA,        GMI,     RSVD4),
-       PINI(DAP1_SCLK,   AUDIO,   I2S0,       HDA,        GMI,     RSVD4),
-       PINI(CLK1_REQ,    AUDIO,   DAP,        DAP1,       RSVD3,   RSVD4),
-       PINI(CLK1_OUT,    AUDIO,   EXTPERIPH1, DAP2,       RSVD3,   RSVD4),
-       PINI(SPDIF_IN,    AUDIO,   SPDIF,      USB,        RSVD3,   RSVD4),
-       PINI(SPDIF_OUT,   AUDIO,   SPDIF,      RSVD2,      RSVD3,   RSVD4),
-       PINI(DAP2_FS,     AUDIO,   I2S1,       HDA,        RSVD3,   RSVD4),
-       PINI(DAP2_DIN,    AUDIO,   I2S1,       HDA,        RSVD3,   RSVD4),
-       PINI(DAP2_DOUT,   AUDIO,   I2S1,       HDA,        RSVD3,   RSVD4),
-       PINI(DAP2_SCLK,   AUDIO,   I2S1,       HDA,        RSVD3,   RSVD4),
-       PINI(DVFS_PWM,    AUDIO,   SPI6,       CLDVFS,     RSVD3,   RSVD4),
-       PINI(GPIO_X1_AUD, AUDIO,   SPI6,       RSVD2,      RSVD3,   RSVD4),
-       PINI(GPIO_X3_AUD, AUDIO,   SPI6,       SPI1,       RSVD3,   RSVD4),
-       PINI(DVFS_CLK,    AUDIO,   SPI6,       CLDVFS,     RSVD3,   RSVD4),
-       PINI(GPIO_X4_AUD, AUDIO,   RSVD1,      SPI1,       SPI2,    DAP2),
-       PINI(GPIO_X5_AUD, AUDIO,   RSVD1,      SPI1,       SPI2,    RSVD4),
-       PINI(GPIO_X6_AUD, AUDIO,   SPI6,       SPI1,       SPI2,    RSVD4),
-       PINI(GPIO_X7_AUD, AUDIO,   RSVD1,      SPI1,       SPI2,    RSVD4),
-       PIN_RESERVED,   /* Reserved: 0x3388 - 0x338c */
-       PIN_RESERVED,
-       PINI(SDMMC3_CLK,  SDMMC3,  SDMMC3,     RSVD2,      RSVD3,   SPI3),
-       PINI(SDMMC3_CMD,  SDMMC3,  SDMMC3,     PWM3,       UARTA,   SPI3),
-       PINI(SDMMC3_DAT0, SDMMC3,  SDMMC3,     RSVD2,      RSVD3,   SPI3),
-       PINI(SDMMC3_DAT1, SDMMC3,  SDMMC3,     PWM2,       UARTA,   SPI3),
-       PINI(SDMMC3_DAT2, SDMMC3,  SDMMC3,     PWM1,       DISPA,   SPI3),
-       PINI(SDMMC3_DAT3, SDMMC3,  SDMMC3,     PWM0,       DISPB,   SPI3),
-       PIN_RESERVED,   /* Reserved: 0x33a8 - 0x33dc */
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PIN_RESERVED,
-       PINI(HDMI_CEC,    SYS,     CEC,        SDMMC3,     RSVD3,   SOC),
-       PINI(SDMMC1_WP_N, SDMMC1,  SDMMC1,     CLK12,      SPI4,    UARTA),
-       PINI(SDMMC3_CD_N, SYS,  SDMMC3,     OWR,        RSVD3,   RSVD4),
-       PINI(GPIO_W2_AUD, AUDIO,   SPI6,       RSVD2,      SPI2,    I2C1),
-       PINI(GPIO_W3_AUD, AUDIO,   SPI6,       SPI1,       SPI2,    I2C1),
-       PINI(USB_VBUS_EN0, LCD,    USB,        RSVD2,      RSVD3,   RSVD4),
-       PINI(USB_VBUS_EN1, LCD,    USB,        RSVD2,      RSVD3,   RSVD4),
-       PINI(SDMMC3_CLK_LB_IN,  SDMMC3, SDMMC3, RSVD2,     RSVD3,   RSVD4),
-       PINI(SDMMC3_CLK_LB_OUT, SDMMC3, SDMMC3, RSVD2,     RSVD3,   RSVD4),
-       PIN_RESERVED,   /* Reserved: 0x3404 */
-       PINO(RESET_OUT_N, SYS,     RSVD1,      RSVD2,      RSVD3, RESET_OUT_N),
+       /* Offset 0x3164 */
+       PIN(UART2_RXD_PC3,          IRDA,       SPDIF,    UARTA,        SPI4),
+       PIN(UART2_TXD_PC2,          IRDA,       SPDIF,    UARTA,        SPI4),
+       PIN(UART2_RTS_N_PJ6,        UARTA,      UARTB,    GMI,          SPI4),
+       PIN(UART2_CTS_N_PJ5,        UARTA,      UARTB,    GMI,          SPI4),
+       PIN(UART3_TXD_PW6,          UARTC,      RSVD2,    GMI,          SPI4),
+       PIN(UART3_RXD_PW7,          UARTC,      RSVD2,    GMI,          SPI4),
+       PIN(UART3_CTS_N_PA1,        UARTC,      SDMMC1,   DTV,          GMI),
+       PIN(UART3_RTS_N_PC0,        UARTC,      PWM0,     DTV,          GMI),
+       PIN(PU0,                    OWR,        UARTA,    GMI,          RSVD4),
+       PIN(PU1,                    RSVD1,      UARTA,    GMI,          RSVD4),
+       PIN(PU2,                    RSVD1,      UARTA,    GMI,          RSVD4),
+       PIN(PU3,                    PWM0,       UARTA,    GMI,          DISPLAYB),
+       PIN(PU4,                    PWM1,       UARTA,    GMI,          DISPLAYB),
+       PIN(PU5,                    PWM2,       UARTA,    GMI,          DISPLAYB),
+       PIN(PU6,                    PWM3,       UARTA,    RSVD3,        GMI),
+       PIN(GEN1_I2C_SDA_PC5,       I2C1,       RSVD2,    RSVD3,        RSVD4),
+       PIN(GEN1_I2C_SCL_PC4,       I2C1,       RSVD2,    RSVD3,        RSVD4),
+       PIN(DAP4_FS_PP4,            I2S3,       GMI,      DTV,          RSVD4),
+       PIN(DAP4_DIN_PP5,           I2S3,       GMI,      RSVD3,        RSVD4),
+       PIN(DAP4_DOUT_PP6,          I2S3,       GMI,      DTV,          RSVD4),
+       PIN(DAP4_SCLK_PP7,          I2S3,       GMI,      RSVD3,        RSVD4),
+       PIN(CLK3_OUT_PEE0,          EXTPERIPH3, RSVD2,    RSVD3,        RSVD4),
+       PIN(CLK3_REQ_PEE1,          DEV3,       RSVD2,    RSVD3,        RSVD4),
+       PIN(PC7,                    RSVD1,      RSVD2,    GMI,          GMI_ALT),
+       PIN(PI5,                    SDMMC2,     RSVD2,    GMI,          RSVD4),
+       PIN(PI7,                    RSVD1,      TRACE,    GMI,          DTV),
+       PIN(PK0,                    RSVD1,      SDMMC3,   GMI,          SOC),
+       PIN(PK1,                    SDMMC2,     TRACE,    GMI,          RSVD4),
+       PIN(PJ0,                    RSVD1,      RSVD2,    GMI,          USB),
+       PIN(PJ2,                    RSVD1,      RSVD2,    GMI,          SOC),
+       PIN(PK3,                    SDMMC2,     TRACE,    GMI,          CCLA),
+       PIN(PK4,                    SDMMC2,     RSVD2,    GMI,          GMI_ALT),
+       PIN(PK2,                    RSVD1,      RSVD2,    GMI,          RSVD4),
+       PIN(PI3,                    RSVD1,      RSVD2,    GMI,          SPI4),
+       PIN(PI6,                    RSVD1,      RSVD2,    GMI,          SDMMC2),
+       PIN(PG0,                    RSVD1,      RSVD2,    GMI,          RSVD4),
+       PIN(PG1,                    RSVD1,      RSVD2,    GMI,          RSVD4),
+       PIN(PG2,                    RSVD1,      TRACE,    GMI,          RSVD4),
+       PIN(PG3,                    RSVD1,      TRACE,    GMI,          RSVD4),
+       PIN(PG4,                    RSVD1,      TMDS,     GMI,          SPI4),
+       PIN(PG5,                    RSVD1,      RSVD2,    GMI,          SPI4),
+       PIN(PG6,                    RSVD1,      RSVD2,    GMI,          SPI4),
+       PIN(PG7,                    RSVD1,      RSVD2,    GMI,          SPI4),
+       PIN(PH0,                    PWM0,       TRACE,    GMI,          DTV),
+       PIN(PH1,                    PWM1,       TMDS,     GMI,          DISPLAYA),
+       PIN(PH2,                    PWM2,       TMDS,     GMI,          CLDVFS),
+       PIN(PH3,                    PWM3,       SPI4,     GMI,          CLDVFS),
+       PIN(PH4,                    SDMMC2,     RSVD2,    GMI,          RSVD4),
+       PIN(PH5,                    SDMMC2,     RSVD2,    GMI,          RSVD4),
+       PIN(PH6,                    SDMMC2,     TRACE,    GMI,          DTV),
+       PIN(PH7,                    SDMMC2,     TRACE,    GMI,          DTV),
+       PIN(PJ7,                    UARTD,      RSVD2,    GMI,          GMI_ALT),
+       PIN(PB0,                    UARTD,      RSVD2,    GMI,          RSVD4),
+       PIN(PB1,                    UARTD,      RSVD2,    GMI,          RSVD4),
+       PIN(PK7,                    UARTD,      RSVD2,    GMI,          RSVD4),
+       PIN(PI0,                    RSVD1,      RSVD2,    GMI,          RSVD4),
+       PIN(PI1,                    RSVD1,      RSVD2,    GMI,          RSVD4),
+       PIN(PI2,                    SDMMC2,     TRACE,    GMI,          RSVD4),
+       PIN(PI4,                    SPI4,       TRACE,    GMI,          DISPLAYA),
+       PIN(GEN2_I2C_SCL_PT5,       I2C2,       RSVD2,    GMI,          RSVD4),
+       PIN(GEN2_I2C_SDA_PT6,       I2C2,       RSVD2,    GMI,          RSVD4),
+       PIN(SDMMC4_CLK_PCC4,        SDMMC4,     RSVD2,    GMI,          RSVD4),
+       PIN(SDMMC4_CMD_PT7,         SDMMC4,     RSVD2,    GMI,          RSVD4),
+       PIN(SDMMC4_DAT0_PAA0,       SDMMC4,     SPI3,     GMI,          RSVD4),
+       PIN(SDMMC4_DAT1_PAA1,       SDMMC4,     SPI3,     GMI,          RSVD4),
+       PIN(SDMMC4_DAT2_PAA2,       SDMMC4,     SPI3,     GMI,          RSVD4),
+       PIN(SDMMC4_DAT3_PAA3,       SDMMC4,     SPI3,     GMI,          RSVD4),
+       PIN(SDMMC4_DAT4_PAA4,       SDMMC4,     SPI3,     GMI,          RSVD4),
+       PIN(SDMMC4_DAT5_PAA5,       SDMMC4,     SPI3,     RSVD3,        RSVD4),
+       PIN(SDMMC4_DAT6_PAA6,       SDMMC4,     SPI3,     GMI,          RSVD4),
+       PIN(SDMMC4_DAT7_PAA7,       SDMMC4,     RSVD2,    GMI,          RSVD4),
+       PIN_RESERVED,
+       /* Offset 0x3284 */
+       PIN(CAM_MCLK_PCC0,          VI,         VI_ALT1,  VI_ALT3,      SDMMC2),
+       PIN(PCC1,                   I2S4,       RSVD2,    RSVD3,        SDMMC2),
+       PIN(PBB0,                   VGP6,       VIMCLK2,  SDMMC2,       VIMCLK2_ALT),
+       PIN(CAM_I2C_SCL_PBB1,       VGP1,       I2C3,     RSVD3,        SDMMC2),
+       PIN(CAM_I2C_SDA_PBB2,       VGP2,       I2C3,     RSVD3,        SDMMC2),
+       PIN(PBB3,                   VGP3,       DISPLAYA, DISPLAYB,     SDMMC2),
+       PIN(PBB4,                   VGP4,       DISPLAYA, DISPLAYB,     SDMMC2),
+       PIN(PBB5,                   VGP5,       DISPLAYA, RSVD3,        SDMMC2),
+       PIN(PBB6,                   I2S4,       RSVD2,    DISPLAYB,     SDMMC2),
+       PIN(PBB7,                   I2S4,       RSVD2,    RSVD3,        SDMMC2),
+       PIN(PCC2,                   I2S4,       RSVD2,    SDMMC3,       SDMMC2),
+       PIN(JTAG_RTCK,              RTCK,       RSVD2,    RSVD3,        RSVD4),
+       PIN(PWR_I2C_SCL_PZ6,        I2CPWR,     RSVD2,    RSVD3,        RSVD4),
+       PIN(PWR_I2C_SDA_PZ7,        I2CPWR,     RSVD2,    RSVD3,        RSVD4),
+       PIN(KB_ROW0_PR0,            KBC,        RSVD2,    RSVD3,        RSVD4),
+       PIN(KB_ROW1_PR1,            KBC,        RSVD2,    RSVD3,        RSVD4),
+       PIN(KB_ROW2_PR2,            KBC,        RSVD2,    RSVD3,        RSVD4),
+       PIN(KB_ROW3_PR3,            KBC,        DISPLAYA, SYS,          DISPLAYB),
+       PIN(KB_ROW4_PR4,            KBC,        DISPLAYA, RSVD3,        DISPLAYB),
+       PIN(KB_ROW5_PR5,            KBC,        DISPLAYA, RSVD3,        DISPLAYB),
+       PIN(KB_ROW6_PR6,            KBC,        DISPLAYA, DISPLAYA_ALT, DISPLAYB),
+       PIN(KB_ROW7_PR7,            KBC,        RSVD2,    CLDVFS,       UARTA),
+       PIN(KB_ROW8_PS0,            KBC,        RSVD2,    CLDVFS,       UARTA),
+       PIN(KB_ROW9_PS1,            KBC,        RSVD2,    RSVD3,        UARTA),
+       PIN(KB_ROW10_PS2,           KBC,        RSVD2,    RSVD3,        UARTA),
+       PIN(KB_ROW11_PS3,           KBC,        RSVD2,    RSVD3,        IRDA),
+       PIN(KB_ROW12_PS4,           KBC,        RSVD2,    RSVD3,        IRDA),
+       PIN(KB_ROW13_PS5,           KBC,        RSVD2,    SPI2,         RSVD4),
+       PIN(KB_ROW14_PS6,           KBC,        RSVD2,    SPI2,         RSVD4),
+       PIN(KB_ROW15_PS7,           KBC,        SOC,      RSVD3,        RSVD4),
+       PIN(KB_COL0_PQ0,            KBC,        RSVD2,    SPI2,         RSVD4),
+       PIN(KB_COL1_PQ1,            KBC,        RSVD2,    SPI2,         RSVD4),
+       PIN(KB_COL2_PQ2,            KBC,        RSVD2,    SPI2,         RSVD4),
+       PIN(KB_COL3_PQ3,            KBC,        DISPLAYA, PWM2,         UARTA),
+       PIN(KB_COL4_PQ4,            KBC,        OWR,      SDMMC3,       UARTA),
+       PIN(KB_COL5_PQ5,            KBC,        RSVD2,    SDMMC3,       RSVD4),
+       PIN(KB_COL6_PQ6,            KBC,        RSVD2,    SPI2,         UARTD),
+       PIN(KB_COL7_PQ7,            KBC,        RSVD2,    SPI2,         UARTD),
+       PIN(CLK_32K_OUT_PA0,        BLINK,      SOC,      RSVD3,        RSVD4),
+       PIN_RESERVED,
+       /* Offset 0x3324 */
+       PIN(CORE_PWR_REQ,           PWRON,      RSVD2,    RSVD3,        RSVD4),
+       PIN(CPU_PWR_REQ,            CPU,        RSVD2,    RSVD3,        RSVD4),
+       PIN(PWR_INT_N,              PMI,        RSVD2,    RSVD3,        RSVD4),
+       PIN(CLK_32K_IN,             CLK,        RSVD2,    RSVD3,        RSVD4),
+       PIN(OWR,                    OWR,        RSVD2,    RSVD3,        RSVD4),
+       PIN(DAP1_FS_PN0,            I2S0,       HDA,      GMI,          RSVD4),
+       PIN(DAP1_DIN_PN1,           I2S0,       HDA,      GMI,          RSVD4),
+       PIN(DAP1_DOUT_PN2,          I2S0,       HDA,      GMI,          SATA),
+       PIN(DAP1_SCLK_PN3,          I2S0,       HDA,      GMI,          RSVD4),
+       PIN(DAP_MCLK1_REQ_PEE2,     DAP,        DAP1,     SATA,         RSVD4),
+       PIN(DAP_MCLK1_PW4,          EXTPERIPH1, DAP2,     RSVD3,        RSVD4),
+       PIN(SPDIF_IN_PK6,           SPDIF,      RSVD2,    RSVD3,        I2C3),
+       PIN(SPDIF_OUT_PK5,          SPDIF,      RSVD2,    RSVD3,        I2C3),
+       PIN(DAP2_FS_PA2,            I2S1,       HDA,      GMI,          RSVD4),
+       PIN(DAP2_DIN_PA4,           I2S1,       HDA,      GMI,          RSVD4),
+       PIN(DAP2_DOUT_PA5,          I2S1,       HDA,      GMI,          RSVD4),
+       PIN(DAP2_SCLK_PA3,          I2S1,       HDA,      GMI,          RSVD4),
+       PIN(DVFS_PWM_PX0,           SPI6,       CLDVFS,   GMI,          RSVD4),
+       PIN(GPIO_X1_AUD_PX1,        SPI6,       RSVD2,    GMI,          RSVD4),
+       PIN(GPIO_X3_AUD_PX3,        SPI6,       SPI1,     GMI,          RSVD4),
+       PIN(DVFS_CLK_PX2,           SPI6,       CLDVFS,   GMI,          RSVD4),
+       PIN(GPIO_X4_AUD_PX4,        GMI,        SPI1,     SPI2,         DAP2),
+       PIN(GPIO_X5_AUD_PX5,        GMI,        SPI1,     SPI2,         RSVD4),
+       PIN(GPIO_X6_AUD_PX6,        SPI6,       SPI1,     SPI2,         GMI),
+       PIN(GPIO_X7_AUD_PX7,        RSVD1,      SPI1,     SPI2,         RSVD4),
+       PIN_RESERVED,
+       PIN_RESERVED,
+       /* Offset 0x3390 */
+       PIN(SDMMC3_CLK_PA6,         SDMMC3,     RSVD2,    RSVD3,        SPI3),
+       PIN(SDMMC3_CMD_PA7,         SDMMC3,     PWM3,     UARTA,        SPI3),
+       PIN(SDMMC3_DAT0_PB7,        SDMMC3,     RSVD2,    RSVD3,        SPI3),
+       PIN(SDMMC3_DAT1_PB6,        SDMMC3,     PWM2,     UARTA,        SPI3),
+       PIN(SDMMC3_DAT2_PB5,        SDMMC3,     PWM1,     DISPLAYA,     SPI3),
+       PIN(SDMMC3_DAT3_PB4,        SDMMC3,     PWM0,     DISPLAYB,     SPI3),
+       PIN_RESERVED,
+       PIN_RESERVED,
+       PIN_RESERVED,
+       PIN_RESERVED,
+       PIN_RESERVED,
+       /* Offset 0x33bc */
+       PIN(PEX_L0_RST_N_PDD1,      PE0,        RSVD2,    RSVD3,        RSVD4),
+       PIN(PEX_L0_CLKREQ_N_PDD2,   PE0,        RSVD2,    RSVD3,        RSVD4),
+       PIN(PEX_WAKE_N_PDD3,        PE,         RSVD2,    RSVD3,        RSVD4),
+       PIN_RESERVED,
+       /* Offset 0x33cc */
+       PIN(PEX_L1_RST_N_PDD5,      PE1,        RSVD2,    RSVD3,        RSVD4),
+       PIN(PEX_L1_CLKREQ_N_PDD6,   PE1,        RSVD2,    RSVD3,        RSVD4),
+       PIN_RESERVED,
+       PIN_RESERVED,
+       PIN_RESERVED,
+       /* Offset 0x33e0 */
+       PIN(HDMI_CEC_PEE3,          CEC,        RSVD2,    RSVD3,        RSVD4),
+       PIN(SDMMC1_WP_N_PV3,        SDMMC1,     CLK12,    SPI4,         UARTA),
+       PIN(SDMMC3_CD_N_PV2,        SDMMC3,     OWR,      RSVD3,        RSVD4),
+       PIN(GPIO_W2_AUD_PW2,        SPI6,       RSVD2,    SPI2,         I2C1),
+       PIN(GPIO_W3_AUD_PW3,        SPI6,       SPI1,     SPI2,         I2C1),
+       PIN(USB_VBUS_EN0_PN4,       USB,        RSVD2,    RSVD3,        RSVD4),
+       PIN(USB_VBUS_EN1_PN5,       USB,        RSVD2,    RSVD3,        RSVD4),
+       PIN(SDMMC3_CLK_LB_IN_PEE5,  SDMMC3,     RSVD2,    RSVD3,        RSVD4),
+       PIN(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3,     RSVD2,    RSVD3,        RSVD4),
+       PIN(GMI_CLK_LB,             SDMMC2,     RSVD2,    GMI,          RSVD4),
+       PIN(RESET_OUT_N,            RSVD1,      RSVD2,    RSVD3,        RESET_OUT_N),
+       PIN(KB_ROW16_PT0,           KBC,        RSVD2,    RSVD3,        UARTC),
+       PIN(KB_ROW17_PT1,           KBC,        RSVD2,    RSVD3,        UARTC),
+       PIN(USB_VBUS_EN2_PFF1,      USB,        RSVD2,    RSVD3,        RSVD4),
+       PIN(PFF2,                   SATA,       RSVD2,    RSVD3,        RSVD4),
+       PIN_RESERVED,
+       PIN_RESERVED,
+       PIN_RESERVED,
+       PIN_RESERVED,
+       PIN_RESERVED,
+       /* Offset 0x3430 */
+       PIN(DP_HPD_PFF0,            DP,         RSVD2,    RSVD3,        RSVD4),

 };
 const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra124_pingroups;
 };
 const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra124_pingroups;

diff --git a/arch/arm/include/asm/arch-tegra124/pinmux.h b/arch/arm/include/asm/arch-tegra124/pinmux.h
index b3759067120290c912162daace8a0fd4d64c93d4..70254b5c731e13209d1250ffc1076d8c5d667257 100644 (file)
--- a/arch/arm/include/asm/arch-tegra124/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra124/pinmux.h
@@ -1,382 +1,333 @@
 /*
 /*

- * (C) Copyright 2013
- * NVIDIA Corporation <www.nvidia.com>
+ * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.

  *
  *

- * SPDX-License-Identifier:     GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+

  */
 
 #ifndef _TEGRA124_PINMUX_H_
 #define _TEGRA124_PINMUX_H_
 
  */
 
 #ifndef _TEGRA124_PINMUX_H_
 #define _TEGRA124_PINMUX_H_
 

-/*
- * Pin groups which we adjust. There are three basic attributes of each pin
- * group which use this enum:
- *
- *     - function
- *     - pullup / pulldown
- *     - tristate or normal
- */

 enum pmux_pingrp {
 enum pmux_pingrp {

-       PINGRP_ULPI_DATA0 = 0,  /* offset 0x3000 */
-       PINGRP_ULPI_DATA1,
-       PINGRP_ULPI_DATA2,
-       PINGRP_ULPI_DATA3,
-       PINGRP_ULPI_DATA4,
-       PINGRP_ULPI_DATA5,
-       PINGRP_ULPI_DATA6,
-       PINGRP_ULPI_DATA7,
-       PINGRP_ULPI_CLK,
-       PINGRP_ULPI_DIR,
-       PINGRP_ULPI_NXT,
-       PINGRP_ULPI_STP,
-       PINGRP_DAP3_FS,
-       PINGRP_DAP3_DIN,
-       PINGRP_DAP3_DOUT,
-       PINGRP_DAP3_SCLK,
-       PINGRP_GPIO_PV0,
-       PINGRP_GPIO_PV1,
-       PINGRP_SDMMC1_CLK,
-       PINGRP_SDMMC1_CMD,
-       PINGRP_SDMMC1_DAT3,
-       PINGRP_SDMMC1_DAT2,
-       PINGRP_SDMMC1_DAT1,
-       PINGRP_SDMMC1_DAT0,
-       PINGRP_CLK2_OUT = PINGRP_SDMMC1_DAT0 + 3,
-       PINGRP_CLK2_REQ,
-       PINGRP_HDMI_INT = PINGRP_CLK2_REQ + 41,
-       PINGRP_DDC_SCL,
-       PINGRP_DDC_SDA,
-       PINGRP_UART2_RXD = PINGRP_DDC_SDA + 19,
-       PINGRP_UART2_TXD,
-       PINGRP_UART2_RTS_N,
-       PINGRP_UART2_CTS_N,
-       PINGRP_UART3_TXD,
-       PINGRP_UART3_RXD,
-       PINGRP_UART3_CTS_N,
-       PINGRP_UART3_RTS_N,
-       PINGRP_GPIO_PU0,
-       PINGRP_GPIO_PU1,
-       PINGRP_GPIO_PU2,
-       PINGRP_GPIO_PU3,
-       PINGRP_GPIO_PU4,
-       PINGRP_GPIO_PU5,
-       PINGRP_GPIO_PU6,
-       PINGRP_GEN1_I2C_SDA,
-       PINGRP_GEN1_I2C_SCL,
-       PINGRP_DAP4_FS,
-       PINGRP_DAP4_DIN,
-       PINGRP_DAP4_DOUT,
-       PINGRP_DAP4_SCLK,
-       PINGRP_CLK3_OUT,
-       PINGRP_CLK3_REQ,
-       /* Renamed on Tegra124, from GMI_xx to GPIO_Pxx */
-       PINGRP_GPIO_PC7,                        /* offset 0x31c0 */
-       PINGRP_GPIO_PI5,
-       PINGRP_GPIO_PI7,
-       PINGRP_GPIO_PK0,
-       PINGRP_GPIO_PK1,
-       PINGRP_GPIO_PJ0,
-       PINGRP_GPIO_PJ2,
-       PINGRP_GPIO_PK3,
-       PINGRP_GPIO_PK4,
-       PINGRP_GPIO_PK2,
-       PINGRP_GPIO_PI3,
-       PINGRP_GPIO_PI6,
-       PINGRP_GPIO_PG0,
-       PINGRP_GPIO_PG1,
-       PINGRP_GPIO_PG2,
-       PINGRP_GPIO_PG3,
-       PINGRP_GPIO_PG4,
-       PINGRP_GPIO_PG5,
-       PINGRP_GPIO_PG6,
-       PINGRP_GPIO_PG7,
-       PINGRP_GPIO_PH0,
-       PINGRP_GPIO_PH1,
-       PINGRP_GPIO_PH2,
-       PINGRP_GPIO_PH3,
-       PINGRP_GPIO_PH4,
-       PINGRP_GPIO_PH5,
-       PINGRP_GPIO_PH6,
-       PINGRP_GPIO_PH7,
-       PINGRP_GPIO_PJ7,
-       PINGRP_GPIO_PB0,
-       PINGRP_GPIO_PB1,
-       PINGRP_GPIO_PK7,
-       PINGRP_GPIO_PI0,
-       PINGRP_GPIO_PI1,
-       PINGRP_GPIO_PI2,
-       PINGRP_GPIO_PI4,                        /* offset 0x324c */
-       PINGRP_GEN2_I2C_SCL,
-       PINGRP_GEN2_I2C_SDA,
-       PINGRP_SDMMC4_CLK,
-       PINGRP_SDMMC4_CMD,
-       PINGRP_SDMMC4_DAT0,
-       PINGRP_SDMMC4_DAT1,
-       PINGRP_SDMMC4_DAT2,
-       PINGRP_SDMMC4_DAT3,
-       PINGRP_SDMMC4_DAT4,
-       PINGRP_SDMMC4_DAT5,
-       PINGRP_SDMMC4_DAT6,
-       PINGRP_SDMMC4_DAT7,
-       PINGRP_CAM_MCLK = PINGRP_SDMMC4_DAT7 + 2,
-       PINGRP_GPIO_PCC1,
-       PINGRP_GPIO_PBB0,
-       PINGRP_CAM_I2C_SCL,
-       PINGRP_CAM_I2C_SDA,
-       PINGRP_GPIO_PBB3,
-       PINGRP_GPIO_PBB4,
-       PINGRP_GPIO_PBB5,
-       PINGRP_GPIO_PBB6,
-       PINGRP_GPIO_PBB7,
-       PINGRP_GPIO_PCC2,
-       PINGRP_JTAG_RTCK,
-       PINGRP_PWR_I2C_SCL,
-       PINGRP_PWR_I2C_SDA,
-       PINGRP_KB_ROW0,
-       PINGRP_KB_ROW1,
-       PINGRP_KB_ROW2,
-       PINGRP_KB_ROW3,
-       PINGRP_KB_ROW4,
-       PINGRP_KB_ROW5,
-       PINGRP_KB_ROW6,
-       PINGRP_KB_ROW7,
-       PINGRP_KB_ROW8,
-       PINGRP_KB_ROW9,
-       PINGRP_KB_ROW10,
-       PINGRP_KB_ROW11,
-       PINGRP_KB_ROW12,
-       PINGRP_KB_ROW13,
-       PINGRP_KB_ROW14,
-       PINGRP_KB_ROW15,
-       PINGRP_KB_COL0,                         /* offset 0x32fc */
-       PINGRP_KB_COL1,
-       PINGRP_KB_COL2,
-       PINGRP_KB_COL3,
-       PINGRP_KB_COL4,
-       PINGRP_KB_COL5,
-       PINGRP_KB_COL6,
-       PINGRP_KB_COL7,
-       PINGRP_CLK_32K_OUT,
-       PINGRP_CORE_PWR_REQ = PINGRP_CLK_32K_OUT + 2,   /* offset 0x3324 */
-       PINGRP_CPU_PWR_REQ,
-       PINGRP_PWR_INT_N,
-       PINGRP_CLK_32K_IN,
-       PINGRP_OWR,
-       PINGRP_DAP1_FS,
-       PINGRP_DAP1_DIN,
-       PINGRP_DAP1_DOUT,
-       PINGRP_DAP1_SCLK,
-       PINGRP_CLK1_REQ,
-       PINGRP_CLK1_OUT,
-       PINGRP_SPDIF_IN,
-       PINGRP_SPDIF_OUT,
-       PINGRP_DAP2_FS,
-       PINGRP_DAP2_DIN,
-       PINGRP_DAP2_DOUT,
-       PINGRP_DAP2_SCLK,
-       PINGRP_DVFS_PWM,
-       PINGRP_GPIO_X1_AUD,
-       PINGRP_GPIO_X3_AUD,
-       PINGRP_DVFS_CLK,
-       PINGRP_GPIO_X4_AUD,
-       PINGRP_GPIO_X5_AUD,
-       PINGRP_GPIO_X6_AUD,
-       PINGRP_GPIO_X7_AUD,
-       PINGRP_SDMMC3_CLK = PINGRP_GPIO_X7_AUD + 3,
-       PINGRP_SDMMC3_CMD,
-       PINGRP_SDMMC3_DAT0,
-       PINGRP_SDMMC3_DAT1,
-       PINGRP_SDMMC3_DAT2,
-       PINGRP_SDMMC3_DAT3,
-       PINGRP_PEX_L0_RST = PINGRP_SDMMC3_DAT3 + 6, /* offset 0x33bc */
-       PINGRP_PEX_L0_CLKREQ,
-       PINGRP_PEX_WAKE,
-       PINGRP_PEX_L1_RST = PINGRP_PEX_WAKE + 2,
-       PINGRP_PEX_L1_CLKREQ,
-       PINGRP_HDMI_CEC = PINGRP_PEX_L1_CLKREQ + 4, /* offset 0x33e0 */
-       PINGRP_SDMMC1_WP_N,
-       PINGRP_SDMMC3_CD_N,
-       PINGRP_GPIO_W2_AUD,
-       PINGRP_GPIO_W3_AUD,
-       PINGRP_USB_VBUS_EN0,
-       PINGRP_USB_VBUS_EN1,
-       PINGRP_SDMMC3_CLK_LB_IN,
-       PINGRP_SDMMC3_CLK_LB_OUT,
-       PINGRP_GMI_CLK_LB,
-       PINGRP_RESET_OUT_N,
-       PINGRP_KB_ROW16,                        /* offset 0x340c */
-       PINGRP_KB_ROW17,
-       PINGRP_USB_VBUS_EN2,
-       PINGRP_GPIO_PFF2,
-       PINGRP_DP_HPD,                          /* last reg offset = 0x3430 */
+       PMUX_PINGRP_ULPI_DATA0_PO1,
+       PMUX_PINGRP_ULPI_DATA1_PO2,
+       PMUX_PINGRP_ULPI_DATA2_PO3,
+       PMUX_PINGRP_ULPI_DATA3_PO4,
+       PMUX_PINGRP_ULPI_DATA4_PO5,
+       PMUX_PINGRP_ULPI_DATA5_PO6,
+       PMUX_PINGRP_ULPI_DATA6_PO7,
+       PMUX_PINGRP_ULPI_DATA7_PO0,
+       PMUX_PINGRP_ULPI_CLK_PY0,
+       PMUX_PINGRP_ULPI_DIR_PY1,
+       PMUX_PINGRP_ULPI_NXT_PY2,
+       PMUX_PINGRP_ULPI_STP_PY3,
+       PMUX_PINGRP_DAP3_FS_PP0,
+       PMUX_PINGRP_DAP3_DIN_PP1,
+       PMUX_PINGRP_DAP3_DOUT_PP2,
+       PMUX_PINGRP_DAP3_SCLK_PP3,
+       PMUX_PINGRP_PV0,
+       PMUX_PINGRP_PV1,
+       PMUX_PINGRP_SDMMC1_CLK_PZ0,
+       PMUX_PINGRP_SDMMC1_CMD_PZ1,
+       PMUX_PINGRP_SDMMC1_DAT3_PY4,
+       PMUX_PINGRP_SDMMC1_DAT2_PY5,
+       PMUX_PINGRP_SDMMC1_DAT1_PY6,
+       PMUX_PINGRP_SDMMC1_DAT0_PY7,
+       PMUX_PINGRP_CLK2_OUT_PW5 = (0x68 / 4),
+       PMUX_PINGRP_CLK2_REQ_PCC5,
+       PMUX_PINGRP_HDMI_INT_PN7 = (0x110 / 4),
+       PMUX_PINGRP_DDC_SCL_PV4,
+       PMUX_PINGRP_DDC_SDA_PV5,
+       PMUX_PINGRP_UART2_RXD_PC3 = (0x164 / 4),
+       PMUX_PINGRP_UART2_TXD_PC2,
+       PMUX_PINGRP_UART2_RTS_N_PJ6,
+       PMUX_PINGRP_UART2_CTS_N_PJ5,
+       PMUX_PINGRP_UART3_TXD_PW6,
+       PMUX_PINGRP_UART3_RXD_PW7,
+       PMUX_PINGRP_UART3_CTS_N_PA1,
+       PMUX_PINGRP_UART3_RTS_N_PC0,
+       PMUX_PINGRP_PU0,
+       PMUX_PINGRP_PU1,
+       PMUX_PINGRP_PU2,
+       PMUX_PINGRP_PU3,
+       PMUX_PINGRP_PU4,
+       PMUX_PINGRP_PU5,
+       PMUX_PINGRP_PU6,
+       PMUX_PINGRP_GEN1_I2C_SDA_PC5,
+       PMUX_PINGRP_GEN1_I2C_SCL_PC4,
+       PMUX_PINGRP_DAP4_FS_PP4,
+       PMUX_PINGRP_DAP4_DIN_PP5,
+       PMUX_PINGRP_DAP4_DOUT_PP6,
+       PMUX_PINGRP_DAP4_SCLK_PP7,
+       PMUX_PINGRP_CLK3_OUT_PEE0,
+       PMUX_PINGRP_CLK3_REQ_PEE1,
+       PMUX_PINGRP_PC7,
+       PMUX_PINGRP_PI5,
+       PMUX_PINGRP_PI7,
+       PMUX_PINGRP_PK0,
+       PMUX_PINGRP_PK1,
+       PMUX_PINGRP_PJ0,
+       PMUX_PINGRP_PJ2,
+       PMUX_PINGRP_PK3,
+       PMUX_PINGRP_PK4,
+       PMUX_PINGRP_PK2,
+       PMUX_PINGRP_PI3,
+       PMUX_PINGRP_PI6,
+       PMUX_PINGRP_PG0,
+       PMUX_PINGRP_PG1,
+       PMUX_PINGRP_PG2,
+       PMUX_PINGRP_PG3,
+       PMUX_PINGRP_PG4,
+       PMUX_PINGRP_PG5,
+       PMUX_PINGRP_PG6,
+       PMUX_PINGRP_PG7,
+       PMUX_PINGRP_PH0,
+       PMUX_PINGRP_PH1,
+       PMUX_PINGRP_PH2,
+       PMUX_PINGRP_PH3,
+       PMUX_PINGRP_PH4,
+       PMUX_PINGRP_PH5,
+       PMUX_PINGRP_PH6,
+       PMUX_PINGRP_PH7,
+       PMUX_PINGRP_PJ7,
+       PMUX_PINGRP_PB0,
+       PMUX_PINGRP_PB1,
+       PMUX_PINGRP_PK7,
+       PMUX_PINGRP_PI0,
+       PMUX_PINGRP_PI1,
+       PMUX_PINGRP_PI2,
+       PMUX_PINGRP_PI4,
+       PMUX_PINGRP_GEN2_I2C_SCL_PT5,
+       PMUX_PINGRP_GEN2_I2C_SDA_PT6,
+       PMUX_PINGRP_SDMMC4_CLK_PCC4,
+       PMUX_PINGRP_SDMMC4_CMD_PT7,
+       PMUX_PINGRP_SDMMC4_DAT0_PAA0,
+       PMUX_PINGRP_SDMMC4_DAT1_PAA1,
+       PMUX_PINGRP_SDMMC4_DAT2_PAA2,
+       PMUX_PINGRP_SDMMC4_DAT3_PAA3,
+       PMUX_PINGRP_SDMMC4_DAT4_PAA4,
+       PMUX_PINGRP_SDMMC4_DAT5_PAA5,
+       PMUX_PINGRP_SDMMC4_DAT6_PAA6,
+       PMUX_PINGRP_SDMMC4_DAT7_PAA7,
+       PMUX_PINGRP_CAM_MCLK_PCC0 = (0x284 / 4),
+       PMUX_PINGRP_PCC1,
+       PMUX_PINGRP_PBB0,
+       PMUX_PINGRP_CAM_I2C_SCL_PBB1,
+       PMUX_PINGRP_CAM_I2C_SDA_PBB2,
+       PMUX_PINGRP_PBB3,
+       PMUX_PINGRP_PBB4,
+       PMUX_PINGRP_PBB5,
+       PMUX_PINGRP_PBB6,
+       PMUX_PINGRP_PBB7,
+       PMUX_PINGRP_PCC2,
+       PMUX_PINGRP_JTAG_RTCK,
+       PMUX_PINGRP_PWR_I2C_SCL_PZ6,
+       PMUX_PINGRP_PWR_I2C_SDA_PZ7,
+       PMUX_PINGRP_KB_ROW0_PR0,
+       PMUX_PINGRP_KB_ROW1_PR1,
+       PMUX_PINGRP_KB_ROW2_PR2,
+       PMUX_PINGRP_KB_ROW3_PR3,
+       PMUX_PINGRP_KB_ROW4_PR4,
+       PMUX_PINGRP_KB_ROW5_PR5,
+       PMUX_PINGRP_KB_ROW6_PR6,
+       PMUX_PINGRP_KB_ROW7_PR7,
+       PMUX_PINGRP_KB_ROW8_PS0,
+       PMUX_PINGRP_KB_ROW9_PS1,
+       PMUX_PINGRP_KB_ROW10_PS2,
+       PMUX_PINGRP_KB_ROW11_PS3,
+       PMUX_PINGRP_KB_ROW12_PS4,
+       PMUX_PINGRP_KB_ROW13_PS5,
+       PMUX_PINGRP_KB_ROW14_PS6,
+       PMUX_PINGRP_KB_ROW15_PS7,
+       PMUX_PINGRP_KB_COL0_PQ0,
+       PMUX_PINGRP_KB_COL1_PQ1,
+       PMUX_PINGRP_KB_COL2_PQ2,
+       PMUX_PINGRP_KB_COL3_PQ3,
+       PMUX_PINGRP_KB_COL4_PQ4,
+       PMUX_PINGRP_KB_COL5_PQ5,
+       PMUX_PINGRP_KB_COL6_PQ6,
+       PMUX_PINGRP_KB_COL7_PQ7,
+       PMUX_PINGRP_CLK_32K_OUT_PA0,
+       PMUX_PINGRP_CORE_PWR_REQ = (0x324 / 4),
+       PMUX_PINGRP_CPU_PWR_REQ,
+       PMUX_PINGRP_PWR_INT_N,
+       PMUX_PINGRP_CLK_32K_IN,
+       PMUX_PINGRP_OWR,
+       PMUX_PINGRP_DAP1_FS_PN0,
+       PMUX_PINGRP_DAP1_DIN_PN1,
+       PMUX_PINGRP_DAP1_DOUT_PN2,
+       PMUX_PINGRP_DAP1_SCLK_PN3,
+       PMUX_PINGRP_DAP_MCLK1_REQ_PEE2,
+       PMUX_PINGRP_DAP_MCLK1_PW4,
+       PMUX_PINGRP_SPDIF_IN_PK6,
+       PMUX_PINGRP_SPDIF_OUT_PK5,
+       PMUX_PINGRP_DAP2_FS_PA2,
+       PMUX_PINGRP_DAP2_DIN_PA4,
+       PMUX_PINGRP_DAP2_DOUT_PA5,
+       PMUX_PINGRP_DAP2_SCLK_PA3,
+       PMUX_PINGRP_DVFS_PWM_PX0,
+       PMUX_PINGRP_GPIO_X1_AUD_PX1,
+       PMUX_PINGRP_GPIO_X3_AUD_PX3,
+       PMUX_PINGRP_DVFS_CLK_PX2,
+       PMUX_PINGRP_GPIO_X4_AUD_PX4,
+       PMUX_PINGRP_GPIO_X5_AUD_PX5,
+       PMUX_PINGRP_GPIO_X6_AUD_PX6,
+       PMUX_PINGRP_GPIO_X7_AUD_PX7,
+       PMUX_PINGRP_SDMMC3_CLK_PA6 = (0x390 / 4),
+       PMUX_PINGRP_SDMMC3_CMD_PA7,
+       PMUX_PINGRP_SDMMC3_DAT0_PB7,
+       PMUX_PINGRP_SDMMC3_DAT1_PB6,
+       PMUX_PINGRP_SDMMC3_DAT2_PB5,
+       PMUX_PINGRP_SDMMC3_DAT3_PB4,
+       PMUX_PINGRP_PEX_L0_RST_N_PDD1 = (0x3bc / 4),
+       PMUX_PINGRP_PEX_L0_CLKREQ_N_PDD2,
+       PMUX_PINGRP_PEX_WAKE_N_PDD3,
+       PMUX_PINGRP_PEX_L1_RST_N_PDD5 = (0x3cc / 4),
+       PMUX_PINGRP_PEX_L1_CLKREQ_N_PDD6,
+       PMUX_PINGRP_HDMI_CEC_PEE3 = (0x3e0 / 4),
+       PMUX_PINGRP_SDMMC1_WP_N_PV3,
+       PMUX_PINGRP_SDMMC3_CD_N_PV2,
+       PMUX_PINGRP_GPIO_W2_AUD_PW2,
+       PMUX_PINGRP_GPIO_W3_AUD_PW3,
+       PMUX_PINGRP_USB_VBUS_EN0_PN4,
+       PMUX_PINGRP_USB_VBUS_EN1_PN5,
+       PMUX_PINGRP_SDMMC3_CLK_LB_IN_PEE5,
+       PMUX_PINGRP_SDMMC3_CLK_LB_OUT_PEE4,
+       PMUX_PINGRP_GMI_CLK_LB,
+       PMUX_PINGRP_RESET_OUT_N,
+       PMUX_PINGRP_KB_ROW16_PT0,
+       PMUX_PINGRP_KB_ROW17_PT1,
+       PMUX_PINGRP_USB_VBUS_EN2_PFF1,
+       PMUX_PINGRP_PFF2,
+       PMUX_PINGRP_DP_HPD_PFF0 = (0x430 / 4),

        PMUX_PINGRP_COUNT,
 };
 
 enum pmux_drvgrp {
        PMUX_PINGRP_COUNT,
 };
 
 enum pmux_drvgrp {

-       PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
-       PDRIVE_PINGROUP_AO2,
-       PDRIVE_PINGROUP_AT1,
-       PDRIVE_PINGROUP_AT2,
-       PDRIVE_PINGROUP_AT3,
-       PDRIVE_PINGROUP_AT4,
-       PDRIVE_PINGROUP_AT5,
-       PDRIVE_PINGROUP_CDEV1,
-       PDRIVE_PINGROUP_CDEV2,
-       PDRIVE_PINGROUP_DAP1 = 10,      /* offset 0x890 */
-       PDRIVE_PINGROUP_DAP2,
-       PDRIVE_PINGROUP_DAP3,
-       PDRIVE_PINGROUP_DAP4,
-       PDRIVE_PINGROUP_DBG,
-       PDRIVE_PINGROUP_SDIO3 = 18,     /* offset 0x8B0 */
-       PDRIVE_PINGROUP_SPI,
-       PDRIVE_PINGROUP_UAA,
-       PDRIVE_PINGROUP_UAB,
-       PDRIVE_PINGROUP_UART2,
-       PDRIVE_PINGROUP_UART3,
-       PDRIVE_PINGROUP_SDIO1 = 33,     /* offset 0x8EC */
-       PDRIVE_PINGROUP_DDC = 37,       /* offset 0x8FC */
-       PDRIVE_PINGROUP_GMA,
-       PDRIVE_PINGROUP_GME = 42,       /* offset 0x910 */
-       PDRIVE_PINGROUP_GMF,
-       PDRIVE_PINGROUP_GMG,
-       PDRIVE_PINGROUP_GMH,
-       PDRIVE_PINGROUP_OWR,
-       PDRIVE_PINGROUP_UAD,
-       PDRIVE_PINGROUP_DEV3 = 49,      /* offset 0x92c */
-       PDRIVE_PINGROUP_CEC = 52,       /* offset 0x938 */
-       PDRIVE_PINGROUP_AT6 = 75,       /* offset 0x994 */
-       PDRIVE_PINGROUP_DAP5,
-       PDRIVE_PINGROUP_VBUS,
-       PDRIVE_PINGROUP_AO3,
-       PDRIVE_PINGROUP_HVC,
-       PDRIVE_PINGROUP_SDIO4,
-       PDRIVE_PINGROUP_AO0,
+       PMUX_DRVGRP_AO1,
+       PMUX_DRVGRP_AO2,
+       PMUX_DRVGRP_AT1,
+       PMUX_DRVGRP_AT2,
+       PMUX_DRVGRP_AT3,
+       PMUX_DRVGRP_AT4,
+       PMUX_DRVGRP_AT5,
+       PMUX_DRVGRP_CDEV1,
+       PMUX_DRVGRP_CDEV2,
+       PMUX_DRVGRP_DAP1 = (0x28 / 4),
+       PMUX_DRVGRP_DAP2,
+       PMUX_DRVGRP_DAP3,
+       PMUX_DRVGRP_DAP4,
+       PMUX_DRVGRP_DBG,
+       PMUX_DRVGRP_SDIO3 = (0x48 / 4),
+       PMUX_DRVGRP_SPI,
+       PMUX_DRVGRP_UAA,
+       PMUX_DRVGRP_UAB,
+       PMUX_DRVGRP_UART2,
+       PMUX_DRVGRP_UART3,
+       PMUX_DRVGRP_SDIO1 = (0x84 / 4),
+       PMUX_DRVGRP_DDC = (0x94 / 4),
+       PMUX_DRVGRP_GMA,
+       PMUX_DRVGRP_GME = (0xa8 / 4),
+       PMUX_DRVGRP_GMF,
+       PMUX_DRVGRP_GMG,
+       PMUX_DRVGRP_GMH,
+       PMUX_DRVGRP_OWR,
+       PMUX_DRVGRP_UDA,
+       PMUX_DRVGRP_GPV,
+       PMUX_DRVGRP_DEV3,
+       PMUX_DRVGRP_CEC = (0xd0 / 4),
+       PMUX_DRVGRP_AT6 = (0x12c / 4),
+       PMUX_DRVGRP_DAP5,
+       PMUX_DRVGRP_USB_VBUS_EN,
+       PMUX_DRVGRP_AO3 = (0x140 / 4),
+       PMUX_DRVGRP_AO0 = (0x148 / 4),
+       PMUX_DRVGRP_HV0,
+       PMUX_DRVGRP_SDIO4 = (0x15c / 4),
+       PMUX_DRVGRP_AO4,

        PMUX_DRVGRP_COUNT,
 };
 
        PMUX_DRVGRP_COUNT,
 };
 

-/*
- * Functions which can be assigned to each of the pin groups. The values here
- * bear no relation to the values programmed into pinmux registers and are
- * purely a convenience. The translation is done through a table search.
- */

 enum pmux_func {
 enum pmux_func {

-       PMUX_FUNC_AHB_CLK,
-       PMUX_FUNC_APB_CLK,
-       PMUX_FUNC_AUDIO_SYNC,
-       PMUX_FUNC_CRT,
-       PMUX_FUNC_DAP1,
-       PMUX_FUNC_DAP2,
-       PMUX_FUNC_DAP3,
-       PMUX_FUNC_DAP4,
-       PMUX_FUNC_DAP5,
-       PMUX_FUNC_DISPA,
-       PMUX_FUNC_DISPB,
-       PMUX_FUNC_EMC_TEST0_DLL,
-       PMUX_FUNC_EMC_TEST1_DLL,
-       PMUX_FUNC_GMI,
-       PMUX_FUNC_GMI_INT,
-       PMUX_FUNC_HDMI,
-       PMUX_FUNC_I2C1,
-       PMUX_FUNC_I2C2,
-       PMUX_FUNC_I2C3,
-       PMUX_FUNC_IDE,
-       PMUX_FUNC_KBC,
-       PMUX_FUNC_MIO,
-       PMUX_FUNC_MIPI_HS,
-       PMUX_FUNC_NAND,
-       PMUX_FUNC_OSC,
-       PMUX_FUNC_OWR,
-       PMUX_FUNC_PCIE,
-       PMUX_FUNC_PLLA_OUT,
-       PMUX_FUNC_PLLC_OUT1,
-       PMUX_FUNC_PLLM_OUT1,
-       PMUX_FUNC_PLLP_OUT2,
-       PMUX_FUNC_PLLP_OUT3,
-       PMUX_FUNC_PLLP_OUT4,
-       PMUX_FUNC_PWM,
-       PMUX_FUNC_PWR_INTR,
-       PMUX_FUNC_PWR_ON,
-       PMUX_FUNC_RTCK,
-       PMUX_FUNC_SDMMC1,
-       PMUX_FUNC_SDMMC2,
-       PMUX_FUNC_SDMMC3,
-       PMUX_FUNC_SDMMC4,
-       PMUX_FUNC_SFLASH,
-       PMUX_FUNC_SPDIF,
-       PMUX_FUNC_SPI1,
-       PMUX_FUNC_SPI2,
-       PMUX_FUNC_SPI2_ALT,
-       PMUX_FUNC_SPI3,
-       PMUX_FUNC_SPI4,
-       PMUX_FUNC_TRACE,
-       PMUX_FUNC_TWC,
-       PMUX_FUNC_UARTA,
-       PMUX_FUNC_UARTB,
-       PMUX_FUNC_UARTC,
-       PMUX_FUNC_UARTD,
-       PMUX_FUNC_UARTE,
-       PMUX_FUNC_ULPI,
-       PMUX_FUNC_VI,
-       PMUX_FUNC_VI_SENSOR_CLK,
-       PMUX_FUNC_XIO,
-       /* End of Tegra2 MUX selectors */

        PMUX_FUNC_BLINK,
        PMUX_FUNC_BLINK,

+       PMUX_FUNC_CCLA,

        PMUX_FUNC_CEC,
        PMUX_FUNC_CEC,

+       PMUX_FUNC_CLDVFS,
+       PMUX_FUNC_CLK,

        PMUX_FUNC_CLK12,
        PMUX_FUNC_CLK12,

+       PMUX_FUNC_CPU,

        PMUX_FUNC_DAP,
        PMUX_FUNC_DAP,

-       PMUX_FUNC_DAPSDMMC2,
-       PMUX_FUNC_DDR,
+       PMUX_FUNC_DAP1,
+       PMUX_FUNC_DAP2,

        PMUX_FUNC_DEV3,
        PMUX_FUNC_DEV3,

+       PMUX_FUNC_DISPLAYA,
+       PMUX_FUNC_DISPLAYA_ALT,
+       PMUX_FUNC_DISPLAYB,
+       PMUX_FUNC_DP,

        PMUX_FUNC_DTV,
        PMUX_FUNC_DTV,

-       PMUX_FUNC_VI_ALT1,
-       PMUX_FUNC_VI_ALT2,
-       PMUX_FUNC_VI_ALT3,
-       PMUX_FUNC_EMC_DLL,

        PMUX_FUNC_EXTPERIPH1,
        PMUX_FUNC_EXTPERIPH2,
        PMUX_FUNC_EXTPERIPH3,
        PMUX_FUNC_EXTPERIPH1,
        PMUX_FUNC_EXTPERIPH2,
        PMUX_FUNC_EXTPERIPH3,

+       PMUX_FUNC_GMI,

        PMUX_FUNC_GMI_ALT,
        PMUX_FUNC_HDA,
        PMUX_FUNC_HSI,
        PMUX_FUNC_GMI_ALT,
        PMUX_FUNC_HDA,
        PMUX_FUNC_HSI,

+       PMUX_FUNC_I2C1,
+       PMUX_FUNC_I2C2,
+       PMUX_FUNC_I2C3,

        PMUX_FUNC_I2C4,
        PMUX_FUNC_I2C4,

-       PMUX_FUNC_I2C5,

        PMUX_FUNC_I2CPWR,
        PMUX_FUNC_I2S0,
        PMUX_FUNC_I2S1,
        PMUX_FUNC_I2S2,
        PMUX_FUNC_I2S3,
        PMUX_FUNC_I2S4,
        PMUX_FUNC_I2CPWR,
        PMUX_FUNC_I2S0,
        PMUX_FUNC_I2S1,
        PMUX_FUNC_I2S2,
        PMUX_FUNC_I2S3,
        PMUX_FUNC_I2S4,

-       PMUX_FUNC_NAND_ALT,
-       PMUX_FUNC_POPSDIO4,
-       PMUX_FUNC_POPSDMMC4,
+       PMUX_FUNC_IRDA,
+       PMUX_FUNC_KBC,
+       PMUX_FUNC_OWR,
+       PMUX_FUNC_PE,
+       PMUX_FUNC_PE0,
+       PMUX_FUNC_PE1,
+       PMUX_FUNC_PMI,

        PMUX_FUNC_PWM0,
        PMUX_FUNC_PWM1,
        PMUX_FUNC_PWM2,
        PMUX_FUNC_PWM3,
        PMUX_FUNC_PWM0,
        PMUX_FUNC_PWM1,
        PMUX_FUNC_PWM2,
        PMUX_FUNC_PWM3,

+       PMUX_FUNC_PWRON,
+       PMUX_FUNC_RESET_OUT_N,
+       PMUX_FUNC_RTCK,

        PMUX_FUNC_SATA,
        PMUX_FUNC_SATA,

+       PMUX_FUNC_SDMMC1,
+       PMUX_FUNC_SDMMC2,
+       PMUX_FUNC_SDMMC3,
+       PMUX_FUNC_SDMMC4,
+       PMUX_FUNC_SOC,
+       PMUX_FUNC_SPDIF,
+       PMUX_FUNC_SPI1,
+       PMUX_FUNC_SPI2,
+       PMUX_FUNC_SPI3,
+       PMUX_FUNC_SPI4,

        PMUX_FUNC_SPI5,
        PMUX_FUNC_SPI6,
        PMUX_FUNC_SPI5,
        PMUX_FUNC_SPI6,

-       PMUX_FUNC_SYSCLK,
+       PMUX_FUNC_SYS,
+       PMUX_FUNC_TMDS,
+       PMUX_FUNC_TRACE,
+       PMUX_FUNC_UARTA,
+       PMUX_FUNC_UARTB,
+       PMUX_FUNC_UARTC,
+       PMUX_FUNC_UARTD,
+       PMUX_FUNC_ULPI,
+       PMUX_FUNC_USB,

        PMUX_FUNC_VGP1,
        PMUX_FUNC_VGP2,
        PMUX_FUNC_VGP3,
        PMUX_FUNC_VGP4,
        PMUX_FUNC_VGP5,
        PMUX_FUNC_VGP6,
        PMUX_FUNC_VGP1,
        PMUX_FUNC_VGP2,
        PMUX_FUNC_VGP3,
        PMUX_FUNC_VGP4,
        PMUX_FUNC_VGP5,
        PMUX_FUNC_VGP6,

-       /* End of Tegra3 MUX selectors */
-       PMUX_FUNC_USB,
-       PMUX_FUNC_SOC,
-       PMUX_FUNC_CPU,
-       PMUX_FUNC_CLK,
-       PMUX_FUNC_PWRON,
-       PMUX_FUNC_PMI,
-       PMUX_FUNC_CLDVFS,
-       PMUX_FUNC_RESET_OUT_N,
-       /* End of Tegra114 MUX selectors */
-
+       PMUX_FUNC_VI,
+       PMUX_FUNC_VI_ALT1,
+       PMUX_FUNC_VI_ALT3,
+       PMUX_FUNC_VIMCLK2,
+       PMUX_FUNC_VIMCLK2_ALT,

        PMUX_FUNC_COUNT,
        PMUX_FUNC_COUNT,

-
-       PMUX_FUNC_INVALID = 0x4000,

        PMUX_FUNC_RSVD1 = 0x8000,
        PMUX_FUNC_RSVD2 = 0x8001,
        PMUX_FUNC_RSVD3 = 0x8002,
        PMUX_FUNC_RSVD1 = 0x8000,
        PMUX_FUNC_RSVD2 = 0x8001,
        PMUX_FUNC_RSVD3 = 0x8002,

diff --git a/board/nvidia/venice2/pinmux-config-venice2.h b/board/nvidia/venice2/pinmux-config-venice2.h
index 51cd4bfcb6cc9b12382c1c65ff5467464c20c5d0..2f79ec75237e795df39bce9e091cd5634a3dd609 100644 (file)
--- a/board/nvidia/venice2/pinmux-config-venice2.h
+++ b/board/nvidia/venice2/pinmux-config-venice2.h
@@ -10,7 +10,7 @@
 
 #define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)                \
        {                                                       \
 
 #define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)                \
        {                                                       \

-               .pingrp         = PINGRP_##_pingrp,             \
+               .pingrp         = PMUX_PINGRP_##_pingrp,        \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -22,7 +22,7 @@
 
 #define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)        \
        {                                                       \
 
 #define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)        \
        {                                                       \

-               .pingrp         = PINGRP_##_pingrp,             \
+               .pingrp         = PMUX_PINGRP_##_pingrp,        \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -34,7 +34,7 @@
 
 #define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
        {                                                       \
 
 #define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
        {                                                       \

-               .pingrp         = PINGRP_##_pingrp,             \
+               .pingrp         = PMUX_PINGRP_##_pingrp,        \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -46,7 +46,7 @@
 
 #define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
        {                                                       \
 
 #define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
        {                                                       \

-               .pingrp         = PINGRP_##_pingrp,             \
+               .pingrp         = PMUX_PINGRP_##_pingrp,        \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -56,23 +56,23 @@
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 

-#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)                \
-       {                                                               \
-               .pingrp     = PINGRP_##_pingrp,                         \
-               .func       = PMUX_FUNC_##_mux,                         \
-               .pull       = PMUX_PULL_##_pull,                        \
-               .tristate   = PMUX_TRI_##_tri,                          \
-               .io         = PMUX_PIN_##_io,                           \
-               .lock       = PMUX_PIN_LOCK_##_lock,                    \
-               .od         = PMUX_PIN_OD_##_od,                        \
-               .ioreset    = PMUX_PIN_IO_RESET_DEFAULT,                \
+#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)        \
+       {                                                       \
+               .pingrp     = PMUX_PINGRP_##_pingrp,            \
+               .func       = PMUX_FUNC_##_mux,                 \
+               .pull       = PMUX_PULL_##_pull,                \
+               .tristate   = PMUX_TRI_##_tri,                  \
+               .io         = PMUX_PIN_##_io,                   \
+               .lock       = PMUX_PIN_LOCK_##_lock,            \
+               .od         = PMUX_PIN_OD_##_od,                \
+               .ioreset    = PMUX_PIN_IO_RESET_DEFAULT,        \

        }
 
 #define USB_PINMUX CEC_PINMUX
 
 #define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
        {                                               \
        }
 
 #define USB_PINMUX CEC_PINMUX
 
 #define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
        {                                               \

-               .drvgrp = PDRIVE_PINGROUP_##_drvgrp,    \
+               .drvgrp = PMUX_DRVGRP_##_drvgrp,        \

                .slwf   = _slwf,                        \
                .slwr   = _slwr,                        \
                .drvup  = _drvup,                       \
                .slwf   = _slwf,                        \
                .slwr   = _slwr,                        \
                .drvup  = _drvup,                       \


@@ -84,122 +84,122 @@
 
 static struct pmux_pingrp_config tegra124_pinmux_common[] = {
        /* EXTPERIPH1 pinmux */
 
 static struct pmux_pingrp_config tegra124_pinmux_common[] = {
        /* EXTPERIPH1 pinmux */

-       DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(DAP_MCLK1_PW4,     EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),

 
        /* I2S0 pinmux */
 
        /* I2S0 pinmux */

-       DEFAULT_PINMUX(DAP1_DIN,      I2S0,        NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(DAP1_DOUT,     I2S0,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(DAP1_FS,       I2S0,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(DAP1_SCLK,     I2S0,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP1_DIN_PN1,      I2S0,        NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(DAP1_DOUT_PN2,     I2S0,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP1_FS_PN0,       I2S0,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP1_SCLK_PN3,     I2S0,        NORMAL,    NORMAL,   INPUT),

 
        /* I2S1 pinmux */
 
        /* I2S1 pinmux */

-       DEFAULT_PINMUX(DAP2_DIN,      I2S1,        NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(DAP2_DOUT,     I2S1,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(DAP2_FS,       I2S1,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(DAP2_SCLK,     I2S1,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP2_DIN_PA4,      I2S1,        NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(DAP2_DOUT_PA5,     I2S1,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP2_FS_PA2,       I2S1,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP2_SCLK_PA3,     I2S1,        NORMAL,    NORMAL,   INPUT),

 
        /* I2S3 pinmux */
 
        /* I2S3 pinmux */

-       DEFAULT_PINMUX(DAP4_DIN,      I2S3,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(DAP4_DOUT,     I2S3,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(DAP4_FS,       I2S3,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(DAP4_SCLK,     I2S3,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP4_DIN_PP5,      I2S3,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP4_DOUT_PP6,     I2S3,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP4_FS_PP4,       I2S3,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(DAP4_SCLK_PP7,     I2S3,        NORMAL,    NORMAL,   INPUT),

 
        /* CLDVFS pinmux */
 
        /* CLDVFS pinmux */

-       DEFAULT_PINMUX(DVFS_PWM,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(DVFS_CLK,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(DVFS_PWM_PX0,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(DVFS_CLK_PX2,      CLDVFS,      NORMAL,    NORMAL,   OUTPUT),

 
        /* ULPI pinmux */
 
        /* ULPI pinmux */

-       DEFAULT_PINMUX(ULPI_DATA0,    ULPI,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA1,    ULPI,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA2,    ULPI,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA3,    ULPI,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA4,    ULPI,        UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA5,    ULPI,        UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DATA6,    ULPI,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_DATA0_PO1,    ULPI,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_DATA1_PO2,    ULPI,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_DATA2_PO3,    ULPI,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_DATA3_PO4,    ULPI,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_DATA4_PO5,    ULPI,        UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_DATA5_PO6,    ULPI,        UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_DATA6_PO7,    ULPI,        NORMAL,    NORMAL,   INPUT),

 
        /* EC KBC/SPI */
 
        /* EC KBC/SPI */

-       DEFAULT_PINMUX(ULPI_CLK,      SPI1,        UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_DIR,      SPI1,        UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_NXT,      SPI1,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(ULPI_STP,      SPI1,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_CLK_PY0,      SPI1,        UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_DIR_PY1,      SPI1,        UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_NXT_PY2,      SPI1,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(ULPI_STP_PY3,      SPI1,        NORMAL,    NORMAL,   INPUT),

 
        /* I2C3 (TPM) pinmux */
 
        /* I2C3 (TPM) pinmux */

-       I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-       I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),

 
        /* I2C2 pinmux */
 
        /* I2C2 pinmux */

-       I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-       I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),

 
        /* UARTD pinmux (UART4 on Servo board, unused) */
 
        /* UARTD pinmux (UART4 on Servo board, unused) */

-       DEFAULT_PINMUX(GPIO_PJ7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(GPIO_PB0,      UARTD,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PB1,      UARTD,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PK7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(PJ7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(PB0,      UARTD,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PB1,      UARTD,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PK7,      UARTD,       NORMAL,    NORMAL,   OUTPUT),

 
        /* SPI4 (Winbond 'boot ROM') */
 
        /* SPI4 (Winbond 'boot ROM') */

-       DEFAULT_PINMUX(GPIO_PG5,       SPI4,        NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PG6,       SPI4,        UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PG7,       SPI4,        UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(GPIO_PI3,       SPI4,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(PG5,       SPI4,        NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(PG6,       SPI4,        UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(PG7,       SPI4,        UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(PI3,       SPI4,        NORMAL,    NORMAL,   INPUT),

 
        /* Touch IRQ */
 
        /* Touch IRQ */

-       DEFAULT_PINMUX(GPIO_W3_AUD,   RSVD1,       NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(GPIO_W3_AUD_PW3,   RSVD1,       NORMAL,    NORMAL,   INPUT),

 
        /* PWM1 pinmux */
 
        /* PWM1 pinmux */

-       DEFAULT_PINMUX(GPIO_PH1,       PWM1,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(PH1,       PWM1,       NORMAL,    NORMAL,   OUTPUT),

 
        /* SDMMC1 pinmux */
 
        /* SDMMC1 pinmux */

-       DEFAULT_PINMUX(SDMMC1_CLK,    SDMMC1,      NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_CMD,    SDMMC1,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT0,   SDMMC1,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT1,   SDMMC1,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT2,   SDMMC1,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC1_DAT3,   SDMMC1,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_CLK_PZ0,    SDMMC1,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_CMD_PZ1,    SDMMC1,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_DAT0_PY7,   SDMMC1,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_DAT1_PY6,   SDMMC1,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_DAT2_PY5,   SDMMC1,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC1_DAT3_PY4,   SDMMC1,      UP,        NORMAL,   INPUT),

 
        /* SDMMC3 pinmux */
 
        /* SDMMC3 pinmux */

-       DEFAULT_PINMUX(SDMMC3_CLK,    SDMMC3,      NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_CMD,    SDMMC3,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT0,   SDMMC3,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT1,   SDMMC3,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT2,   SDMMC3,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_DAT3,   SDMMC3,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_CLK_LB_IN,  SDMMC3,  UP,        TRISTATE, INPUT),
-       DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT, SDMMC3,  DOWN,      NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_CLK_PA6,    SDMMC3,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_CMD_PA7,    SDMMC3,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_DAT0_PB7,   SDMMC3,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_DAT1_PB6,   SDMMC3,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_DAT2_PB5,   SDMMC3,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_DAT3_PB4,   SDMMC3,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_CLK_LB_IN_PEE5,  SDMMC3,  UP,        TRISTATE, INPUT),
+       DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3,  DOWN,      NORMAL,   INPUT),

 
        /* SDMMC4 pinmux */
 
        /* SDMMC4 pinmux */

-       DEFAULT_PINMUX(SDMMC4_CLK,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_CMD,    SDMMC4,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT0,   SDMMC4,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT1,   SDMMC4,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT2,   SDMMC4,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT3,   SDMMC4,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT4,   SDMMC4,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT5,   SDMMC4,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT6,   SDMMC4,      UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC4_DAT7,   SDMMC4,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_CLK_PCC4,    SDMMC4,      NORMAL,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_CMD_PT7,     SDMMC4,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT0_PAA0,   SDMMC4,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT1_PAA1,   SDMMC4,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT2_PAA2,   SDMMC4,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT3_PAA3,   SDMMC4,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT4_PAA4,   SDMMC4,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT5_PAA5,   SDMMC4,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT6_PAA6,   SDMMC4,      UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC4_DAT7_PAA7,   SDMMC4,      UP,        NORMAL,   INPUT),

 
        /* BLINK pinmux */
 
        /* BLINK pinmux */

-       DEFAULT_PINMUX(CLK_32K_OUT,   BLINK,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(CLK_32K_OUT_PA0,   BLINK,       NORMAL,    NORMAL,   OUTPUT),

 
        /* KBC pinmux */
 
        /* KBC pinmux */

-       DEFAULT_PINMUX(KB_COL0,       KBC,         UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(KB_COL1,       KBC,         UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(KB_COL2,       KBC,         UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(KB_ROW0,       KBC,         UP,        NORMAL,   INPUT),
-       DEFAULT_PINMUX(KB_ROW1,       KBC,         UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(KB_COL0_PQ0,       KBC,         UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(KB_COL1_PQ1,       KBC,         UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(KB_COL2_PQ2,       KBC,         UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(KB_ROW0_PR0,       KBC,         UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(KB_ROW1_PR1,       KBC,         UP,        NORMAL,   INPUT),

 
        /* Misc */
 
        /* Misc */

-       DEFAULT_PINMUX(GPIO_PV0,      RSVD1,       NORMAL,    TRISTATE, OUTPUT),
-       DEFAULT_PINMUX(KB_ROW7,       RSVD1,       UP,        NORMAL,   INPUT),
+       DEFAULT_PINMUX(PV0,               RSVD1,       NORMAL,    TRISTATE, OUTPUT),
+       DEFAULT_PINMUX(KB_ROW7_PR7,       RSVD1,       UP,        NORMAL,   INPUT),

 
        /* UARTA pinmux (BR_UART_TXD/RXD on Servo board) */
 
        /* UARTA pinmux (BR_UART_TXD/RXD on Servo board) */

-       DEFAULT_PINMUX(KB_ROW9,       UARTA,       UP,        NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(KB_ROW10,      UARTA,       UP,        TRISTATE, INPUT),
+       DEFAULT_PINMUX(KB_ROW9_PS1,       UARTA,       UP,        NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(KB_ROW10_PS2,      UARTA,       UP,        TRISTATE, INPUT),

 
        /* I2CPWR pinmux (I2C5) */
 
        /* I2CPWR pinmux (I2C5) */

-       I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-       I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),

 
        /* RTCK pinmux */
        DEFAULT_PINMUX(JTAG_RTCK,     RTCK,        NORMAL,    NORMAL,   INPUT),
 
        /* RTCK pinmux */
        DEFAULT_PINMUX(JTAG_RTCK,     RTCK,        NORMAL,    NORMAL,   INPUT),


@@ -220,115 +220,115 @@ static struct pmux_pingrp_config tegra124_pinmux_common[] = {
        DEFAULT_PINMUX(RESET_OUT_N,   RESET_OUT_N, NORMAL,    NORMAL,   OUTPUT),
 
        /* EXTPERIPH3 pinmux */
        DEFAULT_PINMUX(RESET_OUT_N,   RESET_OUT_N, NORMAL,    NORMAL,   OUTPUT),
 
        /* EXTPERIPH3 pinmux */

-       DEFAULT_PINMUX(CLK3_OUT,      EXTPERIPH3,  NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3,  NORMAL,    NORMAL,   OUTPUT),

 
        /* I2C1 pinmux */
 
        /* I2C1 pinmux */

-       I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-       I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),

 
        /* UARTB, GPS */
 
        /* UARTB, GPS */

-       DEFAULT_PINMUX(UART2_CTS_N,   UARTB,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(UART2_RTS_N,   UARTB,       NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(UART2_RXD,     UARTB,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(UART2_TXD,     UARTB,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(UART2_CTS_N_PJ5,   UARTB,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(UART2_RTS_N_PJ6,   UARTB,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(UART2_RXD_PC3,     IRDA,        NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(UART2_TXD_PC2,     IRDA,        NORMAL,    NORMAL,   OUTPUT),

 
        /* UARTC (WIFI/BT) */
 
        /* UARTC (WIFI/BT) */

-       DEFAULT_PINMUX(UART3_CTS_N,   UARTC,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(UART3_RTS_N,   UARTC,       NORMAL,    NORMAL,   OUTPUT),
-       DEFAULT_PINMUX(UART3_RXD,     UARTC,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(UART3_TXD,     UARTC,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(UART3_CTS_N_PA1,   UARTC,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(UART3_RTS_N_PC0,   UARTC,       NORMAL,    NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(UART3_RXD_PW7,     UARTC,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(UART3_TXD_PW6,     UARTC,       NORMAL,    NORMAL,   OUTPUT),

 
        /* CEC pinmux */
 
        /* CEC pinmux */

-       CEC_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
+       CEC_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),

 
        /* I2C4 (HDMI_DDC) pinmux */
 
        /* I2C4 (HDMI_DDC) pinmux */

-       DDC_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
-       DDC_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
+       DDC_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
+       DDC_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),

 
        /* USB pinmux */
 
        /* USB pinmux */

-       USB_PINMUX(USB_VBUS_EN0, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
-       USB_PINMUX(USB_VBUS_EN1, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       USB_PINMUX(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
+       USB_PINMUX(USB_VBUS_EN1_PN5, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),

 
        /* Unused, marked SNN_ on schematic, TRISTATE 'em */
 
        /* Unused, marked SNN_ on schematic, TRISTATE 'em */

-       DEFAULT_PINMUX(GPIO_PBB0,     RSVD3,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PBB3,     RSVD3,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PBB4,     RSVD3,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PBB5,     RSVD2,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PBB6,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PBB7,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PCC1,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PCC2,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PH3,      GMI,         NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PI7,      GMI,         NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PJ2,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_X5_AUD,   RSVD3,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_X6_AUD,   GMI,         NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_W2_AUD,   RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(GPIO_PFF2,     RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(USB_VBUS_EN2,  RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(KB_COL5,       RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(KB_ROW2,       RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(KB_ROW3,       KBC,         NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(KB_ROW5,       RSVD2,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(KB_ROW6,       KBC,         NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(KB_ROW13,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(KB_ROW14,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(KB_ROW16,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(OWR,           RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(ULPI_DATA7,    ULPI,        NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(DAP3_DIN,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(DAP3_FS,       RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(DAP3_SCLK,     RSVD2,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(CLK2_OUT,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(SDMMC1_WP_N,   RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(CAM_MCLK,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(CLK3_REQ,      RSVD1,       NORMAL,    TRISTATE, INPUT),
-       DEFAULT_PINMUX(SPDIF_OUT,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PBB0,     RSVD3,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PBB3,     RSVD3,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PBB4,     RSVD3,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PBB5,     RSVD2,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PBB6,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PBB7,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PCC1,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PCC2,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PH3,      GMI,         NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PI7,      GMI,         NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PJ2,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(GPIO_X5_AUD_PX5,   RSVD3,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(GPIO_X6_AUD_PX6,   GMI,         NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(GPIO_W2_AUD_PW2,   RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(PFF2,     RSVD1,   NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(USB_VBUS_EN2_PFF1, RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(KB_COL5_PQ5,       RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(KB_ROW2_PR2,       RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(KB_ROW3_PR3,       KBC,         NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(KB_ROW5_PR5,       RSVD2,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(KB_ROW6_PR6,       KBC,         NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(KB_ROW13_PS5,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(KB_ROW14_PS6,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(KB_ROW16_PT0,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(OWR,               RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(ULPI_DATA7_PO0,    ULPI,        NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(DAP3_DIN_PP1,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(DAP3_FS_PP0,       RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(DAP3_SCLK_PP3,     RSVD2,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(CLK2_OUT_PW5,      RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(SDMMC1_WP_N_PV3,   RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(CAM_MCLK_PCC0,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(CLK3_REQ_PEE1,     RSVD1,       NORMAL,    TRISTATE, INPUT),
+       DEFAULT_PINMUX(SPDIF_OUT_PK5,     RSVD1,       NORMAL,    TRISTATE, INPUT),

 };
 
 static struct pmux_pingrp_config unused_pins_lowpower[] = {
 };
 
 static struct pmux_pingrp_config unused_pins_lowpower[] = {

-       DEFAULT_PINMUX(CLK1_REQ,      RSVD3,    DOWN, TRISTATE, OUTPUT),
+       DEFAULT_PINMUX(DAP_MCLK1_REQ_PEE2,      RSVD3,    DOWN, TRISTATE, OUTPUT),

 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */
 static struct pmux_pingrp_config tegra124_pinmux_set_nontristate[] = {
 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */
 static struct pmux_pingrp_config tegra124_pinmux_set_nontristate[] = {

-       DEFAULT_PINMUX(GPIO_X4_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
-       DEFAULT_PINMUX(GPIO_X7_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
-       DEFAULT_PINMUX(GPIO_W2_AUD,     RSVD1,  UP,      NORMAL,    INPUT),
-       DEFAULT_PINMUX(GPIO_X3_AUD,     RSVD3,  UP,      NORMAL,    INPUT),
+       DEFAULT_PINMUX(GPIO_X4_AUD_PX4,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
+       DEFAULT_PINMUX(GPIO_X7_AUD_PX7,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
+       DEFAULT_PINMUX(GPIO_W2_AUD_PW2,     RSVD1,  UP,      NORMAL,    INPUT),
+       DEFAULT_PINMUX(GPIO_X3_AUD_PX3,     RSVD3,  UP,      NORMAL,    INPUT),

 
        /* EN_VDD_BL */
 
        /* EN_VDD_BL */

-       DEFAULT_PINMUX(DAP3_DOUT,       I2S2,   DOWN,    NORMAL,    OUTPUT),
+       DEFAULT_PINMUX(DAP3_DOUT_PP2,       I2S2,   DOWN,    NORMAL,    OUTPUT),

 
        /* MODEM */
 
        /* MODEM */

-       DEFAULT_PINMUX(GPIO_PV0,        RSVD3,  NORMAL,  NORMAL,    INPUT),
-       DEFAULT_PINMUX(GPIO_PV1,        RSVD1,  NORMAL,  NORMAL,    INPUT),
+       DEFAULT_PINMUX(PV0,        RSVD3,  NORMAL,  NORMAL,    INPUT),
+       DEFAULT_PINMUX(PV1,        RSVD1,  NORMAL,  NORMAL,    INPUT),

 
        /* BOOT_SEL0-3 */
 
        /* BOOT_SEL0-3 */

-       DEFAULT_PINMUX(GPIO_PG0,         GMI,    NORMAL,  NORMAL,    INPUT),
-       DEFAULT_PINMUX(GPIO_PG1,         GMI,    NORMAL,  NORMAL,    INPUT),
-       DEFAULT_PINMUX(GPIO_PG2,         GMI,    NORMAL,  NORMAL,    INPUT),
-       DEFAULT_PINMUX(GPIO_PG3,         GMI,    NORMAL,  NORMAL,    INPUT),
+       DEFAULT_PINMUX(PG0,         GMI,    NORMAL,  NORMAL,    INPUT),
+       DEFAULT_PINMUX(PG1,         GMI,    NORMAL,  NORMAL,    INPUT),
+       DEFAULT_PINMUX(PG2,         GMI,    NORMAL,  NORMAL,    INPUT),
+       DEFAULT_PINMUX(PG3,         GMI,    NORMAL,  NORMAL,    INPUT),

 
 

-       DEFAULT_PINMUX(CLK2_REQ,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
+       DEFAULT_PINMUX(CLK2_REQ_PCC5,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),

 
 

-       DEFAULT_PINMUX(KB_COL3,         KBC,    UP,      NORMAL,    OUTPUT),
-       DEFAULT_PINMUX(KB_COL4,         SDMMC3, UP,      NORMAL,    INPUT),
-       DEFAULT_PINMUX(KB_COL6,         KBC,    UP,      NORMAL,    OUTPUT),
-       DEFAULT_PINMUX(KB_COL7,         KBC,    UP,      NORMAL,    OUTPUT),
-       DEFAULT_PINMUX(KB_ROW4,         KBC,    DOWN,    NORMAL,    INPUT),
-       DEFAULT_PINMUX(KB_ROW8,         KBC,    UP,      NORMAL,    INPUT),
+       DEFAULT_PINMUX(KB_COL3_PQ3,         KBC,    UP,      NORMAL,    OUTPUT),
+       DEFAULT_PINMUX(KB_COL4_PQ4,         SDMMC3, UP,      NORMAL,    INPUT),
+       DEFAULT_PINMUX(KB_COL6_PQ6,         KBC,    UP,      NORMAL,    OUTPUT),
+       DEFAULT_PINMUX(KB_COL7_PQ7,         KBC,    UP,      NORMAL,    OUTPUT),
+       DEFAULT_PINMUX(KB_ROW4_PR4,         KBC,    DOWN,    NORMAL,    INPUT),
+       DEFAULT_PINMUX(KB_ROW8_PS0,         KBC,    UP,      NORMAL,    INPUT),

 
 

-       DEFAULT_PINMUX(GPIO_PU4,        RSVD3,  NORMAL,  NORMAL,    INPUT),
-       DEFAULT_PINMUX(GPIO_PU5,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
-       DEFAULT_PINMUX(GPIO_PU6,        RSVD3,  NORMAL,  NORMAL,    INPUT),
+       DEFAULT_PINMUX(PU4,        RSVD3,  NORMAL,  NORMAL,    INPUT),
+       DEFAULT_PINMUX(PU5,        RSVD3,  NORMAL,  NORMAL,    OUTPUT),
+       DEFAULT_PINMUX(PU6,        RSVD3,  NORMAL,  NORMAL,    INPUT),

 
 

-       DEFAULT_PINMUX(HDMI_INT,        RSVD1,  DOWN,    NORMAL,   INPUT),
-       DEFAULT_PINMUX(SPDIF_IN,        USB,    NORMAL,   NORMAL,   INPUT),
-       DEFAULT_PINMUX(SDMMC3_CD_N,     SDMMC3, UP,       NORMAL,   INPUT),
+       DEFAULT_PINMUX(HDMI_INT_PN7,        RSVD1,  DOWN,    NORMAL,   INPUT),
+       DEFAULT_PINMUX(SPDIF_IN_PK6,        RSVD2,  NORMAL,  NORMAL,   INPUT),
+       DEFAULT_PINMUX(SDMMC3_CD_N_PV2,     SDMMC3, UP,      NORMAL,   INPUT),

 
        /* TS_SHDN_L */
 
        /* TS_SHDN_L */

-       DEFAULT_PINMUX(GPIO_PK1,        GMI,    NORMAL,   NORMAL,   OUTPUT),
+       DEFAULT_PINMUX(PK1,        GMI,    NORMAL,   NORMAL,   OUTPUT),

 };
 
 static struct pmux_drvgrp_config venice2_padctrl[] = {
 };
 
 static struct pmux_drvgrp_config venice2_padctrl[] = {