ARM: tegra: pinmux naming consistency fixes

Clean up the naming of pinmux-related objects:
* Refer to drive groups rather than pad groups to match the Linux kernel.
* Ensure all pinmux API types are prefixed with pmux_, values (defines)
  are prefixed with PMUX_, and functions prefixed with pinmux_.
* Modify a few type names to make their content clearer.
* Minimal changes to SoC-specific .h/.c files are made so the code still
  compiles. A separate per-SoC change will be made immediately following,
  in order to keep individual patch size down.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

diff --git a/arch/arm/cpu/tegra-common/pinmux-common.c b/arch/arm/cpu/tegra-common/pinmux-common.c
index 51ba6eecdfab2ce24d011650bffebdeb6b0aa631..32a46d53f068e3b35875a8cb037a47d0059c3177 100644 (file)
--- a/arch/arm/cpu/tegra-common/pinmux-common.c
+++ b/arch/arm/cpu/tegra-common/pinmux-common.c
@@ -10,7 +10,7 @@
 #include <asm/arch/pinmux.h>
 
 /* return 1 if a pingrp is in range */
 #include <asm/arch/pinmux.h>
 
 /* return 1 if a pingrp is in range */

-#define pmux_pingrp_isvalid(pin) (((pin) >= 0) && ((pin) < PINGRP_COUNT))
+#define pmux_pingrp_isvalid(pin) (((pin) >= 0) && ((pin) < PMUX_PINGRP_COUNT))

 
 /* return 1 if a pmux_func is in range */
 #define pmux_func_isvalid(func) \
 
 /* return 1 if a pmux_func is in range */
 #define pmux_func_isvalid(func) \


@@ -275,9 +275,9 @@ static void pinmux_set_rcv_sel(enum pmux_pingrp pin,
 #endif /* TEGRA_PMX_HAS_RCV_SEL */
 #endif /* TEGRA_PMX_HAS_PIN_IO_BIT_ETC */
 
 #endif /* TEGRA_PMX_HAS_RCV_SEL */
 #endif /* TEGRA_PMX_HAS_PIN_IO_BIT_ETC */
 

-static void pinmux_config_pingroup(const struct pingroup_config *config)
+static void pinmux_config_pingrp(const struct pmux_pingrp_config *config)

 {
 {

-       enum pmux_pingrp pin = config->pingroup;
+       enum pmux_pingrp pin = config->pingrp;

 
        pinmux_set_func(pin, config->func);
        pinmux_set_pullupdown(pin, config->pull);
 
        pinmux_set_func(pin, config->func);
        pinmux_set_pullupdown(pin, config->pull);


@@ -293,32 +293,33 @@ static void pinmux_config_pingroup(const struct pingroup_config *config)
 #endif
 }
 
 #endif
 }
 

-void pinmux_config_table(const struct pingroup_config *config, int len)
+void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
+                               int len)

 {
        int i;
 
        for (i = 0; i < len; i++)
 {
        int i;
 
        for (i = 0; i < len; i++)

-               pinmux_config_pingroup(&config[i]);
+               pinmux_config_pingrp(&config[i]);

 }
 
 }
 

-#ifdef TEGRA_PMX_HAS_PADGRPS
+#ifdef TEGRA_PMX_HAS_DRVGRPS

 
 

-#define pmux_padgrp_isvalid(pd) (((pd) >= 0) && ((pd) < PDRIVE_PINGROUP_COUNT))
+#define pmux_drvgrp_isvalid(pd) (((pd) >= 0) && ((pd) < PMUX_DRVGRP_COUNT))

 
 

-#define pmux_pad_slw_isvalid(slw) \
-       (((slw) >= PGRP_SLWF_MIN) && ((slw) <= PGRP_SLWF_MAX))
+#define pmux_slw_isvalid(slw) \
+       (((slw) >= PMUX_SLWF_MIN) && ((slw) <= PMUX_SLWF_MAX))

 
 

-#define pmux_pad_drv_isvalid(drv) \
-       (((drv) >= PGRP_DRVUP_MIN) && ((drv) <= PGRP_DRVUP_MAX))
+#define pmux_drv_isvalid(drv) \
+       (((drv) >= PMUX_DRVUP_MIN) && ((drv) <= PMUX_DRVUP_MAX))

 
 

-#define pmux_pad_lpmd_isvalid(lpm) \
-       (((lpm) >= PGRP_LPMD_X8) && ((lpm) <= PGRP_LPMD_X))
+#define pmux_lpmd_isvalid(lpm) \
+       (((lpm) >= PMUX_LPMD_X8) && ((lpm) <= PMUX_LPMD_X))

 
 

-#define pmux_pad_schmt_isvalid(schmt) \
-       (((schmt) >= PGRP_SCHMT_DISABLE) && ((schmt) <= PGRP_SCHMT_ENABLE))
+#define pmux_schmt_isvalid(schmt) \
+       (((schmt) >= PMUX_SCHMT_DISABLE) && ((schmt) <= PMUX_SCHMT_ENABLE))

 
 

-#define pmux_pad_hsm_isvalid(hsm) \
-       (((hsm) >= PGRP_HSM_DISABLE) && ((hsm) <= PGRP_HSM_ENABLE))
+#define pmux_hsm_isvalid(hsm) \
+       (((hsm) >= PMUX_HSM_DISABLE) && ((hsm) <= PMUX_HSM_ENABLE))

 
 #define HSM_SHIFT      2
 #define SCHMT_SHIFT    3
 
 #define HSM_SHIFT      2
 #define SCHMT_SHIFT    3


@@ -333,18 +334,18 @@ void pinmux_config_table(const struct pingroup_config *config, int len)
 #define SLWF_SHIFT     30
 #define SLWF_MASK      (3 << SLWF_SHIFT)
 
 #define SLWF_SHIFT     30
 #define SLWF_MASK      (3 << SLWF_SHIFT)
 

-static void padgrp_set_drvup_slwf(enum pdrive_pingrp grp, int slwf)
+static void pinmux_set_drvup_slwf(enum pmux_drvgrp grp, int slwf)

 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */
 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */

-       if (slwf == PGRP_SLWF_NONE)
+       if (slwf == PMUX_SLWF_NONE)

                return;
 
        /* Error check on pad and slwf */
                return;
 
        /* Error check on pad and slwf */

-       assert(pmux_padgrp_isvalid(grp));
-       assert(pmux_pad_slw_isvalid(slwf));
+       assert(pmux_drvgrp_isvalid(grp));
+       assert(pmux_slw_isvalid(slwf));

 
        val = readl(reg);
        val &= ~SLWF_MASK;
 
        val = readl(reg);
        val &= ~SLWF_MASK;


@@ -354,18 +355,18 @@ static void padgrp_set_drvup_slwf(enum pdrive_pingrp grp, int slwf)
        return;
 }
 
        return;
 }
 

-static void padgrp_set_drvdn_slwr(enum pdrive_pingrp grp, int slwr)
+static void pinmux_set_drvdn_slwr(enum pmux_drvgrp grp, int slwr)

 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */
 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */

-       if (slwr == PGRP_SLWR_NONE)
+       if (slwr == PMUX_SLWR_NONE)

                return;
 
        /* Error check on pad and slwr */
                return;
 
        /* Error check on pad and slwr */

-       assert(pmux_padgrp_isvalid(grp));
-       assert(pmux_pad_slw_isvalid(slwr));
+       assert(pmux_drvgrp_isvalid(grp));
+       assert(pmux_slw_isvalid(slwr));

 
        val = readl(reg);
        val &= ~SLWR_MASK;
 
        val = readl(reg);
        val &= ~SLWR_MASK;


@@ -375,18 +376,18 @@ static void padgrp_set_drvdn_slwr(enum pdrive_pingrp grp, int slwr)
        return;
 }
 
        return;
 }
 

-static void padgrp_set_drvup(enum pdrive_pingrp grp, int drvup)
+static void pinmux_set_drvup(enum pmux_drvgrp grp, int drvup)

 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */
 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */

-       if (drvup == PGRP_DRVUP_NONE)
+       if (drvup == PMUX_DRVUP_NONE)

                return;
 
        /* Error check on pad and drvup */
                return;
 
        /* Error check on pad and drvup */

-       assert(pmux_padgrp_isvalid(grp));
-       assert(pmux_pad_drv_isvalid(drvup));
+       assert(pmux_drvgrp_isvalid(grp));
+       assert(pmux_drv_isvalid(drvup));

 
        val = readl(reg);
        val &= ~DRVUP_MASK;
 
        val = readl(reg);
        val &= ~DRVUP_MASK;


@@ -396,18 +397,18 @@ static void padgrp_set_drvup(enum pdrive_pingrp grp, int drvup)
        return;
 }
 
        return;
 }
 

-static void padgrp_set_drvdn(enum pdrive_pingrp grp, int drvdn)
+static void pinmux_set_drvdn(enum pmux_drvgrp grp, int drvdn)

 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */
 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */

-       if (drvdn == PGRP_DRVDN_NONE)
+       if (drvdn == PMUX_DRVDN_NONE)

                return;
 
        /* Error check on pad and drvdn */
                return;
 
        /* Error check on pad and drvdn */

-       assert(pmux_padgrp_isvalid(grp));
-       assert(pmux_pad_drv_isvalid(drvdn));
+       assert(pmux_drvgrp_isvalid(grp));
+       assert(pmux_drv_isvalid(drvdn));

 
        val = readl(reg);
        val &= ~DRVDN_MASK;
 
        val = readl(reg);
        val &= ~DRVDN_MASK;


@@ -417,18 +418,18 @@ static void padgrp_set_drvdn(enum pdrive_pingrp grp, int drvdn)
        return;
 }
 
        return;
 }
 

-static void padgrp_set_lpmd(enum pdrive_pingrp grp, enum pgrp_lpmd lpmd)
+static void pinmux_set_lpmd(enum pmux_drvgrp grp, enum pmux_lpmd lpmd)

 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */
 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */

-       if (lpmd == PGRP_LPMD_NONE)
+       if (lpmd == PMUX_LPMD_NONE)

                return;
 
        /* Error check pad and lpmd value */
                return;
 
        /* Error check pad and lpmd value */

-       assert(pmux_padgrp_isvalid(grp));
-       assert(pmux_pad_lpmd_isvalid(lpmd));
+       assert(pmux_drvgrp_isvalid(grp));
+       assert(pmux_lpmd_isvalid(lpmd));

 
        val = readl(reg);
        val &= ~LPMD_MASK;
 
        val = readl(reg);
        val &= ~LPMD_MASK;


@@ -438,21 +439,21 @@ static void padgrp_set_lpmd(enum pdrive_pingrp grp, enum pgrp_lpmd lpmd)
        return;
 }
 
        return;
 }
 

-static void padgrp_set_schmt(enum pdrive_pingrp grp, enum pgrp_schmt schmt)
+static void pinmux_set_schmt(enum pmux_drvgrp grp, enum pmux_schmt schmt)

 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */
 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */

-       if (schmt == PGRP_SCHMT_NONE)
+       if (schmt == PMUX_SCHMT_NONE)

                return;
 
        /* Error check pad */
                return;
 
        /* Error check pad */

-       assert(pmux_padgrp_isvalid(grp));
-       assert(pmux_pad_schmt_isvalid(schmt));
+       assert(pmux_drvgrp_isvalid(grp));
+       assert(pmux_schmt_isvalid(schmt));

 
        val = readl(reg);
 
        val = readl(reg);

-       if (schmt == PGRP_SCHMT_ENABLE)
+       if (schmt == PMUX_SCHMT_ENABLE)

                val |= (1 << SCHMT_SHIFT);
        else
                val &= ~(1 << SCHMT_SHIFT);
                val |= (1 << SCHMT_SHIFT);
        else
                val &= ~(1 << SCHMT_SHIFT);


@@ -461,21 +462,21 @@ static void padgrp_set_schmt(enum pdrive_pingrp grp, enum pgrp_schmt schmt)
        return;
 }
 
        return;
 }
 

-static void padgrp_set_hsm(enum pdrive_pingrp grp, enum pgrp_hsm hsm)
+static void pinmux_set_hsm(enum pmux_drvgrp grp, enum pmux_hsm hsm)

 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */
 {
        u32 *reg = DRV_REG(grp);
        u32 val;
 
        /* NONE means unspecified/do not change/use POR value */

-       if (hsm == PGRP_HSM_NONE)
+       if (hsm == PMUX_HSM_NONE)

                return;
 
        /* Error check pad */
                return;
 
        /* Error check pad */

-       assert(pmux_padgrp_isvalid(grp));
-       assert(pmux_pad_hsm_isvalid(hsm));
+       assert(pmux_drvgrp_isvalid(grp));
+       assert(pmux_hsm_isvalid(hsm));

 
        val = readl(reg);
 
        val = readl(reg);

-       if (hsm == PGRP_HSM_ENABLE)
+       if (hsm == PMUX_HSM_ENABLE)

                val |= (1 << HSM_SHIFT);
        else
                val &= ~(1 << HSM_SHIFT);
                val |= (1 << HSM_SHIFT);
        else
                val &= ~(1 << HSM_SHIFT);


@@ -484,24 +485,25 @@ static void padgrp_set_hsm(enum pdrive_pingrp grp, enum pgrp_hsm hsm)
        return;
 }
 
        return;
 }
 

-static void padctrl_config_pingroup(const struct padctrl_config *config)
+static void pinmux_config_drvgrp(const struct pmux_drvgrp_config *config)

 {
 {

-       enum pdrive_pingrp grp = config->padgrp;
-
-       padgrp_set_drvup_slwf(grp, config->slwf);
-       padgrp_set_drvdn_slwr(grp, config->slwr);
-       padgrp_set_drvup(grp, config->drvup);
-       padgrp_set_drvdn(grp, config->drvdn);
-       padgrp_set_lpmd(grp, config->lpmd);
-       padgrp_set_schmt(grp, config->schmt);
-       padgrp_set_hsm(grp, config->hsm);
+       enum pmux_drvgrp grp = config->drvgrp;
+
+       pinmux_set_drvup_slwf(grp, config->slwf);
+       pinmux_set_drvdn_slwr(grp, config->slwr);
+       pinmux_set_drvup(grp, config->drvup);
+       pinmux_set_drvdn(grp, config->drvdn);
+       pinmux_set_lpmd(grp, config->lpmd);
+       pinmux_set_schmt(grp, config->schmt);
+       pinmux_set_hsm(grp, config->hsm);

 }
 
 }
 

-void padgrp_config_table(const struct padctrl_config *config, int len)
+void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
+                               int len)

 {
        int i;
 
        for (i = 0; i < len; i++)
 {
        int i;
 
        for (i = 0; i < len; i++)

-               padctrl_config_pingroup(&config[i]);
+               pinmux_config_drvgrp(&config[i]);

 }
 }

-#endif /* TEGRA_PMX_HAS_PADGRPS */
+#endif /* TEGRA_PMX_HAS_DRVGRPS */

diff --git a/arch/arm/cpu/tegra114-common/pinmux.c b/arch/arm/cpu/tegra114-common/pinmux.c
index 5076717592eb2682f236a3312ebd89d17e4d4c4b..5d3d4d52e8a1272cb8ae1329bdc1a38656ba95cc 100644 (file)
--- a/arch/arm/cpu/tegra114-common/pinmux.c
+++ b/arch/arm/cpu/tegra114-common/pinmux.c
@@ -41,7 +41,7 @@
 #define PIN_RESERVED \
        PIN(NONE, NONE, INVALID, INVALID, INVALID, INVALID, NONE)
 
 #define PIN_RESERVED \
        PIN(NONE, NONE, INVALID, INVALID, INVALID, INVALID, NONE)
 

-static const struct tegra_pingroup_desc tegra114_pingroups[PINGRP_COUNT] = {
+static const struct pmux_pingrp_desc tegra114_pingroups[PMUX_PINGRP_COUNT] = {

        /*      NAME      VDD      f0           f1         f2       f3  */
        PINI(ULPI_DATA0,  BB,      SPI3,       HSI,        UARTA,   ULPI),
        PINI(ULPI_DATA1,  BB,      SPI3,       HSI,        UARTA,   ULPI),
        /*      NAME      VDD      f0           f1         f2       f3  */
        PINI(ULPI_DATA0,  BB,      SPI3,       HSI,        UARTA,   ULPI),
        PINI(ULPI_DATA1,  BB,      SPI3,       HSI,        UARTA,   ULPI),


@@ -303,4 +303,4 @@ static const struct tegra_pingroup_desc tegra114_pingroups[PINGRP_COUNT] = {
        PIN_RESERVED,   /* Reserved by t114: 0x3404 */
        PINO(RESET_OUT_N, SYS,     RSVD1,      RSVD2,      RSVD3, RESET_OUT_N),
 };
        PIN_RESERVED,   /* Reserved by t114: 0x3404 */
        PINO(RESET_OUT_N, SYS,     RSVD1,      RSVD2,      RSVD3, RESET_OUT_N),
 };

-const struct tegra_pingroup_desc *tegra_soc_pingroups = tegra114_pingroups;
+const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra114_pingroups;

diff --git a/arch/arm/cpu/tegra124-common/pinmux.c b/arch/arm/cpu/tegra124-common/pinmux.c
index 137f3de96be0b3d7c1a84b516b42f65e9164e03f..a2385653055cba81b57bbc75c790b78eb2abd4f7 100644 (file)
--- a/arch/arm/cpu/tegra124-common/pinmux.c
+++ b/arch/arm/cpu/tegra124-common/pinmux.c
@@ -32,7 +32,7 @@
 #define PIN_RESERVED \
        PIN(NONE, NONE, INVALID, INVALID, INVALID, INVALID, NONE)
 
 #define PIN_RESERVED \
        PIN(NONE, NONE, INVALID, INVALID, INVALID, INVALID, NONE)
 

-static const struct tegra_pingroup_desc tegra124_pingroups[PINGRP_COUNT] = {
+static const struct pmux_pingrp_desc tegra124_pingroups[PMUX_PINGRP_COUNT] = {

        /*      NAME      VDD      f0           f1         f2       f3  */
        PINI(ULPI_DATA0,  BB,      SPI3,       HSI,        UARTA,   ULPI),
        PINI(ULPI_DATA1,  BB,      SPI3,       HSI,        UARTA,   ULPI),
        /*      NAME      VDD      f0           f1         f2       f3  */
        PINI(ULPI_DATA0,  BB,      SPI3,       HSI,        UARTA,   ULPI),
        PINI(ULPI_DATA1,  BB,      SPI3,       HSI,        UARTA,   ULPI),


@@ -294,4 +294,4 @@ static const struct tegra_pingroup_desc tegra124_pingroups[PINGRP_COUNT] = {
        PIN_RESERVED,   /* Reserved: 0x3404 */
        PINO(RESET_OUT_N, SYS,     RSVD1,      RSVD2,      RSVD3, RESET_OUT_N),
 };
        PIN_RESERVED,   /* Reserved: 0x3404 */
        PINO(RESET_OUT_N, SYS,     RSVD1,      RSVD2,      RSVD3, RESET_OUT_N),
 };

-const struct tegra_pingroup_desc *tegra_soc_pingroups = tegra124_pingroups;
+const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra124_pingroups;

diff --git a/arch/arm/cpu/tegra20-common/funcmux.c b/arch/arm/cpu/tegra20-common/funcmux.c
index 1931908199d1682a732b41a33a9b5625abc03554..8ae28672499a2e809c636f66be3c5f3bb8676dde 100644 (file)
--- a/arch/arm/cpu/tegra20-common/funcmux.c
+++ b/arch/arm/cpu/tegra20-common/funcmux.c
@@ -16,7 +16,7 @@
 #define PINMUX(grp, mux, pupd, tri)                   \
        {PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri}
 
 #define PINMUX(grp, mux, pupd, tri)                   \
        {PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri}
 

-static const struct pingroup_config disp1_default[] = {
+static const struct pmux_pingrp_config disp1_default[] = {

        PINMUX(LDI,   DISPA,      NORMAL,    NORMAL),
        PINMUX(LHP0,  DISPA,      NORMAL,    NORMAL),
        PINMUX(LHP1,  DISPA,      NORMAL,    NORMAL),
        PINMUX(LDI,   DISPA,      NORMAL,    NORMAL),
        PINMUX(LHP0,  DISPA,      NORMAL,    NORMAL),
        PINMUX(LHP1,  DISPA,      NORMAL,    NORMAL),


@@ -275,8 +275,8 @@ int funcmux_select(enum periph_id id, int config)
                                pinmux_tristate_disable(i);
                                pinmux_set_pullupdown(i, PMUX_PULL_NORMAL);
                        }
                                pinmux_tristate_disable(i);
                                pinmux_set_pullupdown(i, PMUX_PULL_NORMAL);
                        }

-                       pinmux_config_table(disp1_default,
-                                           ARRAY_SIZE(disp1_default));
+                       pinmux_config_pingrp_table(disp1_default,
+                                                  ARRAY_SIZE(disp1_default));

                }
                break;
 
                }
                break;
 

diff --git a/arch/arm/cpu/tegra20-common/pinmux.c b/arch/arm/cpu/tegra20-common/pinmux.c
index 9e34c8bec07555dfb091877d5834263b615b8516..4c8999500641c38c8e91f6be7373135c5ed304fe 100644 (file)
--- a/arch/arm/cpu/tegra20-common/pinmux.c
+++ b/arch/arm/cpu/tegra20-common/pinmux.c
@@ -283,7 +283,7 @@ enum pmux_pullid {
 
 #define PMUX_FUNC_RSVD PMUX_FUNC_RSVD1
 
 
 #define PMUX_FUNC_RSVD PMUX_FUNC_RSVD1
 

-static const struct tegra_pingroup_desc tegra20_pingroups[] = {
+static const struct pmux_pingrp_desc tegra20_pingroups[] = {

        PIN(ATA,  NAND,  IDE,    NAND,   GMI,       RSVD,        IDE),
        PIN(ATB,  NAND,  IDE,    NAND,   GMI,       SDIO4,       IDE),
        PIN(ATC,  NAND,  IDE,    NAND,   GMI,       SDIO4,       IDE),
        PIN(ATA,  NAND,  IDE,    NAND,   GMI,       RSVD,        IDE),
        PIN(ATB,  NAND,  IDE,    NAND,   GMI,       SDIO4,       IDE),
        PIN(ATC,  NAND,  IDE,    NAND,   GMI,       SDIO4,       IDE),


@@ -434,4 +434,4 @@ static const struct tegra_pingroup_desc tegra20_pingroups[] = {
        PINALL(XM2D,  DDR,   RSVD, RSVD, RSVD, RSVD,  RSVD, MUXCTL_NONE,
                PUCTL_NONE),
 };
        PINALL(XM2D,  DDR,   RSVD, RSVD, RSVD, RSVD,  RSVD, MUXCTL_NONE,
                PUCTL_NONE),
 };

-const struct tegra_pingroup_desc *tegra_soc_pingroups = tegra20_pingroups;
+const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra20_pingroups;

diff --git a/arch/arm/cpu/tegra30-common/pinmux.c b/arch/arm/cpu/tegra30-common/pinmux.c
index a12b0767f2c1aefc3322df36b8d7d48befc45d8f..f1d199321aca84317e1ef7093087b717a4f247f2 100644 (file)
--- a/arch/arm/cpu/tegra30-common/pinmux.c
+++ b/arch/arm/cpu/tegra30-common/pinmux.c
@@ -37,7 +37,7 @@
 #define PINO(pg_name, vdd, f0, f1, f2, f3) \
        PIN(pg_name, vdd, f0, f1, f2, f3, OUTPUT)
 
 #define PINO(pg_name, vdd, f0, f1, f2, f3) \
        PIN(pg_name, vdd, f0, f1, f2, f3, OUTPUT)
 

-static const struct tegra_pingroup_desc tegra30_pingroups[PINGRP_COUNT] = {
+static const struct pmux_pingrp_desc tegra30_pingroups[PMUX_PINGRP_COUNT] = {

        /*      NAME      VDD      f0           f1         f2       f3  */
        PINI(ULPI_DATA0,  BB,      SPI3,        HSI,       UARTA,   ULPI),
        PINI(ULPI_DATA1,  BB,      SPI3,        HSI,       UARTA,   ULPI),
        /*      NAME      VDD      f0           f1         f2       f3  */
        PINI(ULPI_DATA0,  BB,      SPI3,        HSI,       UARTA,   ULPI),
        PINI(ULPI_DATA1,  BB,      SPI3,        HSI,       UARTA,   ULPI),


@@ -289,4 +289,4 @@ static const struct tegra_pingroup_desc tegra30_pingroups[PINGRP_COUNT] = {
        PINI(PEX_L2_CLKREQ_N,   PEXCTL,   PCIE, HDA,       RSVD3,   RSVD4),
        PINI(HDMI_CEC,          SYS,      CEC,  RSVD2,     RSVD3,   RSVD4),
 };
        PINI(PEX_L2_CLKREQ_N,   PEXCTL,   PCIE, HDA,       RSVD3,   RSVD4),
        PINI(HDMI_CEC,          SYS,      CEC,  RSVD2,     RSVD3,   RSVD4),
 };

-const struct tegra_pingroup_desc *tegra_soc_pingroups = tegra30_pingroups;
+const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra30_pingroups;

diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h b/arch/arm/include/asm/arch-tegra/pinmux.h
index b8d21c1bf92f94e1a3d054f0f6fa3c64c952da8e..80b804694aee5a79c2db3c79f228c3093efa5f16 100644 (file)
--- a/arch/arm/include/asm/arch-tegra/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra/pinmux.h
@@ -63,16 +63,16 @@ enum pmux_pin_rcv_sel {
  * you can call pinmux_config_pingroup() to configure a pin in one step. Also
  * available is pinmux_config_table() to configure a list of pins.
  */
  * you can call pinmux_config_pingroup() to configure a pin in one step. Also
  * available is pinmux_config_table() to configure a list of pins.
  */

-struct pingroup_config {
-       enum pmux_pingrp pingroup;      /* pin group PINGRP_...             */
-       enum pmux_func func;            /* function to assign FUNC_...      */
+struct pmux_pingrp_config {
+       enum pmux_pingrp pingrp;        /* pin group PMUX_PINGRP_...        */
+       enum pmux_func func;            /* function to assign PMUX_FUNC_... */

        enum pmux_pull pull;            /* pull up/down/normal PMUX_PULL_...*/
        enum pmux_tristate tristate;    /* tristate or normal PMUX_TRI_...  */
 #ifdef TEGRA_PMX_HAS_PIN_IO_BIT_ETC
        enum pmux_pull pull;            /* pull up/down/normal PMUX_PULL_...*/
        enum pmux_tristate tristate;    /* tristate or normal PMUX_TRI_...  */
 #ifdef TEGRA_PMX_HAS_PIN_IO_BIT_ETC

-       enum pmux_pin_io io;            /* input or output PMUX_PIN_...  */
+       enum pmux_pin_io io;            /* input or output PMUX_PIN_...     */

        enum pmux_pin_lock lock;        /* lock enable/disable PMUX_PIN...  */
        enum pmux_pin_lock lock;        /* lock enable/disable PMUX_PIN...  */

-       enum pmux_pin_od od;            /* open-drain or push-pull driver  */
-       enum pmux_pin_ioreset ioreset;  /* input/output reset PMUX_PIN...  */
+       enum pmux_pin_od od;            /* open-drain or push-pull driver   */
+       enum pmux_pin_ioreset ioreset;  /* input/output reset PMUX_PIN...   */

 #ifdef TEGRA_PMX_HAS_RCV_SEL
        enum pmux_pin_rcv_sel rcv_sel;  /* select between High and Normal  */
                                        /* VIL/VIH receivers */
 #ifdef TEGRA_PMX_HAS_RCV_SEL
        enum pmux_pin_rcv_sel rcv_sel;  /* select between High and Normal  */
                                        /* VIL/VIH receivers */


@@ -103,61 +103,62 @@ void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io);
  * @param config       List of config items
  * @param len          Number of config items in list
  */
  * @param config       List of config items
  * @param len          Number of config items in list
  */

-void pinmux_config_table(const struct pingroup_config *config, int len);
+void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
+                               int len);

 
 

-#ifdef TEGRA_PMX_HAS_PADGRPS
+#ifdef TEGRA_PMX_HAS_DRVGRPS

 
 

-#define PGRP_SLWF_MIN  0
-#define PGRP_SLWF_MAX  3
-#define PGRP_SLWF_NONE -1
+#define PMUX_SLWF_MIN  0
+#define PMUX_SLWF_MAX  3
+#define PMUX_SLWF_NONE -1

 
 

-#define PGRP_SLWR_MIN  0
-#define PGRP_SLWR_MAX  3
-#define PGRP_SLWR_NONE -1
+#define PMUX_SLWR_MIN  0
+#define PMUX_SLWR_MAX  3
+#define PMUX_SLWR_NONE -1

 
 

-#define PGRP_DRVUP_MIN 0
-#define PGRP_DRVUP_MAX 127
-#define PGRP_DRVUP_NONE        -1
+#define PMUX_DRVUP_MIN 0
+#define PMUX_DRVUP_MAX 127
+#define PMUX_DRVUP_NONE        -1

 
 

-#define PGRP_DRVDN_MIN 0
-#define PGRP_DRVDN_MAX 127
-#define PGRP_DRVDN_NONE        -1
+#define PMUX_DRVDN_MIN 0
+#define PMUX_DRVDN_MAX 127
+#define PMUX_DRVDN_NONE        -1

 
 /* Defines a pin group cfg's low-power mode select */
 
 /* Defines a pin group cfg's low-power mode select */

-enum pgrp_lpmd {
-       PGRP_LPMD_X8 = 0,
-       PGRP_LPMD_X4,
-       PGRP_LPMD_X2,
-       PGRP_LPMD_X,
-       PGRP_LPMD_NONE = -1,
+enum pmux_lpmd {
+       PMUX_LPMD_X8 = 0,
+       PMUX_LPMD_X4,
+       PMUX_LPMD_X2,
+       PMUX_LPMD_X,
+       PMUX_LPMD_NONE = -1,

 };
 
 /* Defines whether a pin group cfg's schmidt is enabled or not */
 };
 
 /* Defines whether a pin group cfg's schmidt is enabled or not */

-enum pgrp_schmt {
-       PGRP_SCHMT_DISABLE = 0,
-       PGRP_SCHMT_ENABLE = 1,
-       PGRP_SCHMT_NONE = -1,
+enum pmux_schmt {
+       PMUX_SCHMT_DISABLE = 0,
+       PMUX_SCHMT_ENABLE = 1,
+       PMUX_SCHMT_NONE = -1,

 };
 
 /* Defines whether a pin group cfg's high-speed mode is enabled or not */
 };
 
 /* Defines whether a pin group cfg's high-speed mode is enabled or not */

-enum pgrp_hsm {
-       PGRP_HSM_DISABLE = 0,
-       PGRP_HSM_ENABLE = 1,
-       PGRP_HSM_NONE = -1,
+enum pmux_hsm {
+       PMUX_HSM_DISABLE = 0,
+       PMUX_HSM_ENABLE = 1,
+       PMUX_HSM_NONE = -1,

 };
 
 /*
  * This defines the configuration for a pin group's pad control config
  */
 };
 
 /*
  * This defines the configuration for a pin group's pad control config
  */

-struct padctrl_config {
-       enum pdrive_pingrp padgrp;      /* pin group PDRIVE_PINGRP_x */
+struct pmux_drvgrp_config {
+       enum pmux_drvgrp drvgrp;        /* pin group PMUX_DRVGRP_x   */

        int slwf;                       /* falling edge slew         */
        int slwr;                       /* rising edge slew          */
        int drvup;                      /* pull-up drive strength    */
        int drvdn;                      /* pull-down drive strength  */
        int slwf;                       /* falling edge slew         */
        int slwr;                       /* rising edge slew          */
        int drvup;                      /* pull-up drive strength    */
        int drvdn;                      /* pull-down drive strength  */

-       enum pgrp_lpmd lpmd;            /* low-power mode selection  */
-       enum pgrp_schmt schmt;          /* schmidt enable            */
-       enum pgrp_hsm hsm;              /* high-speed mode enable    */
+       enum pmux_lpmd lpmd;            /* low-power mode selection  */
+       enum pmux_schmt schmt;          /* schmidt enable            */
+       enum pmux_hsm hsm;              /* high-speed mode enable    */

 };
 
 /**
 };
 
 /**


@@ -166,11 +167,12 @@ struct padctrl_config {
  * @param config       List of config items
  * @param len          Number of config items in list
  */
  * @param config       List of config items
  * @param len          Number of config items in list
  */

-void padgrp_config_table(const struct padctrl_config *config, int len);
+void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
+                               int len);

 
 

-#endif /* TEGRA_PMX_HAS_PADGRPS */
+#endif /* TEGRA_PMX_HAS_DRVGRPS */

 
 

-struct tegra_pingroup_desc {
+struct pmux_pingrp_desc {

        enum pmux_func funcs[4];
 #if defined(CONFIG_TEGRA20)
        u32 ctl_id;
        enum pmux_func funcs[4];
 #if defined(CONFIG_TEGRA20)
        u32 ctl_id;


@@ -178,6 +180,6 @@ struct tegra_pingroup_desc {
 #endif /* CONFIG_TEGRA20 */
 };
 
 #endif /* CONFIG_TEGRA20 */
 };
 

-extern const struct tegra_pingroup_desc *tegra_soc_pingroups;
+extern const struct pmux_pingrp_desc *tegra_soc_pingroups;

 
 #endif /* _TEGRA_PINMUX_H_ */
 
 #endif /* _TEGRA_PINMUX_H_ */

diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h
index 00ef5423547dffffa153fc9d8964e06073f3ffee..070745933503950622c9c78b797701f09c7f2be4 100644 (file)
--- a/arch/arm/include/asm/arch-tegra114/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra114/pinmux.h
@@ -202,10 +202,10 @@ enum pmux_pingrp {
        PINGRP_SDMMC3_CLK_LB_IN,
        PINGRP_SDMMC3_CLK_LB_OUT,
        PINGRP_RESET_OUT_N = PINGRP_SDMMC3_CLK_LB_OUT + 2,
        PINGRP_SDMMC3_CLK_LB_IN,
        PINGRP_SDMMC3_CLK_LB_OUT,
        PINGRP_RESET_OUT_N = PINGRP_SDMMC3_CLK_LB_OUT + 2,

-       PINGRP_COUNT,
+       PMUX_PINGRP_COUNT,

 };
 
 };
 

-enum pdrive_pingrp {
+enum pmux_drvgrp {

        PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
        PDRIVE_PINGROUP_AO2,
        PDRIVE_PINGROUP_AT1,
        PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
        PDRIVE_PINGROUP_AO2,
        PDRIVE_PINGROUP_AT1,


@@ -244,7 +244,7 @@ enum pdrive_pingrp {
        PDRIVE_PINGROUP_HVC,
        PDRIVE_PINGROUP_SDIO4,
        PDRIVE_PINGROUP_AO0,
        PDRIVE_PINGROUP_HVC,
        PDRIVE_PINGROUP_SDIO4,
        PDRIVE_PINGROUP_AO0,

-       PDRIVE_PINGROUP_COUNT,
+       PMUX_DRVGRP_COUNT,

 };
 
 /*
 };
 
 /*


@@ -378,7 +378,7 @@ enum pmux_func {
 
 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC
 #define TEGRA_PMX_HAS_RCV_SEL
 
 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC
 #define TEGRA_PMX_HAS_RCV_SEL

-#define TEGRA_PMX_HAS_PADGRPS
+#define TEGRA_PMX_HAS_DRVGRPS

 #include <asm/arch-tegra/pinmux.h>
 
 #endif /* _TEGRA114_PINMUX_H_ */
 #include <asm/arch-tegra/pinmux.h>
 
 #endif /* _TEGRA114_PINMUX_H_ */

diff --git a/arch/arm/include/asm/arch-tegra124/pinmux.h b/arch/arm/include/asm/arch-tegra124/pinmux.h
index 2c6f0d8e60fc498628f5debb5f3d37d60ca18881..b3759067120290c912162daace8a0fd4d64c93d4 100644 (file)
--- a/arch/arm/include/asm/arch-tegra124/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra124/pinmux.h
@@ -209,10 +209,10 @@ enum pmux_pingrp {
        PINGRP_USB_VBUS_EN2,
        PINGRP_GPIO_PFF2,
        PINGRP_DP_HPD,                          /* last reg offset = 0x3430 */
        PINGRP_USB_VBUS_EN2,
        PINGRP_GPIO_PFF2,
        PINGRP_DP_HPD,                          /* last reg offset = 0x3430 */

-       PINGRP_COUNT,
+       PMUX_PINGRP_COUNT,

 };
 
 };
 

-enum pdrive_pingrp {
+enum pmux_drvgrp {

        PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
        PDRIVE_PINGROUP_AO2,
        PDRIVE_PINGROUP_AT1,
        PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
        PDRIVE_PINGROUP_AO2,
        PDRIVE_PINGROUP_AT1,


@@ -251,7 +251,7 @@ enum pdrive_pingrp {
        PDRIVE_PINGROUP_HVC,
        PDRIVE_PINGROUP_SDIO4,
        PDRIVE_PINGROUP_AO0,
        PDRIVE_PINGROUP_HVC,
        PDRIVE_PINGROUP_SDIO4,
        PDRIVE_PINGROUP_AO0,

-       PDRIVE_PINGROUP_COUNT,
+       PMUX_DRVGRP_COUNT,

 };
 
 /*
 };
 
 /*


@@ -385,7 +385,7 @@ enum pmux_func {
 
 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC
 #define TEGRA_PMX_HAS_RCV_SEL
 
 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC
 #define TEGRA_PMX_HAS_RCV_SEL

-#define TEGRA_PMX_HAS_PADGRPS
+#define TEGRA_PMX_HAS_DRVGRPS

 #include <asm/arch-tegra/pinmux.h>
 
 #endif /* _TEGRA124_PINMUX_H_ */
 #include <asm/arch-tegra/pinmux.h>
 
 #endif /* _TEGRA124_PINMUX_H_ */

diff --git a/arch/arm/include/asm/arch-tegra20/pinmux.h b/arch/arm/include/asm/arch-tegra20/pinmux.h
index 5517c0783da25e21e7b0ec2aa08faaf3f8ea07d6..328a3e3224d544e8289941ff7574313a87c65fcc 100644 (file)
--- a/arch/arm/include/asm/arch-tegra20/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra20/pinmux.h
@@ -159,7 +159,7 @@ enum pmux_pingrp {
        PINGRP_XM2C,
        PINGRP_XM2D,
 
        PINGRP_XM2C,
        PINGRP_XM2D,
 

-       PINGRP_COUNT,
+       PMUX_PINGRP_COUNT,

 };
 
 /*
 };
 
 /*

diff --git a/arch/arm/include/asm/arch-tegra30/pinmux.h b/arch/arm/include/asm/arch-tegra30/pinmux.h
index e10df76342bb9923cd0db8b8412c9c29a813d7be..0112e3574736ea323836a916495314706652fb59 100644 (file)
--- a/arch/arm/include/asm/arch-tegra30/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra30/pinmux.h
@@ -275,10 +275,10 @@ enum pmux_pingrp {
        PINGRP_PEX_L2_RST_N,
        PINGRP_PEX_L2_CLKREQ_N,
        PINGRP_HDMI_CEC,        /* offset 0x33e0 */
        PINGRP_PEX_L2_RST_N,
        PINGRP_PEX_L2_CLKREQ_N,
        PINGRP_HDMI_CEC,        /* offset 0x33e0 */

-       PINGRP_COUNT,
+       PMUX_PINGRP_COUNT,

 };
 
 };
 

-enum pdrive_pingrp {
+enum pmux_drvgrp {

        PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
        PDRIVE_PINGROUP_AO2,
        PDRIVE_PINGROUP_AT1,
        PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
        PDRIVE_PINGROUP_AO2,
        PDRIVE_PINGROUP_AT1,


@@ -320,7 +320,7 @@ enum pdrive_pingrp {
        PDRIVE_PINGROUP_GPV,
        PDRIVE_PINGROUP_DEV3 = 49,      /* offset 0x92c */
        PDRIVE_PINGROUP_CEC = 52,       /* offset 0x938 */
        PDRIVE_PINGROUP_GPV,
        PDRIVE_PINGROUP_DEV3 = 49,      /* offset 0x92c */
        PDRIVE_PINGROUP_CEC = 52,       /* offset 0x938 */

-       PDRIVE_PINGROUP_COUNT,
+       PMUX_DRVGRP_COUNT,

 };
 
 /*
 };
 
 /*


@@ -448,7 +448,7 @@ enum pmux_func {
 };
 
 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC
 };
 
 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC

-#define TEGRA_PMX_HAS_PADGRPS
+#define TEGRA_PMX_HAS_DRVGRPS

 #include <asm/arch-tegra/pinmux.h>
 
 #endif /* _TEGRA30_PINMUX_H_ */
 #include <asm/arch-tegra/pinmux.h>
 
 #endif /* _TEGRA30_PINMUX_H_ */

diff --git a/board/avionic-design/common/pinmux-config-tamonten-ng.h b/board/avionic-design/common/pinmux-config-tamonten-ng.h
index 39df73138a41b5794723904ab8a426d3f162f5bc..69515d2106129f4d44078ff3fc08cfdbcea13fa1 100644 (file)
--- a/board/avionic-design/common/pinmux-config-tamonten-ng.h
+++ b/board/avionic-design/common/pinmux-config-tamonten-ng.h
@@ -8,9 +8,9 @@
 #ifndef _PINMUX_CONFIG_TAMONTEN_NG_H_
 #define _PINMUX_CONFIG_TAMONTEN_NG_H_
 
 #ifndef _PINMUX_CONFIG_TAMONTEN_NG_H_
 #define _PINMUX_CONFIG_TAMONTEN_NG_H_
 

-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)      \
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)                \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -20,9 +20,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)        \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -32,9 +32,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define LV_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -44,19 +44,19 @@
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 

-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \

        {                                                       \
        {                                                       \

-               .padgrp         = PDRIVE_PINGROUP_##_padgrp,    \
+               .drvgrp         = PDRIVE_PINGROUP_##_drvgrp,    \

                .slwf           = _slwf,                        \
                .slwr           = _slwr,                        \
                .drvup          = _drvup,                       \
                .drvdn          = _drvdn,                       \
                .slwf           = _slwf,                        \
                .slwr           = _slwr,                        \
                .drvup          = _drvup,                       \
                .drvdn          = _drvdn,                       \

-               .lpmd           = PGRP_LPMD_##_lpmd,            \
-               .schmt          = PGRP_SCHMT_##_schmt,          \
-               .hsm            = PGRP_HSM_##_hsm,              \
+               .lpmd           = PMUX_LPMD_##_lpmd,            \
+               .schmt          = PMUX_SCHMT_##_schmt,          \
+               .hsm            = PMUX_HSM_##_hsm,              \

        }
 
        }
 

-static struct pingroup_config tamonten_ng_pinmux_common[] = {
+static struct pmux_pingrp_config tamonten_ng_pinmux_common[] = {

        /* SDMMC1 pinmux */
        DEFAULT_PINMUX(SDMMC1_CLK,  SDMMC1, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC1_CMD,  SDMMC1, UP,     NORMAL, INPUT),
        /* SDMMC1 pinmux */
        DEFAULT_PINMUX(SDMMC1_CLK,  SDMMC1, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC1_CMD,  SDMMC1, UP,     NORMAL, INPUT),


@@ -277,7 +277,7 @@ static struct pingroup_config tamonten_ng_pinmux_common[] = {
        DEFAULT_PINMUX(HDMI_INT, RSVD1, NORMAL, TRISTATE, INPUT),
 };
 
        DEFAULT_PINMUX(HDMI_INT, RSVD1, NORMAL, TRISTATE, INPUT),
 };
 

-static struct pingroup_config unused_pins_lowpower[] = {
+static struct pmux_pingrp_config unused_pins_lowpower[] = {

        /* UART1 - NC */
        DEFAULT_PINMUX(ULPI_DATA2, UARTA, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(ULPI_DATA3, UARTA, NORMAL, NORMAL, INPUT),
        /* UART1 - NC */
        DEFAULT_PINMUX(ULPI_DATA2, UARTA, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(ULPI_DATA3, UARTA, NORMAL, NORMAL, INPUT),


@@ -377,8 +377,8 @@ static struct pingroup_config unused_pins_lowpower[] = {
        DEFAULT_PINMUX(GMI_DQS,    NAND, NORMAL, TRISTATE, OUTPUT),
 };
 
        DEFAULT_PINMUX(GMI_DQS,    NAND, NORMAL, TRISTATE, OUTPUT),
 };
 

-static struct padctrl_config tamonten_ng_padctrl[] = {
-       /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config tamonten_ng_padctrl[] = {
+       /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */

        DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
                SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
 };
        DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
                SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
 };

diff --git a/board/avionic-design/common/tamonten-ng.c b/board/avionic-design/common/tamonten-ng.c
index 9d395c676e070146b84fde7f16b6a6e90cbb29be..5870b95afbf861c07475afc5faae6f73faac7589 100644 (file)
--- a/board/avionic-design/common/tamonten-ng.c
+++ b/board/avionic-design/common/tamonten-ng.c
@@ -28,14 +28,14 @@
 
 void pinmux_init(void)
 {
 
 void pinmux_init(void)
 {

-       pinmux_config_table(tamonten_ng_pinmux_common,
-                           ARRAY_SIZE(tamonten_ng_pinmux_common));
-       pinmux_config_table(unused_pins_lowpower,
-                           ARRAY_SIZE(unused_pins_lowpower));
+       pinmux_config_pingrp_table(tamonten_ng_pinmux_common,
+               ARRAY_SIZE(tamonten_ng_pinmux_common));
+       pinmux_config_pingrp_table(unused_pins_lowpower,
+               ARRAY_SIZE(unused_pins_lowpower));

 
        /* Initialize any non-default pad configs (APB_MISC_GP regs) */
 
        /* Initialize any non-default pad configs (APB_MISC_GP regs) */

-       padgrp_config_table(tamonten_ng_padctrl,
-                           ARRAY_SIZE(tamonten_ng_padctrl));
+       pinmux_config_drvgrp_table(tamonten_ng_padctrl,
+               ARRAY_SIZE(tamonten_ng_padctrl));

 }
 
 void gpio_early_init(void)
 }
 
 void gpio_early_init(void)

diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
index 47e7abedf1145cbc694aad90e49bebeb38c0f5ad..cc0e5e130fda30209db2f8341a1fbcf461f2f39b 100644 (file)
--- a/board/nvidia/cardhu/cardhu.c
+++ b/board/nvidia/cardhu/cardhu.c
@@ -20,14 +20,14 @@
  */
 void pinmux_init(void)
 {
  */
 void pinmux_init(void)
 {

-       pinmux_config_table(tegra3_pinmux_common,
+       pinmux_config_pingrp_table(tegra3_pinmux_common,

                ARRAY_SIZE(tegra3_pinmux_common));
 
                ARRAY_SIZE(tegra3_pinmux_common));
 

-       pinmux_config_table(unused_pins_lowpower,
+       pinmux_config_pingrp_table(unused_pins_lowpower,

                ARRAY_SIZE(unused_pins_lowpower));
 
        /* Initialize any non-default pad configs (APB_MISC_GP regs) */
                ARRAY_SIZE(unused_pins_lowpower));
 
        /* Initialize any non-default pad configs (APB_MISC_GP regs) */

-       padgrp_config_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
+       pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));

 }
 
 #if defined(CONFIG_TEGRA_MMC)
 }
 
 #if defined(CONFIG_TEGRA_MMC)

diff --git a/board/nvidia/cardhu/pinmux-config-cardhu.h b/board/nvidia/cardhu/pinmux-config-cardhu.h
index 51d2b9425c900e097f2ea0e27b64b2de76ca5b94..c230dac1361eac17c88eaae6e64415f3942a5b95 100644 (file)
--- a/board/nvidia/cardhu/pinmux-config-cardhu.h
+++ b/board/nvidia/cardhu/pinmux-config-cardhu.h
@@ -17,9 +17,9 @@
 #ifndef _PINMUX_CONFIG_CARDHU_H_
 #define _PINMUX_CONFIG_CARDHU_H_
 
 #ifndef _PINMUX_CONFIG_CARDHU_H_
 #define _PINMUX_CONFIG_CARDHU_H_
 

-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)      \
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)                \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -29,9 +29,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)        \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -41,9 +41,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define LV_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -53,19 +53,19 @@
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 

-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \

        {                                                       \
        {                                                       \

-               .padgrp         = PDRIVE_PINGROUP_##_padgrp,    \
+               .drvgrp         = PDRIVE_PINGROUP_##_drvgrp,    \

                .slwf           = _slwf,                        \
                .slwr           = _slwr,                        \
                .drvup          = _drvup,                       \
                .drvdn          = _drvdn,                       \
                .slwf           = _slwf,                        \
                .slwr           = _slwr,                        \
                .drvup          = _drvup,                       \
                .drvdn          = _drvdn,                       \

-               .lpmd           = PGRP_LPMD_##_lpmd,            \
-               .schmt          = PGRP_SCHMT_##_schmt,          \
-               .hsm            = PGRP_HSM_##_hsm,              \
+               .lpmd           = PMUX_LPMD_##_lpmd,            \
+               .schmt          = PMUX_SCHMT_##_schmt,          \
+               .hsm            = PMUX_HSM_##_hsm,              \

        }
 
        }
 

-static struct pingroup_config tegra3_pinmux_common[] = {
+static struct pmux_pingrp_config tegra3_pinmux_common[] = {

        /* SDMMC1 pinmux */
        DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, UP, NORMAL, INPUT),
        /* SDMMC1 pinmux */
        DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, UP, NORMAL, INPUT),


@@ -316,7 +316,7 @@ static struct pingroup_config tegra3_pinmux_common[] = {
        LV_PINMUX(VI_VSYNC, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
 };
 
        LV_PINMUX(VI_VSYNC, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
 };
 

-static struct pingroup_config unused_pins_lowpower[] = {
+static struct pmux_pingrp_config unused_pins_lowpower[] = {

        DEFAULT_PINMUX(GMI_WAIT, NAND, UP, TRISTATE, OUTPUT),
        DEFAULT_PINMUX(GMI_ADV_N, NAND, NORMAL, TRISTATE, OUTPUT),
        DEFAULT_PINMUX(GMI_CLK, NAND, NORMAL, TRISTATE, OUTPUT),
        DEFAULT_PINMUX(GMI_WAIT, NAND, UP, TRISTATE, OUTPUT),
        DEFAULT_PINMUX(GMI_ADV_N, NAND, NORMAL, TRISTATE, OUTPUT),
        DEFAULT_PINMUX(GMI_CLK, NAND, NORMAL, TRISTATE, OUTPUT),


@@ -338,8 +338,8 @@ static struct pingroup_config unused_pins_lowpower[] = {
        DEFAULT_PINMUX(GMI_DQS, NAND, NORMAL, TRISTATE, OUTPUT),
 };
 
        DEFAULT_PINMUX(GMI_DQS, NAND, NORMAL, TRISTATE, OUTPUT),
 };
 

-static struct padctrl_config cardhu_padctrl[] = {
-       /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config cardhu_padctrl[] = {
+       /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */

        DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
                SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
 };
        DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
                SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
 };

diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index 2c23a29db78a079f2faba21785f0188654d00dbd..f2d05afac791662932a54b82ee9359d3ff279f75 100644 (file)
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -29,17 +29,18 @@
  */
 void pinmux_init(void)
 {
  */
 void pinmux_init(void)
 {

-       pinmux_config_table(tegra114_pinmux_set_nontristate,
+       pinmux_config_pingrp_table(tegra114_pinmux_set_nontristate,

                ARRAY_SIZE(tegra114_pinmux_set_nontristate));
 
                ARRAY_SIZE(tegra114_pinmux_set_nontristate));
 

-       pinmux_config_table(tegra114_pinmux_common,
+       pinmux_config_pingrp_table(tegra114_pinmux_common,

                ARRAY_SIZE(tegra114_pinmux_common));
 
                ARRAY_SIZE(tegra114_pinmux_common));
 

-       pinmux_config_table(unused_pins_lowpower,
+       pinmux_config_pingrp_table(unused_pins_lowpower,

                ARRAY_SIZE(unused_pins_lowpower));
 
        /* Initialize any non-default pad configs (APB_MISC_GP regs) */
                ARRAY_SIZE(unused_pins_lowpower));
 
        /* Initialize any non-default pad configs (APB_MISC_GP regs) */

-       padgrp_config_table(dalmore_padctrl, ARRAY_SIZE(dalmore_padctrl));
+       pinmux_config_drvgrp_table(dalmore_padctrl,
+               ARRAY_SIZE(dalmore_padctrl));

 }
 
 #if defined(CONFIG_TEGRA_MMC)
 }
 
 #if defined(CONFIG_TEGRA_MMC)

diff --git a/board/nvidia/dalmore/pinmux-config-dalmore.h b/board/nvidia/dalmore/pinmux-config-dalmore.h
index 9dcd5e42af105c44bf87a545c1550492ea000a91..6069fb6c02c81aebc81e3ad55d771c0aad3bd9b6 100644 (file)
--- a/board/nvidia/dalmore/pinmux-config-dalmore.h
+++ b/board/nvidia/dalmore/pinmux-config-dalmore.h
@@ -17,9 +17,9 @@
 #ifndef _PINMUX_CONFIG_DALMORE_H_
 #define _PINMUX_CONFIG_DALMORE_H_
 
 #ifndef _PINMUX_CONFIG_DALMORE_H_
 #define _PINMUX_CONFIG_DALMORE_H_
 

-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)      \
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)                \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -29,9 +29,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)        \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -41,9 +41,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
+#define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -53,9 +53,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -65,9 +65,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 

-#define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od)      \
+#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)                \

        {                                                               \
        {                                                               \

-               .pingroup   = PINGRP_##_pingroup,                       \
+               .pingrp     = PINGRP_##_pingrp,                         \

                .func       = PMUX_FUNC_##_mux,                         \
                .pull       = PMUX_PULL_##_pull,                        \
                .tristate   = PMUX_TRI_##_tri,                          \
                .func       = PMUX_FUNC_##_mux,                         \
                .pull       = PMUX_PULL_##_pull,                        \
                .tristate   = PMUX_TRI_##_tri,                          \


@@ -79,19 +79,19 @@
 
 #define USB_PINMUX CEC_PINMUX
 
 
 #define USB_PINMUX CEC_PINMUX
 

-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \

        {                                               \
        {                                               \

-               .padgrp = PDRIVE_PINGROUP_##_padgrp,    \
+               .drvgrp = PDRIVE_PINGROUP_##_drvgrp,    \

                .slwf   = _slwf,                        \
                .slwr   = _slwr,                        \
                .drvup  = _drvup,                       \
                .drvdn  = _drvdn,                       \
                .slwf   = _slwf,                        \
                .slwr   = _slwr,                        \
                .drvup  = _drvup,                       \
                .drvdn  = _drvdn,                       \

-               .lpmd   = PGRP_LPMD_##_lpmd,            \
-               .schmt  = PGRP_SCHMT_##_schmt,          \
-               .hsm    = PGRP_HSM_##_hsm,              \
+               .lpmd   = PMUX_LPMD_##_lpmd,            \
+               .schmt  = PMUX_SCHMT_##_schmt,          \
+               .hsm    = PMUX_HSM_##_hsm,              \

        }
 
        }
 

-static struct pingroup_config tegra114_pinmux_common[] = {
+static struct pmux_pingrp_config tegra114_pinmux_common[] = {

        /* EXTPERIPH1 pinmux */
        DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
 
        /* EXTPERIPH1 pinmux */
        DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
 


@@ -286,13 +286,13 @@ static struct pingroup_config tegra114_pinmux_common[] = {
        DEFAULT_PINMUX(GPIO_X6_AUD,   SPI6,        UP,        TRISTATE, INPUT),
 };
 
        DEFAULT_PINMUX(GPIO_X6_AUD,   SPI6,        UP,        TRISTATE, INPUT),
 };
 

-static struct pingroup_config unused_pins_lowpower[] = {
+static struct pmux_pingrp_config unused_pins_lowpower[] = {

        DEFAULT_PINMUX(CLK1_REQ,      RSVD3,       DOWN, TRISTATE, OUTPUT),
        DEFAULT_PINMUX(USB_VBUS_EN1,  RSVD3,       DOWN, TRISTATE, OUTPUT),
 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */
        DEFAULT_PINMUX(CLK1_REQ,      RSVD3,       DOWN, TRISTATE, OUTPUT),
        DEFAULT_PINMUX(USB_VBUS_EN1,  RSVD3,       DOWN, TRISTATE, OUTPUT),
 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */

-static struct pingroup_config tegra114_pinmux_set_nontristate[] = {
+static struct pmux_pingrp_config tegra114_pinmux_set_nontristate[] = {

        DEFAULT_PINMUX(GPIO_X4_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
        DEFAULT_PINMUX(GPIO_X5_AUD,     RSVD1,  UP,      NORMAL,    INPUT),
        DEFAULT_PINMUX(GPIO_X6_AUD,     RSVD3,  UP,      NORMAL,    INPUT),
        DEFAULT_PINMUX(GPIO_X4_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
        DEFAULT_PINMUX(GPIO_X5_AUD,     RSVD1,  UP,      NORMAL,    INPUT),
        DEFAULT_PINMUX(GPIO_X6_AUD,     RSVD3,  UP,      NORMAL,    INPUT),


@@ -362,8 +362,8 @@ static struct pingroup_config tegra114_pinmux_set_nontristate[] = {
        DEFAULT_PINMUX(SDMMC3_CD_N,     SDMMC3, UP,       NORMAL,   INPUT),
 };
 
        DEFAULT_PINMUX(SDMMC3_CD_N,     SDMMC3, UP,       NORMAL,   INPUT),
 };
 

-static struct padctrl_config dalmore_padctrl[] = {
-       /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config dalmore_padctrl[] = {
+       /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */

        DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
                SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
 };
        DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
                SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
 };

diff --git a/board/nvidia/venice2/pinmux-config-venice2.h b/board/nvidia/venice2/pinmux-config-venice2.h
index b3d68d589a95924f09ae0b47822659fce1b1b5b0..51cd4bfcb6cc9b12382c1c65ff5467464c20c5d0 100644 (file)
--- a/board/nvidia/venice2/pinmux-config-venice2.h
+++ b/board/nvidia/venice2/pinmux-config-venice2.h
@@ -8,9 +8,9 @@
 #ifndef _PINMUX_CONFIG_VENICE2_H_
 #define _PINMUX_CONFIG_VENICE2_H_
 
 #ifndef _PINMUX_CONFIG_VENICE2_H_
 #define _PINMUX_CONFIG_VENICE2_H_
 

-#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io)      \
+#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)                \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -20,9 +20,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
+#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)        \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -32,9 +32,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
+#define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -44,9 +44,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_DEFAULT,    \
        }
 

-#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
+#define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \

        {                                                       \
        {                                                       \

-               .pingroup       = PINGRP_##_pingroup,           \
+               .pingrp         = PINGRP_##_pingrp,             \

                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \
                .func           = PMUX_FUNC_##_mux,             \
                .pull           = PMUX_PULL_##_pull,            \
                .tristate       = PMUX_TRI_##_tri,              \


@@ -56,9 +56,9 @@
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 
                .ioreset        = PMUX_PIN_IO_RESET_##_ioreset  \
        }
 

-#define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od)      \
+#define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)                \

        {                                                               \
        {                                                               \

-               .pingroup   = PINGRP_##_pingroup,                       \
+               .pingrp     = PINGRP_##_pingrp,                         \

                .func       = PMUX_FUNC_##_mux,                         \
                .pull       = PMUX_PULL_##_pull,                        \
                .tristate   = PMUX_TRI_##_tri,                          \
                .func       = PMUX_FUNC_##_mux,                         \
                .pull       = PMUX_PULL_##_pull,                        \
                .tristate   = PMUX_TRI_##_tri,                          \


@@ -70,19 +70,19 @@
 
 #define USB_PINMUX CEC_PINMUX
 
 
 #define USB_PINMUX CEC_PINMUX
 

-#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \

        {                                               \
        {                                               \

-               .padgrp = PDRIVE_PINGROUP_##_padgrp,    \
+               .drvgrp = PDRIVE_PINGROUP_##_drvgrp,    \

                .slwf   = _slwf,                        \
                .slwr   = _slwr,                        \
                .drvup  = _drvup,                       \
                .drvdn  = _drvdn,                       \
                .slwf   = _slwf,                        \
                .slwr   = _slwr,                        \
                .drvup  = _drvup,                       \
                .drvdn  = _drvdn,                       \

-               .lpmd   = PGRP_LPMD_##_lpmd,            \
-               .schmt  = PGRP_SCHMT_##_schmt,          \
-               .hsm    = PGRP_HSM_##_hsm,              \
+               .lpmd   = PMUX_LPMD_##_lpmd,            \
+               .schmt  = PMUX_SCHMT_##_schmt,          \
+               .hsm    = PMUX_HSM_##_hsm,              \

        }
 
        }
 

-static struct pingroup_config tegra124_pinmux_common[] = {
+static struct pmux_pingrp_config tegra124_pinmux_common[] = {

        /* EXTPERIPH1 pinmux */
        DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
 
        /* EXTPERIPH1 pinmux */
        DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
 


@@ -286,12 +286,12 @@ static struct pingroup_config tegra124_pinmux_common[] = {
        DEFAULT_PINMUX(SPDIF_OUT,     RSVD1,       NORMAL,    TRISTATE, INPUT),
 };
 
        DEFAULT_PINMUX(SPDIF_OUT,     RSVD1,       NORMAL,    TRISTATE, INPUT),
 };
 

-static struct pingroup_config unused_pins_lowpower[] = {
+static struct pmux_pingrp_config unused_pins_lowpower[] = {

        DEFAULT_PINMUX(CLK1_REQ,      RSVD3,    DOWN, TRISTATE, OUTPUT),
 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */
        DEFAULT_PINMUX(CLK1_REQ,      RSVD3,    DOWN, TRISTATE, OUTPUT),
 };
 
 /* Initially setting all used GPIO's to non-TRISTATE */

-static struct pingroup_config tegra124_pinmux_set_nontristate[] = {
+static struct pmux_pingrp_config tegra124_pinmux_set_nontristate[] = {

        DEFAULT_PINMUX(GPIO_X4_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
        DEFAULT_PINMUX(GPIO_X7_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
        DEFAULT_PINMUX(GPIO_W2_AUD,     RSVD1,  UP,      NORMAL,    INPUT),
        DEFAULT_PINMUX(GPIO_X4_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
        DEFAULT_PINMUX(GPIO_X7_AUD,     RSVD1,  DOWN,    NORMAL,    OUTPUT),
        DEFAULT_PINMUX(GPIO_W2_AUD,     RSVD1,  UP,      NORMAL,    INPUT),


@@ -331,8 +331,8 @@ static struct pingroup_config tegra124_pinmux_set_nontristate[] = {
        DEFAULT_PINMUX(GPIO_PK1,        GMI,    NORMAL,   NORMAL,   OUTPUT),
 };
 
        DEFAULT_PINMUX(GPIO_PK1,        GMI,    NORMAL,   NORMAL,   OUTPUT),
 };
 

-static struct padctrl_config venice2_padctrl[] = {
-       /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+static struct pmux_drvgrp_config venice2_padctrl[] = {
+       /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */

        DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
                       SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
 };
        DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
                       SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
 };

diff --git a/board/nvidia/venice2/venice2.c b/board/nvidia/venice2/venice2.c
index 1ed2fd788ec17042cc5528ec2aee0d8960364104..15082c4195078db3b8d6265571b809c5cc3131a2 100644 (file)
--- a/board/nvidia/venice2/venice2.c
+++ b/board/nvidia/venice2/venice2.c
@@ -19,15 +19,16 @@
  */
 void pinmux_init(void)
 {
  */
 void pinmux_init(void)
 {

-       pinmux_config_table(tegra124_pinmux_set_nontristate,
-                           ARRAY_SIZE(tegra124_pinmux_set_nontristate));
+       pinmux_config_pingrp_table(tegra124_pinmux_set_nontristate,
+               ARRAY_SIZE(tegra124_pinmux_set_nontristate));

 
 

-       pinmux_config_table(tegra124_pinmux_common,
-                           ARRAY_SIZE(tegra124_pinmux_common));
+       pinmux_config_pingrp_table(tegra124_pinmux_common,
+               ARRAY_SIZE(tegra124_pinmux_common));

 
 

-       pinmux_config_table(unused_pins_lowpower,
-                           ARRAY_SIZE(unused_pins_lowpower));
+       pinmux_config_pingrp_table(unused_pins_lowpower,
+               ARRAY_SIZE(unused_pins_lowpower));

 
        /* Initialize any non-default pad configs (APB_MISC_GP regs) */
 
        /* Initialize any non-default pad configs (APB_MISC_GP regs) */

-       padgrp_config_table(venice2_padctrl, ARRAY_SIZE(venice2_padctrl));
+       pinmux_config_drvgrp_table(venice2_padctrl,
+               ARRAY_SIZE(venice2_padctrl));

 }
 }