u-boot-signed.sb: u-boot.bin spl/u-boot-spl.bin
$(Q)$(MAKE) $(build)=arch/arm/cpu/arm926ejs/mxs u-boot-signed.sb
-u-boot.sb: u-boot.bin spl/u-boot-spl.bin
+u-boot.sb: u-boot.bin spl/u-boot-spl.bin elftosb
$(Q)$(MAKE) $(build)=arch/arm/cpu/arm926ejs/mxs u-boot.sb
+elftosb:
+ $(MAKE) -C $(KBUILD_SRC)/tools/elftosb all
+
# On x600 (SPEAr600) U-Boot is appended to U-Boot SPL.
# Both images are created using mkimage (crc etc), so that the ROM
# bootloader can check its integrity. Padding needs to be done to the
cmd_mkimage_mxs = $(objtree)/tools/mkimage -n $< -T mxsimage $@ \
$(if $(KBUILD_VERBOSE:1=), >/dev/null)
-u-boot.sb: $(src)/$(MKIMAGE_TARGET-y) u-boot.bin spl/u-boot-spl.bin FORCE
- $(call if_changed,mkimage_mxs)
+#u-boot.sb: $(src)/$(MKIMAGE_TARGET-y) u-boot.bin spl/u-boot-spl.bin FORCE
+# $(call if_changed,mkimage_mxs)
+ELFTOSB_TARGET-$(CONFIG_SOC_MX23) = imx23
+ELFTOSB_TARGET-$(CONFIG_SOC_MX28) = imx28
+
+u-boot.bd: $(KBUILD_SRC)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd
+ sed "s@OBJTREE@$(objtree)@g" $^ > $@
+
+u-boot.sb: u-boot spl/u-boot-spl $(objtree)/u-boot.bd $(KBUILD_SRC)/tools/elftosb/bld/linux/elftosb
+ $(KBUILD_SRC)/tools/elftosb/bld/linux/elftosb -V -zf $(ELFTOSB_TARGET-y) -c u-boot.bd -o u-boot.sb
u-boot-signed.sb: $(src)/mxsimage-signed.cfg u-boot.ivt u-boot.sig spl/u-boot-spl.ivt spl/u-boot-spl.sig FORCE
$(call if_changed,mkimage_mxs)
*/
void mx28_fixup_vt(uint32_t start_addr)
{
- /* ldr pc, [pc, #0x18] */
/* Jumptable location is 0x0 */
uint32_t *vt = (uint32_t *)0x20;
uint32_t cr = get_cr();
-<<<<<<< HEAD
- for (i = 0; i < 8; i++) {
- /* cppcheck-suppress nullPointer */
- vt[i] = ldr_pc;
- /* cppcheck-suppress nullPointer */
- vt[i + 8] = start_addr + (4 * i);
- }
-=======
+ /* cppcheck-suppress nullPointer */
memcpy(vt, (void *)start_addr + 0x20, 32);
set_cr(cr & ~CR_V);
->>>>>>> karo-tx-uboot
}
#ifdef CONFIG_ARCH_MISC_INIT
&clkctrl_regs->hw_clkctrl_clkseq_clr);
}
-void data_abort_memdetect_handler(void)
+static void data_abort_memdetect_handler(void)
{
asm volatile("subs pc, lr, #4");
}
volt = mxs_get_batt_volt();
- if (volt >= 3500)
- return 0;
-
- if (volt >= 2400)
- return 1;
-
writel(POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK,
&power_regs->hw_power_charge_clr);
writel(POWER_CHARGE_PWD_BATTCHRG, &power_regs->hw_power_charge_set);
+ if (volt >= 3500) {
+ return 0;
+ }
+ if (volt >= 2400) {
+ return 1;
+ }
return 0;
}
* We then check the brownout status. If the brownout status is false,
* the voltage is already close to the target voltage of 4.2V so we
* can go ahead and set the 4P2 current limit to our max target limit.
- * If the brownout status is true, we need to ramp us the current limit
+ * If the brownout status is true, we need to ramp up the current limit
* so that we don't cause large inrush current issues. We step up the
* current limit until the brownout status is false or until we've
* reached our maximum defined 4p2 current limit.
if (tmp & POWER_STS_VDDIO_BO) {
/*
- * VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes
- * unreliable
+ * If VDDIO has a brownout, then the VDD5V_GT_VDDIO
+ * becomes unreliable
*/
mxs_powerdown();
break;
* This function configures the battery input brownout threshold. The value
* at which the battery brownout happens is configured to 3.0V in the code.
*/
-static void mxs_init_batt_bo(void)
+static void mxs_fixed_batt_boot(void)
{
writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr);
setbits_le32(&power_regs->hw_power_5vctrl,
- POWER_5VCTRL_PWDN_5VBRNOUT |
POWER_5VCTRL_ENABLE_DCDC |
POWER_5VCTRL_ILIMIT_EQ_ZERO |
POWER_5VCTRL_PWDN_5VBRNOUT |
uint32_t bo_enirq;
uint32_t bo_offset_mask;
uint32_t bo_offset_offset;
+ uint16_t bo_min_mV;
+ uint16_t bo_max_mV;
};
#define POWER_REG(n) &((struct mxs_power_regs *)MXS_POWER_BASE)->n
.bo_enirq = POWER_CTRL_ENIRQ_VDDIO_BO,
.bo_offset_mask = POWER_VDDIOCTRL_BO_OFFSET_MASK,
.bo_offset_offset = POWER_VDDIOCTRL_BO_OFFSET_OFFSET,
+ .bo_min_mV = 2700,
+ .bo_max_mV = 3475,
};
static const struct mxs_vddx_cfg mxs_vddd_cfg = {
.bo_enirq = POWER_CTRL_ENIRQ_VDDD_BO,
.bo_offset_mask = POWER_VDDDCTRL_BO_OFFSET_MASK,
.bo_offset_offset = POWER_VDDDCTRL_BO_OFFSET_OFFSET,
+ .bo_min_mV = 800,
+ .bo_max_mV = 1475,
};
static const struct mxs_vddx_cfg mxs_vdda_cfg = {
.reg = POWER_REG(hw_power_vddactrl),
- .step_mV = 50,
- .lowest_mV = 2800,
+ .step_mV = 25,
+ .lowest_mV = 1800,
.highest_mV = 3600,
.powered_by_linreg = mxs_get_vdda_power_source_off,
.trg_mask = POWER_VDDACTRL_TRG_MASK,
.bo_enirq = POWER_CTRL_ENIRQ_VDDA_BO,
.bo_offset_mask = POWER_VDDACTRL_BO_OFFSET_MASK,
.bo_offset_offset = POWER_VDDACTRL_BO_OFFSET_OFFSET,
+ .bo_min_mV = 1400,
+ .bo_max_mV = 2175,
};
#ifdef CONFIG_SOC_MX23
* value is also in mV.
*/
static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
- uint32_t new_target, uint32_t new_brownout)
+ uint32_t new_target, uint32_t bo_offset)
{
uint32_t cur_target, diff, bo_int = 0;
int powered_by_linreg = 0;
int adjust_up;
- if (new_target < cfg->lowest_mV)
+ if (new_target < cfg->lowest_mV) {
new_target = cfg->lowest_mV;
- if (new_target > cfg->highest_mV)
+ }
+ if (new_target > cfg->highest_mV) {
new_target = cfg->highest_mV;
+ }
+
+ if (new_target - bo_offset < cfg->bo_min_mV) {
+ bo_offset = new_target - cfg->bo_min_mV;
+ } else if (new_target - bo_offset > cfg->bo_max_mV) {
+ bo_offset = new_target - cfg->bo_max_mV;
+ }
- new_brownout = DIV_ROUND_CLOSEST(new_target - new_brownout,
- cfg->step_mV);
+ bo_offset = DIV_ROUND_CLOSEST(bo_offset, cfg->step_mV);
cur_target = readl(cfg->reg);
cur_target &= cfg->trg_mask;
if (adjust_up && cfg->bo_irq) {
if (powered_by_linreg) {
- bo_int = readl(cfg->reg);
- clrbits_le32(cfg->reg, cfg->bo_enirq);
+ bo_int = readl(&power_regs->hw_power_ctrl);
+ writel(cfg->bo_enirq, &power_regs->hw_power_ctrl_clr);
}
setbits_le32(cfg->reg, cfg->bo_offset_mask);
}
if (adjust_up && powered_by_linreg) {
writel(cfg->bo_irq, &power_regs->hw_power_ctrl_clr);
if (bo_int & cfg->bo_enirq)
- setbits_le32(cfg->reg, cfg->bo_enirq);
+ writel(cfg->bo_enirq,
+ &power_regs->hw_power_ctrl_set);
}
clrsetbits_le32(cfg->reg, cfg->bo_offset_mask,
- new_brownout << cfg->bo_offset_offset);
+ bo_offset << cfg->bo_offset_offset);
}
}
#ifndef __ASSEMBLY__
struct mxs_uartapp_regs {
- mxs_reg_32(hw_uartapp_ctrl0)
- mxs_reg_32(hw_uartapp_ctrl1)
- mxs_reg_32(hw_uartapp_ctrl2)
- mxs_reg_32(hw_uartapp_linectrl)
- mxs_reg_32(hw_uartapp_linectrl2)
- mxs_reg_32(hw_uartapp_intr)
- mxs_reg_32(hw_uartapp_data)
- mxs_reg_32(hw_uartapp_stat)
- mxs_reg_32(hw_uartapp_debug)
- mxs_reg_32(hw_uartapp_version)
- mxs_reg_32(hw_uartapp_autobaud)
+ mxs_reg_32(hw_uartapp_ctrl0);
+ mxs_reg_32(hw_uartapp_ctrl1);
+ mxs_reg_32(hw_uartapp_ctrl2);
+ mxs_reg_32(hw_uartapp_linectrl);
+ mxs_reg_32(hw_uartapp_linectrl2);
+ mxs_reg_32(hw_uartapp_intr);
+ mxs_reg_32(hw_uartapp_data);
+ mxs_reg_32(hw_uartapp_stat);
+ mxs_reg_32(hw_uartapp_debug);
+ mxs_reg_32(hw_uartapp_version);
+ mxs_reg_32(hw_uartapp_autobaud);
};
#endif
mxs_reg_32(hw_bch_flash2layout1);
mxs_reg_32(hw_bch_flash3layout0);
mxs_reg_32(hw_bch_flash3layout1);
+ mxs_reg_32(hw_bch_debug0);
mxs_reg_32(hw_bch_dbgkesread);
mxs_reg_32(hw_bch_dbgcsferead);
mxs_reg_32(hw_bch_dbgsyndegread);
mxs_reg_32(hw_gpmi_stat);
mxs_reg_32(hw_gpmi_debug);
mxs_reg_32(hw_gpmi_version);
+ mxs_reg_32(hw_gpmi_debug2);
+ mxs_reg_32(hw_gpmi_debug3);
};
#endif
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
-#ifndef IRAM_BASE_ADDR
+#ifndef CONFIG_SPL_STACK
.word 0x0badc0de
#else
- .word IRAM_BASE_ADDR + 0x20
+ .word CONFIG_SPL_STACK
#endif
#ifdef CONFIG_USE_IRQ
-if TARGET_TX28_40X1
+if TARGET_TX28
config SYS_BOARD
default "tx28"
default "mxs"
config SYS_CONFIG_NAME
- default "tx28-40x1"
-
-endif
-
-if TARGET_TX28_40X1_NOENV
-
-config SYS_BOARD
- default "tx28"
-
-config SYS_VENDOR
- default "karo"
-
-config SYS_SOC
- default "mxs"
-
-config SYS_CONFIG_NAME
- default "tx28-40x1_noenv"
-
-endif
-
-if TARGET_TX28_40X2
-
-config SYS_BOARD
- default "tx28"
-
-config SYS_VENDOR
- default "karo"
-
-config SYS_SOC
- default "mxs"
-
-config SYS_CONFIG_NAME
- default "tx28-40x2"
-
-endif
-
-if TARGET_TX28_40X2_NOENV
-
-config SYS_BOARD
- default "tx28"
-
-config SYS_VENDOR
- default "karo"
-
-config SYS_SOC
- default "mxs"
-
-config SYS_CONFIG_NAME
- default "tx28-40x2_noenv"
-
-endif
-
-if TARGET_TX28_40X3
-
-config SYS_BOARD
- default "tx28"
-
-config SYS_VENDOR
- default "karo"
-
-config SYS_SOC
- default "mxs"
-
-config SYS_CONFIG_NAME
- default "tx28-40x3"
-
-endif
-
-if TARGET_TX28_40X3_NOENV
-
-config SYS_BOARD
- default "tx28"
-
-config SYS_VENDOR
- default "karo"
-
-config SYS_SOC
- default "mxs"
-
-config SYS_CONFIG_NAME
- default "tx28-40x3_noenv"
-
-endif
-
-if TARGET_TX28_41X0
-
-config SYS_BOARD
- default "tx28"
-
-config SYS_VENDOR
- default "karo"
-
-config SYS_SOC
- default "mxs"
-
-config SYS_CONFIG_NAME
- default "tx28-41x0"
-
-endif
-
-if TARGET_TX28_41X0_NOENV
-
-config SYS_BOARD
default "tx28"
-config SYS_VENDOR
- default "karo"
-
-config SYS_SOC
- default "mxs"
-
-config SYS_CONFIG_NAME
- default "tx28-41x0_noenv"
+config TX28
+ bool
+ default y
+ select SPL
+ select SOC_MX28
+ select APBH_DMA
+ select APBH_DMA_BURST
+ select APBH_DMA_BURST8
+ select CC_OPTIMIZE_LIBS_FOR_SPEED
+ select CMD_BMP if LCD
+ select CMD_NAND_TRIMFFS if CMD_NAND
+ select CMD_ROMUPDATE if !SPL_BUILD
+ select FDT_FIXUP_PARTITIONS if OF_LIBFDT
+ select GET_FEC_MAC_ADDR_FROM_IIM if FEC_MXC
+ select LIB_RAND
+ select MTD_PARTITIONS if CMD_NAND
+ select MTD_DEVICE if CMD_NAND
+ select SYS_NAND_USE_FLASH_BBT if NAND
+
+config TARGET_TX28_40X1_NOENV
+ bool
+ select TX28
+
+config TARGET_TX28_40X2
+ bool
+ select TX28
+
+config TARGET_TX28_40X2_NOENV
+ bool
+ select TX28
+
+config TARGET_TX28_40X3
+ bool
+ select TX28
+
+config TARGET_TX28_40X3_NOENV
+ bool
+ select TX28
+
+config TARGET_TX28_41X0
+ bool
+ select TX28
+
+config TARGET_TX28_41X0_NOENV
+ bool
+ select TX28
+
+choice
+ prompt "U-Boot image variant"
+ default TX28_UBOOT
+
+config TX28_UBOOT
+ bool "Standard U-Boot image"
+
+config TX28_UBOOT_NOENV
+ bool "U-Boot using only built-in environment"
+
+endchoice
endif
obj-y += tx28.o
obj-$(CONFIG_SPL_BUILD) += spl_boot.o
-ifneq ($(CONFIG_SPL_BUILD),y)
- obj-$(CONFIG_CMD_ROMUPDATE) += flash.o
-endif
+obj-$(CONFIG_CMD_ROMUPDATE) += flash.o
LOGO_BMP = logos/karo.bmp
PLATFORM_CPPFLAGS += -Werror
+PLATFORM_CPPFLAGS += -DCONFIG_SPL_TEXT_BASE=$(CONFIG_SPL_TEXT_BASE)
ifneq ($(CONFIG_SPL_BUILD),y)
- ALL-y += $(obj)u-boot.sb
+ ALL-y += $(obj)/u-boot.sb
endif
CONFIG_SYS_NAND_BLOCK_SIZE := 131072
#define BF_VAL(v, bf) (((v) & bf##_MASK) >> bf##_OFFSET)
static nand_info_t *mtd = &nand_info[0];
-
-extern void *_start;
+static bool doit;
#define BIT(v,n) (((v) >> (n)) & 0x1)
return 0;
}
- ret = nand_erase(mtd, block * mtd->erasesize, mtd->erasesize);
- if (ret) {
- printf("Failed to erase FCB block %u\n", block);
- return ret;
+ if (doit) {
+ ret = nand_erase(mtd, block * mtd->erasesize, mtd->erasesize);
+ if (ret) {
+ printf("Failed to erase FCB block %u\n", block);
+ return ret;
+ }
}
printf("Writing FCB to block %d @ %08llx\n", block,
(u64)block * mtd->erasesize);
- chip->select_chip(mtd, 0);
- ret = chip->write_page(mtd, chip, buf, 1, page, 0, 1);
- if (ret) {
- printf("Failed to write FCB to block %u: %d\n", block, ret);
+ if (doit) {
+ chip->select_chip(mtd, 0);
+ ret = chip->write_page(mtd, chip, 0, mtd->writesize,
+ buf, 1, page, 0, 1);
+ if (ret) {
+ printf("Failed to write FCB to block %u: %d\n", block, ret);
+ }
+ chip->select_chip(mtd, -1);
}
- chip->select_chip(mtd, -1);
return ret;
}
(b##_start_block <= a##_end_block && \
b##_end_block >= a##_start_block))
-#define fail_if_overlap(a,b,m1,m2) do { \
- if (chk_overlap(a, b)) { \
+#define fail_if_overlap(a,b,m1,m2) do { \
+ if (!doit) \
+ printf("check: %s[%lu..%lu] <> %s[%lu..%lu]\n", \
+ m1, a##_start_block, a##_end_block, \
+ m2, b##_start_block, b##_end_block); \
+ if (a##_end_block < a##_start_block) \
+ printf("Invalid start/end block # for %s\n", m1); \
+ if (b##_end_block < b##_start_block) \
+ printf("Invalid start/end block # for %s\n", m2); \
+ if (chk_overlap(a, b)) { \
printf("%s blocks %lu..%lu overlap %s in blocks %lu..%lu!\n", \
- m1, a##_start_block, a##_end_block, \
- m2, b##_start_block, b##_end_block); \
- return -EINVAL; \
- } \
+ m1, a##_start_block, a##_end_block, \
+ m2, b##_start_block, b##_end_block); \
+ return -EINVAL; \
+ } \
} while (0)
static int tx28_prog_uboot(void *addr, int start_block, int skip,
printf("Erasing flash @ %08llx..%08llx\n", erase_opts.offset,
erase_opts.offset + erase_opts.length - 1);
- ret = nand_erase_opts(mtd, &erase_opts);
- if (ret) {
- printf("Failed to erase flash: %d\n", ret);
- return ret;
+ if (doit) {
+ ret = nand_erase_opts(mtd, &erase_opts);
+ if (ret) {
+ printf("Failed to erase flash: %d\n", ret);
+ return ret;
+ }
}
- printf("Programming flash @ %08llx..%08llx from %p\n",
- (u64)start_block * mtd->erasesize,
- (u64)start_block * mtd->erasesize + size - 1, addr);
- actual = size;
- ret = nand_write_skip_bad(mtd, prg_start, &actual, NULL,
- prg_length, addr, WITH_DROP_FFS);
- if (ret) {
- printf("Failed to program flash: %d\n", ret);
- return ret;
- }
- if (actual < size) {
- printf("Could only write %u of %u bytes\n", actual, size);
- return -EIO;
+ printf("Programming flash @ %08x..%08x from %p\n",
+ prg_start, prg_start + size - 1, addr);
+ if (doit) {
+ actual = size;
+ ret = nand_write_skip_bad(mtd, prg_start, &actual, NULL,
+ prg_length, addr, WITH_DROP_FFS);
+ if (ret) {
+ printf("Failed to program flash: %d\n", ret);
+ return ret;
+ }
+ if (actual < size) {
+ printf("Could only write %u of %u bytes\n", actual, size);
+ return -EIO;
+ }
}
return 0;
}
int ret;
const unsigned long fcb_start_block = 0, fcb_end_block = 0;
int erase_size = mtd->erasesize;
- int page_size = mtd->writesize;
void *buf;
char *load_addr;
char *file_size;
if (ret)
return ret;
+ doit = true;
for (optind = 1; optind < argc; optind++) {
char *endp;
mtd_num_blocks - 1);
return -EINVAL;
}
+ } else if (strcmp(argv[optind], "-n") == 0) {
+ doit = false;
} else if (argv[optind][0] == '-') {
printf("Unrecognized option %s\n", argv[optind]);
return -EINVAL;
return -EINVAL;
}
if (argc - optind < 2 && file_size == NULL) {
- printf("WARNING: Image size not specified; overwriting whole uboot partition\n");
+ if (uboot_part) {
+ printf("WARNING: Image size not specified; overwriting whole '%s' partition\n",
+ uboot_part);
+ printf("This will only work, if there are no bad blocks inside this partition!\n");
+ } else {
+ printf("ERROR: Image size must be specified\n");
+ return -EINVAL;
+ }
}
if (argc > optind) {
load_addr = NULL;
size = simple_strtoul(file_size, NULL, 16);
printf("Using default file size %08x\n", size);
}
- if (size > 0) {
+ if (size > 0)
fw_num_blocks = DIV_ROUND_UP(size, mtd->erasesize);
- } else {
- fw_num_blocks = part_info->size / mtd->erasesize -
- extra_blocks;
- size = fw_num_blocks * mtd->erasesize;
- }
+ else
+ fw_num_blocks = 0;
if (uboot_part) {
ret = find_dev_and_part(uboot_part, &dev, &part_num,
}
fw1_start_block = part_info->offset / mtd->erasesize;
max_len1 = part_info->size;
+ if (size == 0)
+ fw_num_blocks = max_len1 / mtd->erasesize;
} else {
max_len1 = (fw_num_blocks + extra_blocks) * mtd->erasesize;
}
}
fw2_start_block = redund_part_info->offset / mtd->erasesize;
max_len2 = redund_part_info->size;
+ if (fw2_start_block == fcb_start_block) {
+ fw2_start_block++;
+ max_len2 -= mtd->erasesize;
+ }
+ if (size == 0)
+ fw_num_blocks = max_len2 / mtd->erasesize;
} else if (fw2_set) {
max_len2 = (fw_num_blocks + extra_blocks) * mtd->erasesize;
} else {
fw1_skip = find_contig_space(fw1_start_block, fw_num_blocks,
max_len1 / mtd->erasesize);
if (fw1_skip < 0) {
- printf("Could not find %lu contiguous good blocks for fw image\n",
- fw_num_blocks);
+ printf("Could not find %lu contiguous good blocks for fw image in blocks %lu..%lu\n",
+ fw_num_blocks, fw1_start_block,
+ fw1_start_block + max_len1 / mtd->erasesize - 1);
if (uboot_part) {
#ifdef CONFIG_ENV_IS_IN_NAND
if (part_info->offset <= CONFIG_ENV_OFFSET + TOTAL_ENV_SIZE) {
}
return -ENOSPC;
}
- fw1_end_block = fw1_start_block + fw1_skip + fw_num_blocks - 1;
+ if (extra_blocks)
+ fw1_end_block = fw1_start_block + fw_num_blocks + extra_blocks - 1;
+ else
+ fw1_end_block = fw1_start_block + fw_num_blocks + fw1_skip - 1;
if (fw2_set && fw2_start_block == 0)
fw2_start_block = fw1_end_block + 1;
fw2_skip = find_contig_space(fw2_start_block, fw_num_blocks,
max_len2 / mtd->erasesize);
if (fw2_skip < 0) {
- printf("Could not find %lu contiguous good blocks for redundant fw image\n",
- fw_num_blocks);
+ printf("Could not find %lu contiguous good blocks for redundant fw image in blocks %lu..%lu\n",
+ fw_num_blocks, fw2_start_block,
+ fw2_start_block + max_len2 / mtd->erasesize - 1);
if (redund_part) {
printf("Increase the size of the '%s' partition or use a different partition\n",
redund_part);
} else {
fw2_skip = 0;
}
- fw2_end_block = fw2_start_block + fw2_skip + fw_num_blocks - 1;
+ if (extra_blocks)
+ fw2_end_block = fw2_start_block + fw_num_blocks + extra_blocks - 1;
+ else
+ fw2_end_block = fw2_start_block + fw_num_blocks + fw2_skip - 1;
#ifdef CONFIG_ENV_IS_IN_NAND
fail_if_overlap(fcb, env, "FCB", "Environment");
#endif
fail_if_overlap(fw1, fw2, "FW1", "FW2");
}
+ fw1_start_block += fw1_skip;
+ fw2_start_block += fw2_skip;
- buf = malloc(erase_size);
+ buf = memalign(SZ_128K, erase_size);
if (buf == NULL) {
printf("Failed to allocate buffer\n");
return -ENOMEM;
}
- fcb = create_fcb(buf, fw1_start_block + fw1_skip,
- fw2_start_block + fw2_skip, fw_num_blocks);
+ fcb = create_fcb(buf, fw1_start_block,
+ fw2_start_block, fw_num_blocks);
if (IS_ERR(fcb)) {
printf("Failed to initialize FCB: %ld\n", PTR_ERR(fcb));
- free(buf);
- return PTR_ERR(fcb);
+ ret = PTR_ERR(fcb);
+ goto out;
}
encode_hamming_13_8(fcb, (void *)fcb + 512, 512);
ret = write_fcb(buf, fcb_start_block);
- free(buf);
if (ret) {
printf("Failed to write FCB to block %lu\n", fcb_start_block);
return ret;
}
- if (size & (page_size - 1)) {
- memset(addr + size, 0xff, size & (page_size - 1));
- size = ALIGN(size, page_size);
- }
-
printf("Programming U-Boot image from %p to block %lu @ %08llx\n",
- addr, fw1_start_block + fw1_skip,
- (u64)(fw1_start_block + fw1_skip) * mtd->erasesize);
+ addr, fw1_start_block, (u64)fw1_start_block * mtd->erasesize);
ret = tx28_prog_uboot(addr, fw1_start_block, fw1_skip, size,
max_len1);
- if (fw2_start_block == 0) {
- return ret;
- }
+ if (ret || fw2_start_block == 0)
+ goto out;
printf("Programming redundant U-Boot image to block %lu @ %08llx\n",
- fw2_start_block + fw2_skip,
- (u64)(fw2_start_block + fw2_skip) * mtd->erasesize);
+ fw2_start_block, (u64)fw2_start_block * mtd->erasesize);
ret = tx28_prog_uboot(addr, fw2_start_block, fw2_skip, fw_num_blocks,
max_len2);
+out:
+ free(buf);
return ret;
}
"Creates an FCB data structure and writes an U-Boot image to flash",
"[-f {<part>|block#}] [-r [{<part>|block#}]] [-e #] [<address>] [<length>]\n"
"\t-f <part>\twrite bootloader image to partition <part>\n"
- "\t-f #\twrite bootloader image at block # (decimal)\n"
- "\t-r\twrite redundant bootloader image at next free block after first image\n"
+ "\t-f #\t\twrite bootloader image at block # (decimal)\n"
+ "\t-r\t\twrite redundant bootloader image at next free block after first image\n"
"\t-r <part>\twrite redundant bootloader image to partition <part>\n"
- "\t-r #\twrite redundant bootloader image at block # (decimal)\n"
- "\t-e #\tspecify number of redundant blocks per boot loader image\n"
- "\t\tonly valid if -f or -r specify a flash address rather than a partition name\n"
- "\t<address>\tRAM address of bootloader image (default: ${fileaddr}\n"
- "\t<length>\tlength of bootloader image in RAM (default: ${filesize}"
+ "\t-r #\t\twrite redundant bootloader image at block # (decimal)\n"
+ "\t-e #\t\tspecify number of redundant blocks per boot loader image\n"
+ "\t\t\t(only valid if -f or -r specify a flash address rather than a partition name)\n"
+ "\t-n\t\tshow what would be done without actually updating the flash\n"
+ "\t<address>\tRAM address of bootloader image (default: ${fileaddr})\n"
+ "\t<length>\tlength of bootloader image in RAM (default: ${filesize})"
);
gpio_direction_output(MX28_PAD_ENET0_RXD3__GPIO_4_10, 1);
}
-void board_init_ll(void)
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
{
- mxs_common_spl_init(tx28_stk5_pads, ARRAY_SIZE(tx28_stk5_pads));
+ mxs_common_spl_init(arg, resptr,
+ tx28_stk5_pads, ARRAY_SIZE(tx28_stk5_pads));
tx28_stk5_lcd_init();
tx28_stk5_led_on();
}
/* 2d0 */ 0x06120612, 0x04420442, 0x04420442, 0x00040004,
/* 2e0 */ 0x00040004, 0x00000000, 0x00000000, 0x00000000,
/* 2f0 */ 0x00000000, 0x00000000,
-#elif CONFIG_SDRAM_SIZE == SZ_128M
+#elif CONFIG_SYS_SDRAM_SIZE == SZ_128M
/* TX28-40x0: MT47H64M16HR-3 */
/* 000 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 010 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 2d0 */ 0x06120612, 0x04420442, 0x04420442, 0x00040004,
/* 2e0 */ 0x00040004, 0x00000000, 0x00000000, 0x00000000,
/* 2f0 */ 0x00000000, 0x00000000,
-#elif CONFIG_SDRAM_SIZE == SZ_256M
+#elif CONFIG_SYS_SDRAM_SIZE == SZ_256M
/* TX28-40x2: MEM2G16D2DABG */
/* 000 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* 010 */ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
/* provide at least _some_ sort of randomness */
#define MAX_LOOPS 100
-static u32 random;
+static u32 random __attribute__((section("data")));
static inline void random_init(void)
{
#ifdef CONFIG_FEC_MXC
#ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
-#ifdef CONFIG_FEC_MXC_MULTI
+#ifndef CONFIG_TX28_S
#define FEC_MAX_IDX 1
#else
#define FEC_MAX_IDX 0
eth_setenv_enetaddr(env_name, mac);
return 0;
}
+
+static inline int tx28_fec1_enabled(void)
+{
+ const char *status;
+ int off;
+
+ if (!gd->fdt_blob)
+ return 0;
+
+ off = fdt_path_offset(gd->fdt_blob, "ethernet1");
+ if (off < 0)
+ return 0;
+
+ status = fdt_getprop(gd->fdt_blob, off, "status", NULL);
+ return status && (strcmp(status, "okay") == 0);
+}
+
+static void tx28_init_mac(void)
+{
+ int ret;
+
+ ret = fec_get_mac_addr(0);
+ if (ret < 0) {
+ printf("Failed to read FEC0 MAC address from OCOTP\n");
+ return;
+ }
+#ifdef CONFIG_TX28_S
+ if (tx28_fec1_enabled()) {
+ ret = fec_get_mac_addr(1);
+ if (ret < 0) {
+ printf("Failed to read FEC1 MAC address from OCOTP\n");
+ return;
+ }
+ }
+#endif
+}
+#else
+static inline void tx28_init_mac(void)
+{
+}
#endif /* CONFIG_GET_FEC_MAC_ADDR_FROM_IIM */
static const iomux_cfg_t tx28_fec_pads[] = {
return ret;
}
-#ifdef CONFIG_FEC_MXC_MULTI
+#ifndef CONFIG_TX28_S
if (getenv("ethaddr")) {
ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
if (ret) {
#endif
return 0;
}
+#else
+static inline void tx28_init_mac(void)
+{
+}
#endif /* CONFIG_FEC_MXC */
enum {
/* init flexcan transceiver enable GPIO */
gpio_request_one(STK5_CAN_XCVR_GPIO, GPIOFLAG_OUTPUT_INIT_HIGH,
"Flexcan Transceiver");
- SETUP_IOMUX_PAD(STK5_CAN_XCVR_GPIO);
-}
-
-int tx28_fec1_enabled(void)
-{
- const char *status;
- int off;
-
- if (!gd->fdt_blob)
- return 0;
-
- off = fdt_path_offset(gd->fdt_blob, "ethernet1");
- if (off < 0)
- return 0;
-
- status = fdt_getprop(gd->fdt_blob, off, "status", NULL);
- return status && (strcmp(status, "okay") == 0);
-}
-
-static void tx28_init_mac(void)
-{
- int ret;
-
- ret = fec_get_mac_addr(0);
- if (ret < 0) {
- printf("Failed to read FEC0 MAC address from OCOTP\n");
- return;
- }
-#ifdef CONFIG_FEC_MXC_MULTI
- if (tx28_fec1_enabled()) {
- ret = fec_get_mac_addr(1);
- if (ret < 0) {
- printf("Failed to read FEC1 MAC address from OCOTP\n");
- return;
- }
- }
-#endif
+ mxs_iomux_setup_pad(STK5_CAN_XCVR_GPIO);
}
int board_late_init(void)
const char *dlm = "";
printf("Board: Ka-Ro TX28-4%sx%d\n", TX28_MOD_SUFFIX,
- CONFIG_SDRAM_SIZE / SZ_128M +
+ CONFIG_SYS_SDRAM_SIZE / SZ_128M +
CONFIG_SYS_NAND_BLOCKS / 2048 * 2);
printf("POWERUP Source: ");
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PING=y
-CONFIG_CMD_ROMUPDATE=y
CONFIG_CMD_TIME=y
+S:CONFIG_DOS_PARTITION=y
CONFIG_DM=y
+S:CONFIG_ARM=y
+S:CONFIG_TARGET_TX28=y
+S:CONFIG_TARGET_TX28_40X1=y
-+S:CONFIG_TX28_UBOOT=y
++S:CONFIG_TX28_UBOOT_NOENV=y
CONFIG_BOOTP_DNS=y
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_SUBNETMASK=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PING=y
-CONFIG_CMD_ROMUPDATE=y
CONFIG_CMD_TIME=y
+S:CONFIG_DOS_PARTITION=y
CONFIG_DM=y
-+S:CONFIG_ENV_IS_NOWHERE=y
CONFIG_FEC_MXC=y
CONFIG_GET_FEC_MAC_ADDR_FROM_IIM=y
CONFIG_LCD=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PING=y
-CONFIG_CMD_ROMUPDATE=y
CONFIG_CMD_TIME=y
+S:CONFIG_DOS_PARTITION=y
CONFIG_DM=y
+S:CONFIG_ARM=y
+S:CONFIG_TARGET_TX28=y
+S:CONFIG_TARGET_TX28_40X1=y
-+S:CONFIG_TX28_UBOOT=y
++S:CONFIG_TX28_UBOOT_NOENV=y
CONFIG_BOOTP_DNS=y
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_SUBNETMASK=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PING=y
-CONFIG_CMD_ROMUPDATE=y
CONFIG_CMD_TIME=y
+S:CONFIG_DOS_PARTITION=y
CONFIG_DM=y
-+S:CONFIG_ENV_IS_NOWHERE=y
CONFIG_FEC_MXC=y
CONFIG_GET_FEC_MAC_ADDR_FROM_IIM=y
CONFIG_LCD=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PING=y
-CONFIG_CMD_ROMUPDATE=y
CONFIG_CMD_TIME=y
+S:CONFIG_DOS_PARTITION=y
CONFIG_DM=y
+S:CONFIG_ARM=y
+S:CONFIG_TARGET_TX28=y
+S:CONFIG_TARGET_TX28_40X1=y
-+S:CONFIG_TX28_UBOOT=y
++S:CONFIG_TX28_UBOOT_NOENV=y
CONFIG_BOOTP_DNS=y
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_SUBNETMASK=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PING=y
-CONFIG_CMD_ROMUPDATE=y
CONFIG_CMD_TIME=y
+S:CONFIG_DOS_PARTITION=y
CONFIG_DM=y
-+S:CONFIG_ENV_IS_NOWHERE=y
CONFIG_FEC_MXC=y
CONFIG_GET_FEC_MAC_ADDR_FROM_IIM=y
CONFIG_LCD=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PING=y
-CONFIG_CMD_ROMUPDATE=y
CONFIG_CMD_TIME=y
+S:CONFIG_DOS_PARTITION=y
CONFIG_DM=y
+S:CONFIG_ARM=y
+S:CONFIG_TARGET_TX28=y
+S:CONFIG_TARGET_TX28_41X0=y
-+S:CONFIG_TX28_UBOOT=y
++S:CONFIG_TX28_UBOOT_NOENV=y
CONFIG_BOOTP_DNS=y
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_SUBNETMASK=y
CONFIG_CMD_NAND=y
CONFIG_CMD_NAND_TRIMFFS=y
CONFIG_CMD_PING=y
-CONFIG_CMD_ROMUPDATE=y
CONFIG_CMD_TIME=y
+S:CONFIG_DOS_PARTITION=y
CONFIG_DM=y
-+S:CONFIG_ENV_IS_NOWHERE=y
CONFIG_FEC_MXC=y
CONFIG_GET_FEC_MAC_ADDR_FROM_IIM=y
CONFIG_LCD=y
#include <netdev.h>
#include <asm/errno.h>
#include <asm/io.h>
+#include <asm/gpio.h>
#include <asm/arch/iomux.h>
#include <asm/arch/imx-regs.h>
return (readl(®->reg) >> PAD_PIN(gpio)) & 1;
}
-void gpio_set_value(unsigned gpio, int value)
+int gpio_set_value(unsigned gpio, int value)
{
uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOUT(bank);
writel(1 << PAD_PIN(gpio), ®->reg_set);
else
writel(1 << PAD_PIN(gpio), ®->reg_clr);
+
+ return 0;
}
int gpio_direction_input(unsigned gpio)
depends on SOC_MX6
depends on FSL_ESDHC
+config MXS_MMC
+ bool "i.MXS MMC/SDHC controller"
+ depends on SOC_MXS || SOC_MX6
+ select GENERIC_MMC
+
config SUPPORT_EMMC_BOOT
bool "Support boot from eMMC"
depends on MMC
if FEC_MXC
-config FEC_MXC_MULTI
- bool "Support multiple ethernet interfaces"
- depends on MX28 || MX6
-
config FEC_MXC_PHYADDR
int "FEC Ethernet PHY address"
default 0
*/
#define CONFIG_MXS_GPIO /* GPIO control */
#define CONFIG_SYS_HZ 1000 /* Ticks per second */
-#define PHYS_SDRAM_1_SIZE CONFIG_SDRAM_SIZE
+#define PHYS_SDRAM_1_SIZE CONFIG_SYS_SDRAM_SIZE
#ifdef CONFIG_TX28_S
#define TX28_MOD_SUFFIX "1"
#else
#else
#define CONFIG_LOADADDR 43000000
#endif
-#define CONFIG_FDTADDR 41000000
+#define CONFIG_FDTADDR 40800000
#define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
#define CONFIG_SYS_FDT_ADDR _pfx(0x, CONFIG_FDTADDR)
#define CONFIG_U_BOOT_IMG_SIZE SZ_1M
*/
#ifdef CONFIG_NAND
#define CONFIG_SYS_NAND_BLOCK_SIZE SZ_128K
-#define CONFIG_NAND_MXS
-#define CONFIG_APBH_DMA
-#define CONFIG_APBH_DMA_BURST
-#define CONFIG_APBH_DMA_BURST8
#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_SYS_MXS_DMA_CHANNEL 4
#define CONFIG_SYS_NAND_MAX_CHIPS 0x1
* MMC Driver
*/
#ifdef CONFIG_CMD_MMC
-#define CONFIG_MXS_MMC
#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
#define CONFIG_CMD_EXT2
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SYS_SPL_VDDD_VAL 1500
-#define CONFIG_SYS_SPL_BATT_BO_LEVEL 2800
+#define CONFIG_SYS_SPL_BATT_BO_LEVEL 2400
+#define CONFIG_SYS_SPL_VDDA_BO_VAL 100
#define CONFIG_SYS_SPL_VDDMEM_VAL 0 /* VDDMEM is not utilized on TX28 */
#endif /* __CONFIGS_TX28_H */
projects / karo-tx-uboot.git / commitdiff