interface.
ported i2c driver to the new framework:
+ - drivers/i2c/soft_i2c.c:
+ - activate first bus with CONFIG_SYS_I2C_SOFT define
+ CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
+ for defining speed and slave address
+ - activate second bus with I2C_SOFT_DECLARATIONS2 define
+ CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
+ for defining speed and slave address
+ - activate third bus with I2C_SOFT_DECLARATIONS3 define
+ CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
+ for defining speed and slave address
+ - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
+ CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
+ for defining speed and slave address
additional defines:
which defines
bus 0 on adapter 0 without a mux
- bus 1 on adapter 0 without a PCA9547 on address 0x70 port 1
- bus 2 on adapter 0 without a PCA9547 on address 0x70 port 2
- bus 3 on adapter 0 without a PCA9547 on address 0x70 port 3
- bus 4 on adapter 0 without a PCA9547 on address 0x70 port 4
- bus 5 on adapter 0 without a PCA9547 on address 0x70 port 5
+ bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
+ bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
+ bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
+ bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
+ bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
bus 6 on adapter 1 without a mux
- bus 7 on adapter 1 without a PCA9544 on address 0x72 port 1
- bus 8 on adapter 1 without a PCA9544 on address 0x72 port 2
+ bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
+ bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
If you do not have i2c muxes on your board, omit this define.
-- Legacy I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C
+- Legacy I2C Support: CONFIG_HARD_I2C
NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
provides the following compelling advantages:
** Please consider updating your I2C driver now. **
- These enable legacy I2C serial bus commands. Defining either of
- (but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will
- include the appropriate I2C driver for the selected CPU.
+ These enable legacy I2C serial bus commands. Defining
+ CONFIG_HARD_I2C will include the appropriate I2C driver
+ for the selected CPU.
This will allow you to use i2c commands at the u-boot
command line (as long as you set CONFIG_CMD_I2C in
CONFIG_HARD_I2C selects a hardware I2C controller.
- CONFIG_SOFT_I2C configures u-boot to use a software (aka
- bit-banging) driver instead of CPM or similar hardware
- support for I2C.
-
There are several other quantities that must also be
- defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C.
+ defined when you define CONFIG_HARD_I2C.
In both cases you will need to define CONFIG_SYS_I2C_SPEED
to be the frequency (in Hz) at which you wish your i2c bus
That's all that's required for CONFIG_HARD_I2C.
- If you use the software i2c interface (CONFIG_SOFT_I2C)
+ If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
then the following macros need to be defined (examples are
from include/configs/lwmon.h):
I2C muxes, you can define here, how to reach this
EEPROM. For example:
- #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
+ #define CONFIG_I2C_ENV_EEPROM_BUS 1
EEPROM which holds the environment, is reached over
a pca9547 i2c mux with address 0x70, channel 3.
* I2C related stuff
*/
#ifdef CONFIG_CMD_I2C
-#ifndef CONFIG_SOFT_I2C
+#ifndef CONFIG_SYS_I2C_SOFT
#define CONFIG_I2C_MVTWSI
#endif
#define CONFIG_SYS_I2C_SLAVE 0x0
#endif
#if defined(CONFIG_HARD_I2C) || \
- defined(CONFIG_SOFT_I2C) || \
defined(CONFIG_SYS_I2C)
#include <i2c.h>
#endif
return (0);
}
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
static int init_func_i2c(void)
{
puts("I2C: ");
#if defined(CONFIG_DISPLAY_BOARDINFO)
checkboard, /* display board info */
#endif
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
init_func_i2c,
#endif
dram_init, /* configure available RAM banks */
#include <version.h>
#if defined(CONFIG_HARD_I2C) || \
- defined(CONFIG_SOFT_I2C)
+ defined(CONFIG_SYS_I2C)
#include <i2c.h>
#endif
/***********************************************************************/
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
- defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
static int init_func_i2c (void)
{
puts ("I2C: ");
display_options,
checkcpu,
checkboard,
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
- defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
init_func_i2c,
#endif
#if defined(CONFIG_HARD_SPI)
#if defined(CONFIG_CMD_DOC)
void doc_init(void);
#endif
-#if defined(CONFIG_HARD_I2C) || \
- defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
#include <i2c.h>
#endif
#include <spi.h>
/***********************************************************************/
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
- defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
static int init_func_i2c(void)
{
puts("I2C: ");
misc_init_f,
#endif
INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
- defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
init_func_i2c,
#endif
#if defined(CONFIG_HARD_SPI)
}
#endif
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
void i2c_init_board(void)
{
return rc;
}
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
void i2c_init_board(void)
{
u32 pin;
/* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
/* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
/* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
#else
/* Initialise peripherals */
at91_seriald_hw_init();
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ i2c_set_bus_num(0);
nand_hw_init();
macb_hw_init();
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
uchar buf[6];
char str[18];
char hostname[MODULE_NAME_MAXLEN];
" device at address %02X:%04X\n", CONFIG_SYS_I2C_EEPROM,
CONFIG_MAC_OFFSET);
}
-#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */
+#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) */
if (!getenv("ethaddr"))
printf(LOG_PREFIX "MAC address not set, networking is not "
"operational\n");
/* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
/* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
/* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
#else
/* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
/* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
/* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
#else
* However i2c_get_bus_num() cannot be called before
* relocation.
*/
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
void iic_init(void)
{
/* ports are now initialized in board_early_init_f() */
int iic_read(void)
{
- switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
+ switch (I2C_ADAP_HWNR) {
case 0:
return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
case 1:
void iic_sda(int bit)
{
- switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
+ switch (I2C_ADAP_HWNR) {
case 0:
at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
break;
void iic_scl(int bit)
{
- switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
+ switch (I2C_ADAP_HWNR) {
case 0:
at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
break;
}
#endif
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
void i2c_init_board(void)
{
u32 pin;
CONFIG_FSL_I2C -- define to use FSL common I2C driver
CONFIG_HARD_I2C -- define for I2C hardware support
-CONFIG_SOFT_I2C -- define for I2C bit-banged
+CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
CONFIG_SYS_I2C_SPEED -- define for I2C speed
CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
CONFIG_FSL_I2C -- define to use FSL common I2C driver
CONFIG_HARD_I2C -- define for I2C hardware support
-CONFIG_SOFT_I2C -- define for I2C bit-banged
+CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
CONFIG_SYS_I2C_SPEED -- define for I2C speed
CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
CONFIG_FSL_I2C -- define to use FSL common I2C driver
CONFIG_HARD_I2C -- define for I2C hardware support
-CONFIG_SOFT_I2C -- define for I2C bit-banged
+CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
CONFIG_SYS_I2C_SPEED -- define for I2C speed
CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
CONFIG_FSL_I2C -- define to use FSL common I2C driver
CONFIG_HARD_I2C -- define for I2C hardware support
-CONFIG_SOFT_I2C -- define for I2C bit-banged
+CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
CONFIG_SYS_I2C_SPEED -- define for I2C speed
CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
CONFIG_FSL_I2C -- define to use FSL common I2C driver
CONFIG_HARD_I2C -- define for I2C hardware support
-CONFIG_SOFT_I2C -- define for I2C bit-banged
+CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
CONFIG_SYS_I2C_SPEED -- define for I2C speed
CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
/* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */
/* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */
/* PA25 */ { 0, 0, 0, 0, 1, 0 }, /* 8247_P0 */
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/* PA24 */ { 1, 0, 0, 0, 1, 1 }, /* I2C_SDA2 */
/* PA23 */ { 1, 0, 0, 1, 1, 1 }, /* I2C_SCL2 */
#else /* normal I/O port pins */
I2C_MUX_DEVICE *dev = NULL;
#endif
uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
- uchar *buf;
+ char *buf;
unsigned long dev_addr = CONFIG_SYS_IVM_EEPROM_ADR;
int ret;
+#if defined(CONFIG_SYS_I2C)
+ buf = getenv("EEprom_ivm");
+ i2c_set_bus_num(buf ? (int)simple_strtol(buf, NULL, 10) : 0);
+#else
#if defined(CONFIG_I2C_MUX)
/* First init the Bus, select the Bus */
buf = (unsigned char *) getenv("EEprom_ivm");
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP7_PEX_RST_OUTn,
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
MPP8_GPIO, /* SDA */
MPP9_GPIO, /* SCL */
#endif
int board_early_init_f(void)
{
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
u32 tmp;
/* set the 2 bitbang i2c pins as output gpios */
kw_gpio_set_valid(KM_FLASH_GPIO_PIN, 1);
kw_gpio_direction_output(KM_FLASH_GPIO_PIN, 1);
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/*
* Reinit the GPIO for I2C Bitbang driver so that the now
* available gpio framework is consistent. The calls to
}
#endif
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
void set_sda(int state)
{
I2C_ACTIVE;
uchar val, errcd;
int i;
- i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ i2c_set_bus_num(0);
gd->arch.kbd_status = 0;
/* switch VCC on */
val |= MAX1604_OP_SUS | MAX1604_VCCBON;
- i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ i2c_set_bus_num(0);
i2c_write (CONFIG_SYS_I2C_POWER_A_ADDR, 0, 0, &val, 1);
udelay(500000);
*/
debug ("PCMCIA power OFF\n");
val = MAX1604_VCCBHIZ | MAX1604_VPPBHIZ;
- i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ i2c_set_bus_num(0);
i2c_write (CONFIG_SYS_I2C_POWER_A_ADDR, 0, 0, &val, 1);
val = 0;
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
#else
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
#else
/* PD17 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* SPI_MOSI */
/* PD16 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* SPI_MISO */
#endif
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/* PD15 */ { CONF, GPIO, 0, DOUT, OPEN, 1 }, /* I2C_SDA */
/* PD14 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* I2C_SCL */
#else
#include <spd_sdram.h>
#include <i2c.h>
#include "../common/sb_common.h"
-#include "../common/ppc440gx_i2c.h"
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
#include <net.h>
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
#else
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
#else
static HWIB_INFO hwinf = {0, 0, 1, 0, 1, 0, 0, 0, 0, 8272, 0 ,0,
0, 0, 0, 0, 0, 0};
-#endif
+#endif /* __CONFIG_H */
void dram_init_banksize(void)
__attribute__((weak, alias("__dram_init_banksize")));
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
- defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
static int init_func_i2c(void)
{
puts("I2C: ");
misc_init_f,
#endif
INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
- defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
init_func_i2c,
#endif
#if defined(CONFIG_HARD_SPI)
#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
spi_init_f ();
#endif
-#if defined(CONFIG_HARD_I2C) || \
- defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
}
#ifdef CONFIG_LOGBUFFER
#include <logbuff.h>
#endif
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
- defined(CONFIG_SYS_I2C_ADAPTERS)
+
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
#include <i2c.h>
#endif
drv_arm_dcc_init ();
#endif
#ifdef CONFIG_SYS_I2C
-#ifdef CONFIG_SYS_I2C_ADAPTERS
i2c_init_all();
-#endif
#else
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C)
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
#endif
COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o
COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
-COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
COBJS-$(CONFIG_TEGRA_I2C) += tegra_i2c.o
COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o
COBJS-$(CONFIG_SH_I2C) += sh_i2c.o
COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
+COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
COBJS-$(CONFIG_ZYNQ_I2C) += zynq_i2c.o
COBJS := $(COBJS-y)
/*
+ * (C) Copyright 2009
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ * Changes for multibus/multiadapter I2C support.
+ *
* (C) Copyright 2001, 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
/* #define DEBUG_I2C */
-#ifdef DEBUG_I2C
DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef I2C_SOFT_DECLARATIONS
+# if defined(CONFIG_MPC8260)
+# define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = \
+ ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
+# elif defined(CONFIG_8xx)
+# define I2C_SOFT_DECLARATIONS volatile immap_t *immr = \
+ (immap_t *)CONFIG_SYS_IMMR;
+# else
+# define I2C_SOFT_DECLARATIONS
+# endif
+#endif
+
+#if !defined(CONFIG_SYS_SOFT_I2C_SPEED)
+#define CONFIG_SYS_SOFT_I2C_SPEED CONFIG_SYS_I2C_SPEED
+#endif
+#if !defined(CONFIG_SYS_SOFT_I2C_SLAVE)
+#define CONFIG_SYS_SOFT_I2C_SLAVE CONFIG_SYS_I2C_SLAVE
#endif
/*-----------------------------------------------------------------------
* Definitions
*/
-
#define RETRIES 0
#define I2C_ACK 0 /* PD_SDA level to ack a byte */
#define PRINTD(fmt,args...)
#endif
-#if defined(CONFIG_I2C_MULTI_BUS)
-static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
-#endif /* CONFIG_I2C_MULTI_BUS */
-
/*-----------------------------------------------------------------------
* Local functions
*/
return(nack); /* not a nack is an ack */
}
-#if defined(CONFIG_I2C_MULTI_BUS)
-/*
- * Functions for multiple I2C bus handling
- */
-unsigned int i2c_get_bus_num(void)
-{
- return i2c_bus_num;
-}
-
-int i2c_set_bus_num(unsigned int bus)
-{
-#if defined(CONFIG_I2C_MUX)
- if (bus < CONFIG_SYS_MAX_I2C_BUS) {
- i2c_bus_num = bus;
- } else {
- int ret;
-
- ret = i2x_mux_select_mux(bus);
- i2c_init_board();
- if (ret == 0)
- i2c_bus_num = bus;
- else
- return ret;
- }
-#else
- if (bus >= CONFIG_SYS_MAX_I2C_BUS)
- return -1;
- i2c_bus_num = bus;
-#endif
- return 0;
-}
-#endif
-
/*-----------------------------------------------------------------------
* if ack == I2C_ACK, ACK the byte so can continue reading, else
* send I2C_NOACK to end the read.
return(data);
}
-/*=====================================================================*/
-/* Public Functions */
-/*=====================================================================*/
-
/*-----------------------------------------------------------------------
* Initialization
*/
-void i2c_init (int speed, int slaveaddr)
+static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
{
#if defined(CONFIG_SYS_I2C_INIT_BOARD)
/* call board specific i2c bus reset routine before accessing the */
* completion of EEPROM writes since the chip stops responding until
* the write completes (typically 10mSec).
*/
-int i2c_probe(uchar addr)
+static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
{
int rc;
/*-----------------------------------------------------------------------
* Read bytes
*/
-int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
+ int alen, uchar *buffer, int len)
{
int shift;
PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
/*-----------------------------------------------------------------------
* Write bytes
*/
-int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
+static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
+ int alen, uchar *buffer, int len)
{
int shift, failures = 0;
send_stop();
return(failures);
}
+
+/*
+ * Register soft i2c adapters
+ */
+U_BOOT_I2C_ADAP_COMPLETE(soft0, soft_i2c_init, soft_i2c_probe,
+ soft_i2c_read, soft_i2c_write, NULL,
+ CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
+ 0)
+#if defined(I2C_SOFT_DECLARATIONS2)
+U_BOOT_I2C_ADAP_COMPLETE(soft1, soft_i2c_init, soft_i2c_probe,
+ soft_i2c_read, soft_i2c_write, NULL,
+ CONFIG_SYS_I2C_SOFT_SPEED_2,
+ CONFIG_SYS_I2C_SOFT_SLAVE_2,
+ 1)
+#endif
+#if defined(I2C_SOFT_DECLARATIONS3)
+U_BOOT_I2C_ADAP_COMPLETE(soft2, soft_i2c_init, soft_i2c_probe,
+ soft_i2c_read, soft_i2c_write, NULL,
+ CONFIG_SYS_I2C_SOFT_SPEED_3,
+ CONFIG_SYS_I2C_SOFT_SLAVE_3,
+ 2)
+#endif
+#if defined(I2C_SOFT_DECLARATIONS4)
+U_BOOT_I2C_ADAP_COMPLETE(soft3, soft_i2c_init, soft_i2c_probe,
+ soft_i2c_read, soft_i2c_write, NULL,
+ CONFIG_SYS_I2C_SOFT_SPEED_4,
+ CONFIG_SYS_I2C_SOFT_SLAVE_4,
+ 3)
+#endif
* PCI stuff
*-----------------------------------------------------------------------
*/
-#define CONFIG_HARD_I2C 1 /* To enable I2C support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CONFIG_HARD_I2C 1 /* To enable I2C support */
+#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address*/
/*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC08) for environment
*/
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
#define CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
/*-----------------------------------------------------------------------
* I2C/EEPROM/RTC configuration
*/
-#define CONFIG_SOFT_I2C /* Software I2C support enabled */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
/*-----------------------------------------------------------------------
* I2C/EEPROM/RTC configuration
*/
-#define CONFIG_SOFT_I2C /* Software I2C support enabled */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
* I2C
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* Enable I2C and select the hardware/software driver
*/
-#define CONFIG_HARD_I2C 1 /* CPM based I2C */
-#undef CONFIG_SOFT_I2C /* Bit-banged I2C */
+#define CONFIG_HARD_I2C 1 /* CPM based I2C */
+#undef CONFIG_SYS_I2C_SOFT /* Bit-banged I2C */
#ifdef CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED 100000 /* clock speed in Hz */
-#define CONFIG_SYS_I2C_SLAVE 0xFE /* I2C slave address */
+#define CONFIG_SYS_I2C_SPEED 100000 /* clock speed in Hz */
+#define CONFIG_SYS_I2C_SLAVE 0xFE /* I2C slave address */
#endif
-#ifdef CONFIG_SOFT_I2C
-#define PB_SCL 0x00000020 /* PB 26 */
-#define PB_SDA 0x00000010 /* PB 27 */
-#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
-#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
-#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
-#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
-#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
- else immr->im_cpm.cp_pbdat &= ~PB_SDA
-#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
- else immr->im_cpm.cp_pbdat &= ~PB_SCL
-#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+#ifdef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
+#define PB_SCL 0x00000020 /* PB 26 */
+#define PB_SDA 0x00000010 /* PB 27 */
+#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
+#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
+#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
+#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
+#define I2C_SDA(bit) if (bit) \
+ immr->im_cpm.cp_pbdat |= PB_SDA; \
+ else \
+ immr->im_cpm.cp_pbdat &= ~PB_SDA
+#define I2C_SCL(bit) if (bit) \
+ immr->im_cpm.cp_pbdat |= PB_SCL; \
+ else \
+ immr->im_cpm.cp_pbdat &= ~PB_SCL
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
#endif
/*
* configuration items that the driver uses to drive the port pins.
*/
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
#error "Soft I2C is not configured properly. Please review!"
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
else iop->pdat &= ~0x00020000
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
+#endif /* CONFIG_SYS_I2C_SOFT */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 /* EEPROM IS24C02 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
#define CONFIG_DOS_PARTITION
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
-# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
+
/*
* Command line configuration.
#define CONFIG_MISC_INIT_R 1
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 400000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
/*
* Software (bit-bang) I2C driver configuration
*/
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM X24C16 */
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
/* mask of address bits that overflow into the "EEPROM chip address" */
* If the software driver is chosen, there are some additional
* configuration items that the driver uses to drive the port pins.
*/
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 400000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
/*
* Software (bit-bang) I2C driver configuration
*/
-#ifdef CONFIG_SOFT_I2C
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
else iop->pdat &= ~0x00020000
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
/*
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
* I2C
*----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C hardware support */
-#undef CONFIG_SOFT_I2C /* I2C !bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
/*
* enable I2C and select the hardware/software driver
*/
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
-#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
-#ifdef CONFIG_SOFT_I2C
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
/*-----------------------------------------------------------------------
* I2C Configuration
/*
* enable I2C and select the hardware/software driver
*/
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
+#ifdef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
-#ifdef CONFIG_SOFT_I2C
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
+#endif /* CONFIG_SYS_I2C_SOFT */
/*-----------------------------------------------------------------------
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x58000
/* I2c */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x58000
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x00000300
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x00000300
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x00000300
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x58000
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x58000
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x58000
/* I2c */
#undef CONFIG_FSL_I2C
#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
/* I2C speed and slave address */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
/* I2c */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x58000
/* I2c */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x58000
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x00008F00
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x00008F00
* I2C
*----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C hardware support */
-#undef CONFIG_SOFT_I2C /* I2C !bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
#undef CONFIG_UCODE_PATCH
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-#define CONFIG_SYS_I2C_SPEED 50000
-#define CONFIG_SYS_I2C_SLAVE 0xFE
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM X24C04 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
/* mask of address bits that overflow into the "EEPROM chip address" */
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define I2C_8574_PCI66 0x20 /* 0=33MHz PCI, 1=66MHz PCI */
#define I2C_8574_FLASHSIDE 0x40 /* 0=Reset vector from U4, 1=from U7*/
-#undef CONFIG_SOFT_I2C
-
#endif
/* Compact Flash */
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
/* I2C */
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_SLAVE 0x7F
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
#define CONFIG_SYS_I2C_OFFSET 0x3000
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/* I2C */
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address*/
/* I2C */
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
/* I2C */
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address*/
/* I2C */
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address*/
"bootm"
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
"bootm"
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
* I2C
*----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
#define CONFIG_HARD_I2C 1 /* To I2C with hardware support */
-#undef CONFIG_SORT_I2C /* To I2C with software support */
+#undef CONFIG_SYS_I2C_SOFT /* To I2C with software support */
#define CONFIG_SYS_I2C_SPEED 4700 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
+#if defined(CONFIG_SYS_I2C_SOFT)
+#define CONFIG_SYS_SYS_I2C_SOFT_SPEED 4700 /* I2C speed and slave address */
+#define CONFIG_SYS_SYS_I2C_SOFT_SLAVE 0x7F
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(50)
+#endif /* #define(CONFIG_SYS_I2C_SOFT) */
#define CONFIG_SYS_I2C_LCD_ADDR 0x8 /* LCD Control */
#define CONFIG_SYS_I2C_KEY_ADDR 0x9 /* Keyboard coprocessor */
* I2C Configuration
*-----------------------------------------------------------------------------
*/
-#define CONFIG_I2C 1
-#define CONFIG_SYS_I2C_SPEED 50000
-#define CONFIG_SYS_I2C_SLAVE 0x34
+#define CONFIG_SYS_I2C_SPEED 50000
+#define CONFIG_SYS_I2C_SLAVE 0x34
/* enable I2C and select the hardware/software driver */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+
+#if defined(CONFIG_SYS_I2C_SOFT)
+#define CONFIG_SYS_I2C 1
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0x34
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x34
+#endif
+
# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM X24C16 */
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
/* mask of address bits that overflow into the "EEPROM chip address" */
#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#define CONFIG_BZIP2 /* Include support for bzip2 compressed images */
+
+/* enable I2C and select the hardware/software driver */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 40000 /* 40 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
+/* Software (bit-bang) I2C driver configuration */
+#define PB_SCL 0x00000020 /* PB 26 */
+#define PB_SDA 0x00000010 /* PB 27 */
+
+#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
+#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
+#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
+#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
+#define I2C_SDA(bit) if (bit) \
+ immr->im_cpm.cp_pbdat |= PB_SDA; \
+ else \
+ immr->im_cpm.cp_pbdat &= ~PB_SDA
+#define I2C_SCL(bit) if (bit) \
+ immr->im_cpm.cp_pbdat |= PB_SCL; \
+ else \
+ immr->im_cpm.cp_pbdat &= ~PB_SCL
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+
+/* M41T11 Serial Access Timekeeper(R) SRAM */
+#define CONFIG_RTC_M41T11 1
+#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+/* play along with the linux driver */
+#define CONFIG_SYS_M41T11_BASE_YEAR 1900
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
#endif
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C /* I2C bit-banged */
-
-# define CONFIG_SYS_I2C_SPEED 50000 /* 50 kHz is supposed to work */
-# define CONFIG_SYS_I2C_SLAVE 0xFE
-
-#ifdef CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(1) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
/*
#define CONFIG_RTC_DS1306 /* Dallas 1306 real time clock */
-#define CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-# define CONFIG_SYS_I2C_SPEED 50000
-# define CONFIG_SYS_I2C_SLAVE 0xFE
# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel 24C64 */
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */
* If the software driver is chosen, there are some additional
* configuration items that the driver uses to drive the port pins.
*/
-#define CONFIG_HARD_I2C 1 /* To enable I2C support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_HARD_I2C 1 /* To enable I2C support */
+#undef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C_SPEED 400000
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
#error "Soft I2C is not configured properly. Please review!"
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
else iop->pdat &= ~0x00020000
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
+#endif /* CONFIG_SYS_I2C_SOFT */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 /* EEPROM IS24C02 */
* If the software driver is chosen, there are some additional
* configuration items that the driver uses to drive the port pins.
*/
-#define CONFIG_HARD_I2C 1 /* To enable I2C support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_HARD_I2C 1 /* To enable I2C support */
+#undef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C_SPEED 400000
+#define CONFIG_SYS_I2C_SLAVE 0x7F
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
#error "Soft I2C is not configured properly. Please review!"
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
else iop->pdat &= ~0x00020000
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
+#endif /* CONFIG_SYS_I2C_SOFT */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 /* EEPROM IS24C02 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
/*-----------------------------------------------------------------------
* I2C
*/
-#define CONFIG_SOFT_I2C
-#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC32 */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
-/* mask of address bits that overflow into the "EEPROM chip address" */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x01
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
- /* 32 byte page write mode using*/
- /* last 5 bits of the address */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 100000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
-#if defined (CONFIG_SOFT_I2C)
#if 0 /* push-pull */
#define SDA 0x00800000
#define SCL 0x00000008
#define I2C_ACTIVE {DIR1|=SDA;}
#define I2C_TRISTATE {DIR1&=~SDA;}
#endif
-#endif
+
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC32 */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
+/* mask of address bits that overflow into the "EEPROM chip address" */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x01
+/*
+ * The Catalyst CAT24WC32 has 32 byte page write mode using
+ * last 5 bits of the address
+ */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-
-#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
-#ifdef CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C?? */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_MISC_INIT_R
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C with softwate support */
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
-#if defined (CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
+# define CONFIG_SYS_I2C
+# define CONFIG_SYS_I2C_SOFT_SPEED 100000
+# define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
+/**/
# define SDA0 0x40
# define SCL0 0x80
# define GPIOE0 *((volatile uchar*)(CONFIG_SYS_MBAR+0x0c00))
# define I2C_DELAY {udelay(5);}
# define I2C_ACTIVE {DDR0|=SDA0;}
# define I2C_TRISTATE {DDR0&=~SDA0;}
-# define CONFIG_SYS_I2C_SPEED 100000
-# define CONFIG_SYS_I2C_SLAVE 0x7F
+
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_FACT_ADDR 0x57
#endif
* Environment handler
* only the first 6k in EEPROM are available for user. Of that we use 256b
*/
-#define CONFIG_SOFT_I2C
#define CONFIG_ENV_IS_IN_EEPROM 1 /* turn on EEPROM env feature */
#define CONFIG_ENV_OFFSET 0x1000
#define CONFIG_ENV_SIZE 0x0700
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_EEPROM_SIZE 0x2000
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 0xFE
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 12
#define CONFIG_ENV_OVERWRITE
#define CONFIG_MISC_INIT_R
-#if defined (CONFIG_SOFT_I2C)
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 100000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
+/**/
#define SDA 0x00010
#define SCL 0x00020
#define __I2C_DIR immr->im_cpm.cp_pbdir
#define I2C_DELAY { udelay(5); }
#define I2C_ACTIVE { __I2C_DIR |= SDA; }
#define I2C_TRISTATE { __I2C_DIR &= ~SDA; }
-#endif
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_BOOTCOMMAND "run flash_self"
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 400000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
/*
* Software (bit-bang) I2C driver configuration
#if CONFIG_I2C
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 400000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
/*
* Software (bit-bang) I2C driver configuration
*/
#define CONFIG_SYS_DTT_HYSTERESIS 3
#else
+#undef CONFIG_SYS_I2C
#undef CONFIG_HARD_I2C
-#undef CONFIG_SOFT_I2C
+#undef CONFIG_SYS_I2C_SOFT
#endif
/*
* I2C
*/
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed: 400KHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F /* slave address */
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-
-#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
-#ifdef CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
-#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
-#ifdef CONFIG_SOFT_I2C
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C256 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-
-#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
-#ifdef CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C?? */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */
* I2C
*----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */
#define CONFIG_I2C_MULTI_BUS
/* I2C speed and slave address */
/* I2C */
#define CONFIG_FSL_I2C
#define CONFIG_HARD_I2C /* I2C with hw support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x58000
/*
* I2C Settings
*/
-#define CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C_SOFT
+#ifdef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C
#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
-
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+#endif
/*
* Misc Settings
#define CONFIG_BFIN_CPU bf533-0.3
#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
-
/*
* Clock Settings
* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
/* Values can range from 1-15 */
#define CONFIG_SCLK_DIV 6 /* note: 1.2 boards can go faster */
-
/*
* Memory Settings
*/
/* #define CONFIG_ETHADDR 02:80:ad:20:31:b8 */
+/* I2C */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0
+/*
+ * Software (bit-bang) I2C driver configuration
+ */
+#define PF_SCL PF3
+#define PF_SDA PF2
+#define I2C_INIT (*pFIO_DIR |= PF_SCL); asm("ssync;")
+#define I2C_ACTIVE (*pFIO_DIR |= PF_SDA); \
+ *pFIO_INEN &= ~PF_SDA; asm("ssync;")
+#define I2C_TRISTATE (*pFIO_DIR &= ~PF_SDA); \
+ *pFIO_INEN |= PF_SDA; asm("ssync;")
+#define I2C_READ ((volatile)(*pFIO_FLAG_D & PF_SDA) != 0); \
+ asm("ssync;")
+#define I2C_SDA(bit) if (bit) { \
+ *pFIO_FLAG_S = PF_SDA; \
+ asm("ssync;"); \
+ } \
+ else { \
+ *pFIO_FLAG_C = PF_SDA; \
+ asm("ssync;"); \
+ }
+#define I2C_SCL(bit) if (bit) { \
+ *pFIO_FLAG_S = PF_SCL; \
+ asm("ssync;"); \
+ } \
+ else { \
+ *pFIO_FLAG_C = PF_SCL; \
+ asm("ssync;"); \
+ }
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+
+
/*
* Flash Settings
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 67
-
/*
* SPI Settings
*/
/*
* I2C Settings
*/
-#define CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C_SOFT
+#ifdef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C
#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF3
#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF2
-
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0
+#endif
/*
* Compact Flash / IDE / ATA Settings
/*
* I2C Settings
*/
-#define CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C_SOFT
+#ifdef CONFIG_SYS_I2C_SOFT
#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
-
+#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0
+#endif
/*
* Misc Settings
# ifdef CONFIG_SPI_FLASH
# define CONFIG_CMD_SF
# endif
-# if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+# if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
# define CONFIG_CMD_I2C
# define CONFIG_SOFT_I2C_READ_REPEATED_START
# endif
/*
* I2C Settings
*/
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
# ifndef CONFIG_SYS_I2C_SPEED
# define CONFIG_SYS_I2C_SPEED 50000
# endif
#define SHARED_RESOURCES 1
/* Is I2C bit-banged? */
-#undef CONFIG_SOFT_I2
/*
* Clock Settings
# undef CONFIG_CMD_NET
#endif
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
# define CONFIG_CMD_I2C
#endif
* Note these pins are arbitrarily chosen because we aren't using
* them yet. You can (and probably should) change these values!
*/
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF9
#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF8
-#define CONFIG_SYS_I2C_SPEED 50000
-#define CONFIG_SYS_I2C_SLAVE 0xFE
+#define CONFIG_SYS_SOFT_I2C_SPEED 50000
+#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE
#endif
/*
* Soft I2C settings (BF561 does not have hard I2C)
* PF12,13 on SPI connector 0.
*/
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
# define CONFIG_CMD_I2C
# define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF12
# define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF13
#define CONFIG_USART_ID 0/* ignored in arm */
#undef CONFIG_HARD_I2C
-#undef CONFIG_SOFT_I2C
#define AT91_PIN_SDA (1<<25)
#define AT91_PIN_SCL (1<<26)
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_DHCP
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_I2C
#endif
* configuration items that the driver uses to drive the port pins.
*/
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
#error "Soft I2C is not configured properly. Please review!"
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
else iop->pdat &= ~0x00020000
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
+#endif /* CONFIG_SYS_I2C_SOFT */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 /* EEPROM IS24C02 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
* configuration items that the driver uses to drive the port pins.
*/
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
* I2C-Bus
*/
-#define CONFIG_SYS_I2C_SPEED 50000
-#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
-
-#ifndef CONFIG_HARD_I2C
-#define CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0
/* Software I2C driver configuration */
else \
writel(ATMEL_PMX_AA_TWCK, &pio->pioa.codr);
-#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SPEED)
-
-#endif /* CONFIG_HARD_I2C */
+#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SOFT_SPEED)
/* I2C-RTC */
* If the software driver is chosen, there are some additional
* configuration items that the driver uses to drive the port pins.
*/
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C_SLAVE 0x7F /* This is for HARD, must go */
/*
* Software (bit-bang) I2C driver configuration
*/
-#ifdef CONFIG_SOFT_I2C
+#ifdef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
else iop->pdat &= ~0x00020000
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
+#endif /* CONFIG_SYS_I2C_SOFT */
/* #define CONFIG_RTC_DS174x */
/* I2C */
#define CONFIG_SYS_MAX_I2C_BUS 1
-#define CONFIG_SYS_I2C_SLAVE 0
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 100000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0
+
#define I2C_SOFT_DECLARATIONS
#define GPIO_I2C_SCL AT91_PIO_PORTA, 24
/*
* I2C Settings
*/
-#define CONFIG_SOFT_I2C 1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
-
/*
* Misc Settings
*/
/*
* I2C stuff
*/
-#define CONFIG_SYS_I2C_SPEED 400000
-
-/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+#undef CONFIG_HARD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 400000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
#define CONFIG_LOADS_ECHO
#define CONFIG_SYS_LOADS_BAUD_CHANGE
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS 1
#define CONFIG_SYS_I2C_INIT_BOARD
-#define CONFIG_I2C_MUX
/* Support the IVM EEprom */
#define CONFIG_SYS_IVM_EEPROM_ADR 0x50
#define CONFIG_SYS_I2C_SPEED 200000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x3000
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_MAX_I2C_BUS 1
+#define CONFIG_I2C_MUX
/* I2C SYSMON (LM75, AD7414 is almost compatible) */
#define CONFIG_DTT_LM75 /* ON Semi's LM75 */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_SF
-#define CONFIG_SOFT_I2C /* I2C bit-banged */
/* SPI NOR Flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_SPEED 8100000
/*
* I2C related stuff
*/
+#undef CONFIG_I2C_MVTWSI
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+
#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
-#if defined(CONFIG_SOFT_I2C)
+#if defined(CONFIG_SYS_I2C_SOFT)
+
+#define CONFIG_SYS_NUM_I2C_BUSES 6
+#define CONFIG_SYS_I2C_MAX_HOPS 1
+#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
+ }
+
#ifndef __ASSEMBLY__
#include <asm/arch-kirkwood/gpio.h>
extern void __set_direction(unsigned pin, int high);
#define I2C_DELAY udelay(1)
#define I2C_SOFT_DECLARATIONS
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x0
+#define CONFIG_SYS_I2C_SOFT_SPEED 100000
#endif
/* EEprom support 24C128, 24C256 valid for environment eeprom */
#define CONFIG_SYS_EEPROM_WREN
#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
-#define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS "\0"
+#define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS
#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
#endif
CONFIG_KM_DEF_ENV \
CONFIG_KM_NEW_ENV \
"arch=arm\0" \
- "EEprom_ivm=" KM_IVM_BUS "\0" \
+ "EEprom_ivm=" __stringify(KM_IVM_BUS) "\0" \
""
#if defined(CONFIG_SYS_NO_FLASH)
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_KM_BOARD_EXTRA_ENV \
CONFIG_KM_DEF_ENV \
- "EEprom_ivm=pca9544a:70:4 \0" \
+ "EEprom_ivm=1\0" \
"unlock=yes\0" \
"newenv=" \
"prot off 0xFE0C0000 +0x40000 && " \
#endif /* CONFIG_ENV_IS_IN_FLASH */
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed */
-#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_NUM_I2C_BUSES 3
+#define CONFIG_SYS_I2C_MAX_HOPS 1
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SPEED CONFIG_SYS_I2C_SOFT_SPEED
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
+#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
+ {0, {{I2C_MUX_PCA9542, 0x70, 0} } }, \
+ {0, {{I2C_MUX_PCA9542, 0x70, 1} } } }
/*
* Software (bit-bang) I2C driver configuration
#define CONFIG_SYS_DTT_MAX_TEMP 70
#define CONFIG_SYS_DTT_LOW_TEMP -30
#define CONFIG_SYS_DTT_HYSTERESIS 3
-#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS)
+#define CONFIG_SYS_DTT_BUS_NUM 2
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_IDENT_STRING "\nKeymile Kirkwood"
#define CONFIG_HOSTNAME km_kirkwood
#define CONFIG_KM_DISABLE_PCIE
-#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
+#define KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
/* KM_KIRKWOOD_PCI */
#elif defined(CONFIG_KM_KIRKWOOD_PCI)
#define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI"
#define CONFIG_HOSTNAME km_kirkwood_pci
-#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
+#define KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#define CONFIG_KM_FPGA_CONFIG
/* KM_NUSA */
#elif defined(CONFIG_KM_NUSA)
-#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
+#define KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#define CONFIG_IDENT_STRING "\nKeymile NUSA"
#define CONFIG_HOSTNAME kmnusa
#undef CONFIG_SYS_KWD_CONFIG
#elif defined(CONFIG_KM_MGCOGE3UN)
#define CONFIG_IDENT_STRING "\nKeymile COGE3UN"
#define CONFIG_HOSTNAME mgcoge3un
-#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
+#define KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#undef CONFIG_SYS_KWD_CONFIG
#define CONFIG_SYS_KWD_CONFIG \
$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
/* KMCOGE5UN */
#elif defined(CONFIG_KM_COGE5UN)
#define CONFIG_IDENT_STRING "\nKeymile COGE5UN"
-#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
+#define KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#undef CONFIG_SYS_KWD_CONFIG
#define CONFIG_SYS_KWD_CONFIG \
$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
#elif defined(CONFIG_KM_PORTL2)
#define CONFIG_IDENT_STRING "\nKeymile Port-L2"
#define CONFIG_HOSTNAME portl2
-#define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
+#define KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#define CONFIG_KM_PIGGY4_88E6061
/* KM_SUV31 */
#elif defined(CONFIG_KM_SUV31)
-#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
+#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#define CONFIG_IDENT_STRING "\nKeymile SUV31"
#define CONFIG_HOSTNAME kmsuv31
#define CONFIG_KM_ENV_IS_IN_SPI_NOR
#include "km/km_arm.h"
#ifndef CONFIG_KM_ENV_IS_IN_SPI_NOR
-#define KM_ENV_BUS "pca9544a:70:d" /* I2C2 (Mux-Port 5)*/
+#define KM_ENV_BUS 5 /* I2C2 (Mux-Port 5)*/
#endif
#if defined(CONFIG_KM_PIGGY4_88E6352)
* I2C
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#undef CONFIG_STATUS_LED /* Status LED disabled */
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-
-#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
-#ifdef CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
* I2C
*/
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
#define CONFIG_SYS_I2C_SLAVE 0x7F /* slave address */
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#ifndef __ASSEMBLY__
#include <asm/arch/gpio.h>
#define CONFIG_CMD_I2C
-#define CONFIG_SOFT_I2C
-#define CONFIG_SYS_I2C_SPEED 400000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT 1 /* I2C bit-banged */
+#define I2C_SOFT_DEFS
+#define CONFIG_SYS_I2C_SOFT_SPEED 400000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
#define __SDA 63
#define __SCL 62
#define I2C_SDA(x) nmk_gpio_set(__SDA, x)
/* RTC and I2C stuff */
#define CONFIG_RTC_DS1338
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#undef CONFIG_HARD_I2C
-#define CONFIG_SOFT_I2C
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-
-#ifdef CONFIG_SOFT_I2C
-# define CONFIG_I2C_CMD_TREE
-# define CONFIG_I2C_MULTI_BUS
+
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#ifdef CONFIG_SYS_I2C_SOFT
+#define CONFIG_SYS_I2C_SOFT_SPEED 100000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
+
/* Configure data and clock pins for pio */
# define I2C_INIT { \
at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
/* Set clock pin */
# define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
# define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
+#endif /* CONFIG_SYS_I2C_SOFT */
/*
* BOOTP options
/* I2C */
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C spd and slave address */
* I2C
*----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
* I2C
*----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
*/
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-
-#define CONFIG_SYS_I2C_SPEED 83000 /* 83 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
* I2C
*----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get_nr(j4, 3)
#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get_nr(j4, 0)
-#define CONFIG_SOFT_I2C 1
-#define CONFIG_SYS_I2C_SPEED 50000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS 7
#define CONFIG_USB_GADGET
#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
-#define CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0
#define CONFIG_SOFT_I2C_READ_REPEATED_START
-#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS 7
* If the software driver is chosen, there are some additional
* configuration items that the driver uses to drive the port pins.
*/
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 400000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
/*
* Software (bit-bang) I2C driver configuration
*/
-#ifdef CONFIG_SOFT_I2C
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
else iop->pdat &= ~0x00020000
#define I2C_DELAY udelay(20) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
/* Define this to reserve an entire FLASH sector for
* environment variables. Otherwise, the environment will be
#define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_SLAVE 0x7F
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
*-----------------------------------------------------------------------
*/
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define I2C_INIT
#define CONFIG_SYS_PROMPT "Snapper> "
/* I2C - Bit-bashed */
-#define CONFIG_SOFT_I2C
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 100000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
#define CONFIG_SOFT_I2C_READ_REPEATED_START
-#define CONFIG_I2C_MULTI_BUS
#define I2C_INIT do { \
at91_set_gpio_output(AT91_PIN_PA23, 1); \
at91_set_gpio_output(AT91_PIN_PA24, 1); \
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 102124 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_OFFSET 0x3000
*/
#if defined(CONFIG_CMD_I2C)
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-
-#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
-#ifdef CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
#endif
/*-----------------------------------------------------------------------
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#if 0
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#undef CONFIG_SYS_I2C_NOPROBES
#define CONFIG_CMD_USB
/* I2C support must always be enabled */
-#define CONFIG_SOFT_I2C
#define CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C_SPEED 400000
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 400000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
+
#define I2C0_PORT AT91_PIO_PORTA
#define SDA0_PIN 23
#define SCL0_PIN 24
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_CACHELINE_SIZE 32
-#define CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
#define CONFIG_SOFT_I2C_READ_REPEATED_START
#define CONFIG_SYS_I2C_INIT_BOARD
-#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SOFT_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS 15
*/
#define CONFIG_U8500_I2C
#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0 /* slave addr of controller */
*/
/* enable I2C and select the hardware/software driver */
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-
-#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-
-#ifdef CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
/*
* Software (bit-bang) I2C driver configuration
*/
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
else immr->im_cpm.cp_pbdat &= ~PB_SCL
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
-#endif /* CONFIG_SOFT_I2C */
/*-----------------------------------------------------------------------
* I2C EEPROM (24C164)
*------------------------------------------------------------------*/
#if 1
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#endif
/*
* I2C/EEPROM
*/
-#undef CONFIG_HARD_I2C /* I2C with hardware support */
-#define CONFIG_SOFT_I2C /* I2C bit-banged */
-
-#define CONFIG_SYS_I2C_SPEED 83000 /* 83 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SLAVE 0x7f
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
+#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f
/*
* Software (bit-bang) I2C driver configuration
#undef CONFIG_CMD_USB
#undef CONFIG_SMC911X
-#undef CONFIG_SOFT_I2C
+#undef CONFIG_SYS_I2C_SOFT
#undef CONFIG_SOURCE
#undef CONFIG_SYS_LONGHELP
#undef CONFIG_TIMESTAMP
#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
#ifndef CONFIG_HARD_I2C
-#define CONFIG_SOFT_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED
+#define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE
/* Software I2C driver configuration */
-
#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SPEED)
#define AT91_PIN_SDA (1<<4) /* AT91C_PIO_PB4 */
/* I2C */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_FSL_I2C
#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
* I2C
*----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
* Adjusts I2C pointers after U-Boot is relocated to DRAM
*/
void i2c_reloc_fixup(void);
+#if defined(CONFIG_SYS_I2C_SOFT)
+void i2c_soft_init(void);
+void i2c_soft_active(void);
+void i2c_soft_tristate(void);
+int i2c_soft_read(void);
+void i2c_soft_sda(int bit);
+void i2c_soft_scl(int bit);
+void i2c_soft_delay(void);
+#endif
#else
/*
projects / karo-tx-uboot.git / commitdiff