]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
kconfig: arm: move ARCH_MX? out of choice which selects TARGETs that depend on those
authorLothar Waßmann <LW@KARO-electronics.de>
Mon, 12 Oct 2015 12:01:23 +0000 (14:01 +0200)
committerLothar Waßmann <LW@KARO-electronics.de>
Mon, 12 Oct 2015 12:01:23 +0000 (14:01 +0200)
95 files changed:
arch/arm/Kconfig
arch/arm/cpu/arm926ejs/mxs/Kconfig [new file with mode: 0644]
arch/arm/cpu/armv7/Makefile
arch/arm/imx-common/cpu.c
arch/arm/imx-common/spl.c
arch/arm/imx-common/timer.c
arch/arm/include/asm/imx-common/dma.h
arch/arm/include/asm/imx-common/iomux-v3.h
arch/arm/include/asm/imx-common/regs-apbh.h
arch/arm/include/asm/imx-common/regs-bch.h
arch/arm/lib/asm-offsets.c
configs/mx6ul_14x14_evk_defconfig
configs/tx28-40x1_defconfig
configs/tx28-40x1_noenv_defconfig
configs/tx28-40x2_defconfig
configs/tx28-40x2_noenv_defconfig
configs/tx28-40x3_defconfig
configs/tx28-40x3_noenv_defconfig
configs/tx28-41x0_defconfig
configs/tx28-41x0_noenv_defconfig
configs/tx51-8xx0_defconfig
configs/tx51-8xx0_noenv_defconfig
configs/tx51-8xx1_2_defconfig
configs/tx51-8xx1_2_noenv_defconfig
configs/tx53-1232_defconfig
configs/tx53-1232_noenv_defconfig
configs/tx53-1232_sec_defconfig
configs/tx53-x030_defconfig
configs/tx53-x030_noenv_defconfig
configs/tx53-x030_sec_defconfig
configs/tx53-x130_defconfig
configs/tx53-x130_noenv_defconfig
configs/tx53-x130_sec_defconfig
configs/tx53-x131_defconfig
configs/tx53-x131_noenv_defconfig
configs/tx53-x131_sec_defconfig
configs/tx6q-1020_defconfig
configs/tx6q-1020_mfg_defconfig
configs/tx6q-1020_noenv_defconfig
configs/tx6q-1020_sec_defconfig
configs/tx6q-1033_defconfig
configs/tx6q-1033_mfg_defconfig
configs/tx6q-1033_noenv_defconfig
configs/tx6q-1033_sec_defconfig
configs/tx6q-10x0_defconfig
configs/tx6q-10x0_mfg_defconfig
configs/tx6q-10x0_noenv_defconfig
configs/tx6q-10x0_sec_defconfig
configs/tx6q-11x0_defconfig
configs/tx6q-11x0_mfg_defconfig
configs/tx6q-11x0_noenv_defconfig
configs/tx6q-11x0_sec_defconfig
configs/tx6s-8034_defconfig
configs/tx6s-8034_mfg_defconfig
configs/tx6s-8034_noenv_defconfig
configs/tx6s-8034_sec_defconfig
configs/tx6s-8035_defconfig
configs/tx6s-8035_mfg_defconfig
configs/tx6s-8035_noenv_defconfig
configs/tx6s-8035_sec_defconfig
configs/tx6u-8011_defconfig
configs/tx6u-8011_mfg_defconfig
configs/tx6u-8011_noenv_defconfig
configs/tx6u-8011_sec_defconfig
configs/tx6u-8012_defconfig
configs/tx6u-8012_mfg_defconfig
configs/tx6u-8012_noenv_defconfig
configs/tx6u-8012_sec_defconfig
configs/tx6u-8033_defconfig
configs/tx6u-8033_mfg_defconfig
configs/tx6u-8033_noenv_defconfig
configs/tx6u-8033_sec_defconfig
configs/tx6u-80x0_defconfig
configs/tx6u-80x0_mfg_defconfig
configs/tx6u-80x0_noenv_defconfig
configs/tx6u-80x0_sec_defconfig
configs/tx6u-8111_defconfig
configs/tx6u-8111_mfg_defconfig
configs/tx6u-8111_noenv_defconfig
configs/tx6u-8111_sec_defconfig
configs/tx6u-81x0_defconfig
configs/tx6u-81x0_mfg_defconfig
configs/tx6u-81x0_noenv_defconfig
configs/tx6u-81x0_sec_defconfig
drivers/block/dwc_ahsata.c
drivers/dma/Kconfig
drivers/dma/apbh_dma.c
drivers/gpio/mxc_gpio.c
drivers/misc/Kconfig
drivers/mmc/Kconfig
drivers/mtd/nand/Kconfig
drivers/mtd/nand/mxs_nand.c
drivers/usb/host/ehci-mx6.c
drivers/watchdog/Kconfig
include/fsl_sec.h

index 71383e534c8c428a01fd0a167c2e0a36ef837b35..df3207fdaaaae75248ddcf6e218ac384ec402fc9 100644 (file)
@@ -74,6 +74,18 @@ config SYS_DCACHE_OFF
 config SYS_L2CACHE_OFF
        bool "Do not use L2 cache"
 
 config SYS_L2CACHE_OFF
        bool "Do not use L2 cache"
 
+config ARCH_MXS
+       bool "Freescale i.MX23 & i.MX28"
+       select CPU_ARM926EJS
+
+config ARCH_MX6
+       bool "Freescale MX6"
+       select CPU_V7
+
+config ARCH_MX5
+       bool "Freescale MX5"
+       select CPU_V7
+
 config SOC_AM335X
        bool
        select CPU_V7
 config SOC_AM335X
        bool
        select CPU_V7
@@ -226,7 +238,6 @@ config TARGET_TX53
 
 config TARGET_TX6
        bool "Support tx6"
 
 config TARGET_TX6
        bool "Support tx6"
-       select SOC_MX6
 
 config TARGET_ZMX25
        bool "Support zmx25"
 
 config TARGET_ZMX25
        bool "Support zmx25"
@@ -557,14 +568,6 @@ config ARCH_KEYSTONE
        select CPU_V7
        select SUPPORT_SPL
 
        select CPU_V7
        select SUPPORT_SPL
 
-config ARCH_MX6
-       bool "Freescale MX6"
-       select CPU_V7
-
-config ARCH_MX5
-       bool "Freescale MX5"
-       select CPU_V7
-
 config TARGET_M53EVK
        bool "Support m53evk"
        select CPU_V7
 config TARGET_M53EVK
        bool "Support m53evk"
        select CPU_V7
@@ -938,6 +941,8 @@ source "arch/arm/mach-keystone/Kconfig"
 
 source "arch/arm/mach-kirkwood/Kconfig"
 
 
 source "arch/arm/mach-kirkwood/Kconfig"
 
+source "arch/arm/cpu/arm926ejs/mxs/Kconfig"
+
 source "arch/arm/cpu/armv7/mx6/Kconfig"
 
 source "arch/arm/cpu/armv7/mx5/Kconfig"
 source "arch/arm/cpu/armv7/mx6/Kconfig"
 
 source "arch/arm/cpu/armv7/mx5/Kconfig"
diff --git a/arch/arm/cpu/arm926ejs/mxs/Kconfig b/arch/arm/cpu/arm926ejs/mxs/Kconfig
new file mode 100644 (file)
index 0000000..ecbed4c
--- /dev/null
@@ -0,0 +1,9 @@
+if ARCH_MXS
+
+config SOC_MX23
+       bool
+
+config SOC_MX28
+       bool
+
+endif
index 5d9e819114c090072f7cc0e52de59473f945b7ba..b0b872d5c3bf1fec6d98da745a1e0d5bd0f0afff 100644 (file)
@@ -12,7 +12,7 @@ obj-y += cache_v7.o
 obj-y  += cpu.o cp15.o
 obj-y  += syslib.o
 
 obj-y  += cpu.o cp15.o
 obj-y  += syslib.o
 
-ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_SOC_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA),)
+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_ARCH_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA),)
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y  += lowlevel_init.o
 endif
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y  += lowlevel_init.o
 endif
@@ -43,7 +43,7 @@ obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
 obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/
 obj-$(if $(filter ls102xa,$(SOC)),y) += ls102xa/
 obj-$(if $(filter mx5,$(SOC)),y) += mx5/
 obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/
 obj-$(if $(filter ls102xa,$(SOC)),y) += ls102xa/
 obj-$(if $(filter mx5,$(SOC)),y) += mx5/
-obj-$(CONFIG_SOC_MX6) += mx6/
+obj-$(CONFIG_ARCH_MX6) += mx6/
 obj-$(CONFIG_OMAP34XX) += omap3/
 obj-$(CONFIG_OMAP44XX) += omap4/
 obj-$(CONFIG_OMAP54XX) += omap5/
 obj-$(CONFIG_OMAP34XX) += omap3/
 obj-$(CONFIG_OMAP44XX) += omap4/
 obj-$(CONFIG_OMAP54XX) += omap5/
index caa6ef6296159769574b4568cee28e479d2d742d..c3d09b2fc1c206ef010f48d27ba9880753568dc5 100644 (file)
@@ -64,7 +64,7 @@ u32 get_imx_reset_cause(void)
 }
 #endif
 
 }
 #endif
 
-#if defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
 #if defined(CONFIG_SOC_MX53)
 #define MEMCTL_BASE    ESDCTL_BASE_ADDR
 #else
 #if defined(CONFIG_SOC_MX53)
 #define MEMCTL_BASE    ESDCTL_BASE_ADDR
 #else
@@ -154,14 +154,14 @@ int print_cpuinfo(void)
        u32 cpurev;
        __maybe_unused u32 max_freq;
 
        u32 cpurev;
        __maybe_unused u32 max_freq;
 
-#if defined(CONFIG_SOC_MX6) && defined(CONFIG_IMX6_THERMAL)
+#if defined(CONFIG_ARCH_MX6) && defined(CONFIG_IMX6_THERMAL)
        struct udevice *thermal_dev;
        int cpu_tmp, minc, maxc, ret;
 #endif
 
        cpurev = get_cpu_rev();
 
        struct udevice *thermal_dev;
        int cpu_tmp, minc, maxc, ret;
 #endif
 
        cpurev = get_cpu_rev();
 
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
        printf("CPU:   Freescale i.MX%s rev%d.%d",
               get_imx_type((cpurev & 0xFF000) >> 12),
               (cpurev & 0x000F0) >> 4,
        printf("CPU:   Freescale i.MX%s rev%d.%d",
               get_imx_type((cpurev & 0xFF000) >> 12),
               (cpurev & 0x000F0) >> 4,
@@ -181,7 +181,7 @@ int print_cpuinfo(void)
                mxc_get_clock(MXC_ARM_CLK) / 1000000);
 #endif
 
                mxc_get_clock(MXC_ARM_CLK) / 1000000);
 #endif
 
-#if defined(CONFIG_SOC_MX6) && defined(CONFIG_IMX6_THERMAL)
+#if defined(CONFIG_ARCH_MX6) && defined(CONFIG_IMX6_THERMAL)
        puts("CPU:   ");
        switch (get_cpu_temp_grade(&minc, &maxc)) {
        case TEMP_AUTOMOTIVE:
        puts("CPU:   ");
        switch (get_cpu_temp_grade(&minc, &maxc)) {
        case TEMP_AUTOMOTIVE:
@@ -253,7 +253,7 @@ void arch_preboot_os(void)
 {
 #if defined(CONFIG_CMD_SATA)
        sata_stop();
 {
 #if defined(CONFIG_CMD_SATA)
        sata_stop();
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
        disable_sata_clock();
 #endif
 #endif
        disable_sata_clock();
 #endif
 #endif
index 1073b3503f35bed2aad1787739ecaadcd05be289..143ff4490c32892c4378dd2eb0b1e2611a7c0182 100644 (file)
@@ -13,7 +13,7 @@
 #include <asm/spl.h>
 #include <spl.h>
 
 #include <asm/spl.h>
 #include <spl.h>
 
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
 /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
 u32 spl_boot_device(void)
 {
 /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
 u32 spl_boot_device(void)
 {
index b954a20d7f7b24d186328e769aa8ca7bb26eeb5e..4943a2a307a9338b203572333c564d4cb0253013 100644 (file)
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static inline int gpt_has_clk_source_osc(void)
 {
 
 static inline int gpt_has_clk_source_osc(void)
 {
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
        if (((is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) &&
            (soc_rev() > CHIP_REV_1_0)) || is_cpu_type(MXC_CPU_MX6DL) ||
             is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX) ||
        if (((is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) &&
            (soc_rev() > CHIP_REV_1_0)) || is_cpu_type(MXC_CPU_MX6DL) ||
             is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX) ||
index 8b5acfc9e397b48a6c98f2db5533ade591219293..f991c9517eca7e5a71be81f37580cba7854f6880 100644 (file)
@@ -59,7 +59,7 @@ enum {
        MXS_DMA_CHANNEL_AHB_APBH_RESERVED1,
        MXS_MAX_DMA_CHANNELS,
 };
        MXS_DMA_CHANNEL_AHB_APBH_RESERVED1,
        MXS_MAX_DMA_CHANNELS,
 };
-#elif defined(CONFIG_SOC_MX6)
+#elif defined(CONFIG_ARCH_MX6)
 enum {
        MXS_DMA_CHANNEL_AHB_APBH_GPMI0 = 0,
        MXS_DMA_CHANNEL_AHB_APBH_GPMI1,
 enum {
        MXS_DMA_CHANNEL_AHB_APBH_GPMI0 = 0,
        MXS_DMA_CHANNEL_AHB_APBH_GPMI1,
index e1b733741bf7e1cd8883ba61b8fb4d7c4f486f4f..8b9a8070d08bc79ad735e37d926b530420158df9 100644 (file)
@@ -92,7 +92,7 @@ typedef u64 iomux_v3_cfg_t;
 #define __PAD_CTRL_VALID       (1 << 17)
 #define PAD_CTRL_VALID         ((iomux_v3_cfg_t)__PAD_CTRL_VALID << MUX_PAD_CTRL_SHIFT)
 
 #define __PAD_CTRL_VALID       (1 << 17)
 #define PAD_CTRL_VALID         ((iomux_v3_cfg_t)__PAD_CTRL_VALID << MUX_PAD_CTRL_SHIFT)
 
-#ifdef CONFIG_SOC_MX6
+#ifdef CONFIG_ARCH_MX6
 
 #define PAD_CTL_HYS            __MUX_PAD_CTRL(1 << 16)
 
 
 #define PAD_CTL_HYS            __MUX_PAD_CTRL(1 << 16)
 
index 1b14248b6f7ec699a0314ac24b0cb899ab88e84d..4fd6bcea37cacdde195accf3f6a0c1c3f202c9e3 100644 (file)
@@ -96,7 +96,7 @@ struct mxs_apbh_regs {
        mxs_reg_32(hw_apbh_version);
 };
 
        mxs_reg_32(hw_apbh_version);
 };
 
-#elif (defined(CONFIG_SOC_MX28) || defined(CONFIG_SOC_MX6))
+#elif (defined(CONFIG_SOC_MX28) || defined(CONFIG_ARCH_MX6))
 struct mxs_apbh_regs {
        mxs_reg_32(hw_apbh_ctrl0);                              /* 0x000 */
        mxs_reg_32(hw_apbh_ctrl1);                              /* 0x010 */
 struct mxs_apbh_regs {
        mxs_reg_32(hw_apbh_ctrl0);                              /* 0x000 */
        mxs_reg_32(hw_apbh_ctrl1);                              /* 0x010 */
@@ -275,7 +275,7 @@ struct mxs_apbh_regs {
 #define        APBH_CTRL0_CLKGATE_CHANNEL_NAND7                0x0800
 #define        APBH_CTRL0_CLKGATE_CHANNEL_HSADC                0x1000
 #define        APBH_CTRL0_CLKGATE_CHANNEL_LCDIF                0x2000
 #define        APBH_CTRL0_CLKGATE_CHANNEL_NAND7                0x0800
 #define        APBH_CTRL0_CLKGATE_CHANNEL_HSADC                0x1000
 #define        APBH_CTRL0_CLKGATE_CHANNEL_LCDIF                0x2000
-#elif defined(CONFIG_SOC_MX6)
+#elif defined(CONFIG_ARCH_MX6)
 #define        APBH_CTRL0_CLKGATE_CHANNEL_OFFSET               0
 #define        APBH_CTRL0_CLKGATE_CHANNEL_NAND0                0x0001
 #define        APBH_CTRL0_CLKGATE_CHANNEL_NAND1                0x0002
 #define        APBH_CTRL0_CLKGATE_CHANNEL_OFFSET               0
 #define        APBH_CTRL0_CLKGATE_CHANNEL_NAND0                0x0001
 #define        APBH_CTRL0_CLKGATE_CHANNEL_NAND1                0x0002
@@ -391,7 +391,7 @@ struct mxs_apbh_regs {
 #define        APBH_CHANNEL_CTRL_FREEZE_CHANNEL_LCDIF          0x2000
 #endif
 
 #define        APBH_CHANNEL_CTRL_FREEZE_CHANNEL_LCDIF          0x2000
 #endif
 
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
 #define        APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET          16
 #endif
 
 #define        APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET          16
 #endif
 
index 3d073a55a480260697252e70a8bf2aea65cf8df1..3474ea5d0aa0ada15a7529bcd6a47c50f913a025 100644 (file)
@@ -126,7 +126,7 @@ struct bch_regs {
 #define        BCH_FLASHLAYOUT0_NBLOCKS_OFFSET                 24
 #define        BCH_FLASHLAYOUT0_META_SIZE_MASK                 (0xff << 16)
 #define        BCH_FLASHLAYOUT0_META_SIZE_OFFSET               16
 #define        BCH_FLASHLAYOUT0_NBLOCKS_OFFSET                 24
 #define        BCH_FLASHLAYOUT0_META_SIZE_MASK                 (0xff << 16)
 #define        BCH_FLASHLAYOUT0_META_SIZE_OFFSET               16
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
 #define        BCH_FLASHLAYOUT0_ECC0_MASK                      (0x1f << 11)
 #define        BCH_FLASHLAYOUT0_ECC0_OFFSET                    11
 #else
 #define        BCH_FLASHLAYOUT0_ECC0_MASK                      (0x1f << 11)
 #define        BCH_FLASHLAYOUT0_ECC0_OFFSET                    11
 #else
@@ -157,7 +157,7 @@ struct bch_regs {
 
 #define        BCH_FLASHLAYOUT1_PAGE_SIZE_MASK                 (0xffff << 16)
 #define        BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET               16
 
 #define        BCH_FLASHLAYOUT1_PAGE_SIZE_MASK                 (0xffff << 16)
 #define        BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET               16
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
 #define        BCH_FLASHLAYOUT1_ECCN_MASK                      (0x1f << 11)
 #define        BCH_FLASHLAYOUT1_ECCN_OFFSET                    11
 #else
 #define        BCH_FLASHLAYOUT1_ECCN_MASK                      (0x1f << 11)
 #define        BCH_FLASHLAYOUT1_ECCN_OFFSET                    11
 #else
index 07e687510dec3ba0f9edca4ecfe136addca6a6f0..0c729c2617c609ecbac09abb3f467a74b94083a1 100644 (file)
 #include <linux/kbuild.h>
 
 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX35) \
 #include <linux/kbuild.h>
 
 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX35) \
-       || defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+       || defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
 #include <asm/arch/imx-regs.h>
 #endif
 #include <asm/arch/imx-regs.h>
 #endif
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
 #include <asm/arch/crm_regs.h>
 #endif
 
 #include <asm/arch/crm_regs.h>
 #endif
 
@@ -200,7 +200,7 @@ int main(void)
        DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd));
        DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
 #endif
        DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd));
        DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
 #endif
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
        DEFINE(CCM_CCR, offsetof(struct mxc_ccm_reg, ccr));
        DEFINE(CCM_CCDR, offsetof(struct mxc_ccm_reg, ccdr));
        DEFINE(CCM_CSR, offsetof(struct mxc_ccm_reg, csr));
        DEFINE(CCM_CCR, offsetof(struct mxc_ccm_reg, ccr));
        DEFINE(CCM_CCDR, offsetof(struct mxc_ccm_reg, ccdr));
        DEFINE(CCM_CSR, offsetof(struct mxc_ccm_reg, csr));
index 29159a1bf76a3b110b5648843a7967a8d7a67095..c05124322208357fe2776d29011865fa6b48cea3 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6UL_14X14_EVK=y
 CONFIG_SPL=y
 CONFIG_TARGET_MX6UL_14X14_EVK=y
 CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6UL"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SOC_MX6UL"
index 150b6884902035cbc928302fb3ac773ecf44bdba..451f207ef43709d100fd5b2662788ad975e66c4d 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_128M"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_128M"
 CONFIG_ARM=y
+CONFIG_ARCH_MXS=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT=y
index 65a421b756d5ebdcce164f568fed481b6b6eccc1..f2686500525cc7b62f258006e2fc0d28e71398c6 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_128M"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_128M"
 CONFIG_ARM=y
+CONFIG_ARCH_MXS=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT_NOENV=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT_NOENV=y
index 9eeefca52da378707f0988c671ccd77120ff462b..b82bfd9507ba7b5cd8afc5d7c296cbda14f44d95 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_256M"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_256M"
 CONFIG_ARM=y
+CONFIG_ARCH_MXS=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT=y
index 5136c51d4b4c0afe60442cd08e8b92d38667681b..deef2c9356f5ea6407fcdd51c3b29aad37b0f730 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_256M"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_256M"
 CONFIG_ARM=y
+CONFIG_ARCH_MXS=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT_NOENV=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT_NOENV=y
index d92c8e2734657ed022ec5b673df3edde2a03c5a3..da4e1324bd24f181cdc23e627bd5faa93d93281a 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_128M,SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_128M,SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
+CONFIG_ARCH_MXS=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT=y
index 29a4f1098f1425e827d970ac3a639eabcf6e6bb6..d4c293a975e32151c24e72bb78b383f3d32d9071 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_128M,SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_128M,SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
+CONFIG_ARCH_MXS=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT_NOENV=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_40X1=y
 CONFIG_TX28_UBOOT_NOENV=y
index a4da654f495dda689b7465598abbf9da160f5d0d..118a6e0de565acebc92bfc071850b287bcf24f9d 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="TX28_S,SYS_SDRAM_SIZE=SZ_64M"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="TX28_S,SYS_SDRAM_SIZE=SZ_64M"
 CONFIG_ARM=y
+CONFIG_ARCH_MXS=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_41X0=y
 CONFIG_TX28_UBOOT=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_41X0=y
 CONFIG_TX28_UBOOT=y
index 79d642d5deff35e3a011f465e983b3cc35ddc917..3dc07657d15dcbe8c99e4c214729c2108df5d819 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="TX28_S,SYS_SDRAM_SIZE=SZ_64M"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="TX28_S,SYS_SDRAM_SIZE=SZ_64M"
 CONFIG_ARM=y
+CONFIG_ARCH_MXS=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_41X0=y
 CONFIG_TX28_UBOOT_NOENV=y
 CONFIG_TARGET_TX28=y
 CONFIG_TARGET_TX28_41X0=y
 CONFIG_TX28_UBOOT_NOENV=y
index 10e2091f167d210d63eea042f3cf57bd1a165ce1..e2e3eb2b56ee112a90780e9b795deb37c97bba9e 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_CPU_CLK=800"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_CPU_CLK=800"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX51=y
 CONFIG_TARGET_TX51_8XX0=y
 CONFIG_TX51_UBOOT=y
 CONFIG_TARGET_TX51=y
 CONFIG_TARGET_TX51_8XX0=y
 CONFIG_TX51_UBOOT=y
index efe981f6b5399de4fe33b13ac75e79a26f19c84f..66bd42ee2045a97809b210d67611263e3a9e0d38 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_CPU_CLK=800"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_CPU_CLK=800"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX51=y
 CONFIG_TARGET_TX51_8XX0=y
 CONFIG_TX51_UBOOT_NOENV=y
 CONFIG_TARGET_TX51=y
 CONFIG_TARGET_TX51_8XX0=y
 CONFIG_TX51_UBOOT_NOENV=y
index 9457ea47f82372de920624c2684ae8dc296f3fa3..bfe10ad9a33736aa95243cf91212e91beecc945c 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_CPU_CLK=800"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_CPU_CLK=800"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX51=y
 CONFIG_TARGET_TX51_8XX1_2=y
 CONFIG_TX51_UBOOT=y
 CONFIG_TARGET_TX51=y
 CONFIG_TARGET_TX51_8XX1_2=y
 CONFIG_TX51_UBOOT=y
index 99fb36b19cc8587a394d1764081c1920733d64e9..c56ec5c6976dd3d14a1d6266a5dcbd10c1370430 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_CPU_CLK=800"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_CPU_CLK=800"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX51=y
 CONFIG_TARGET_TX51_8XX1_2=y
 CONFIG_TX51_UBOOT_NOENV=y
 CONFIG_TARGET_TX51=y
 CONFIG_TARGET_TX51_8XX1_2=y
 CONFIG_TX51_UBOOT_NOENV=y
index d471f2814f7a6a51961896e301b8fa300d9055d0..e28f289bb67b4f60832d3823e4ac2c82692c4b28 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_2G"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_2G"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_1232=y
 CONFIG_TX53_UBOOT=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_1232=y
 CONFIG_TX53_UBOOT=y
index abbbe8bee246ef76268a0c528df6316cb9c5d8c6..cf8262891b09c3c295095470ef813565fd1a38b7 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_2G"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=SZ_2G"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_1232=y
 CONFIG_TX53_UBOOT_NOENV=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_1232=y
 CONFIG_TX53_UBOOT_NOENV=y
index 13139856a7f7283c24ab5361995b704b377d584e..6bc6ffa04901ef0d89c207aec4de59a22b4ff968 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_SDRAM_SIZE=SZ_2G"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_SDRAM_SIZE=SZ_2G"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_1232=y
 CONFIG_TX53_UBOOT=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_1232=y
 CONFIG_TX53_UBOOT=y
index a93032ef7781911b856ab18332dfacfa8e9b5378..024b0d21db6e16d1f392d19a64971295a084a474 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X030=y
 CONFIG_TX53_UBOOT=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X030=y
 CONFIG_TX53_UBOOT=y
index 97b8179bb3b7e770d517103e06f09c1c9d5704d4..5454824179fdac383702daa93ce8fd432f0d9107 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X030=y
 CONFIG_TX53_UBOOT_NOENV=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X030=y
 CONFIG_TX53_UBOOT_NOENV=y
index b2d7580ffc3ae80caaf8ac42977add7ff01a61a0..e41130104eab8d39ba8ecedf2ebb7674f9e802e4 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X030=y
 CONFIG_TX53_UBOOT=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X030=y
 CONFIG_TX53_UBOOT=y
index a9a276876b25a9d3f174b1b5b784a0ef6e6d67fc..2d4f7136eb5f528e4c19755a09fac6d6fe7a3333 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X130=y
 CONFIG_TX53_UBOOT=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X130=y
 CONFIG_TX53_UBOOT=y
index 0d44afa4d0a67f8a92cb6727aeeb838dfc8793bc..409fca50845dde5aa6aac0b83e6fce2df6397471 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X130=y
 CONFIG_TX53_UBOOT_NOENV=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X130=y
 CONFIG_TX53_UBOOT_NOENV=y
index f76a01f7a8d3b91a591bd767bb8ecfe4c276bd98..94bb7610cdfd4cb2463f5f54cff8a68f79d06b74 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X130=y
 CONFIG_TX53_UBOOT=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X130=y
 CONFIG_TX53_UBOOT=y
index 1b8dfa26ce29149531534e19f511ab7b5f57eed5..7b7ac1ad54a7400defa5ec3748e7dec30eb1308d 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X131=y
 CONFIG_TX53_UBOOT=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X131=y
 CONFIG_TX53_UBOOT=y
index 22db676750190fd38014880dc9fff6dfbcea8392..8462c3906f205a468637a91973b285db9b4e9fb0 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X131=y
 CONFIG_TX53_UBOOT_NOENV=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X131=y
 CONFIG_TX53_UBOOT_NOENV=y
index 9c920e2ee9d3ef76c80bfadb204d0dc1820ada5b..7514bcdac985a1551e7bc317ceed8aea9eeda48c 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX5=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X131=y
 CONFIG_TX53_UBOOT=y
 CONFIG_TARGET_TX53=y
 CONFIG_TARGET_TX53_X131=y
 CONFIG_TX53_UBOOT=y
index 6a236ef54a8008c4b48a69d3bdc937d2c7b2772c..cb762d7b47dda0241303a7a9d0ce2efdca91192f 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=4096,TX6_REV=0x2"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=4096,TX6_REV=0x2"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1020=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1020=y
 CONFIG_TX6_UBOOT=y
index 8c031e997bc2bce9eb9530668d5361139f907827..7ca7e98358aed169c810e848e0d892ebf493c6bd 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=4096,TX6_REV=0x2"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=4096,TX6_REV=0x2"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1020=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1020=y
 CONFIG_TX6_UBOOT_MFG=y
index 1a3d56018b8305430406048fa76afa2c84dc4fed..ef828a515e4c2487e275bf3ce434b891e01bb729 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=4096,TX6_REV=0x2"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=4096,TX6_REV=0x2"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1020=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1020=y
 CONFIG_TX6_UBOOT_NOENV=y
index 22f79409e9c233ddb961769c49a463799ffdc950..bc643ede10392afdc8d279f65550f7b0c8436a0d 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=4096,SECURE_BOOT,TX6_REV=0x2"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=4096,SECURE_BOOT,TX6_REV=0x2"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1020=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1020=y
 CONFIG_TX6_UBOOT=y
index 48ff97ddc7cffeeffead8cbc15c2a76cd9e335b4..bdee073f418ff4d4bc65aad7a40c6aadfc4f01fe 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1033=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1033=y
 CONFIG_TX6_UBOOT=y
index cc3ae3c986798df2b9ece75050f52fd06d4b65ab..e4bbf46038aba01c9926d1fc46dd8ec3cb86e753 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1033=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1033=y
 CONFIG_TX6_UBOOT_MFG=y
index eb4eb30f847d254d5a03f5dff3a5b3aee3facb55..82920de52205d810ec15d2d277002a0197713335 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1033=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1033=y
 CONFIG_TX6_UBOOT_NOENV=y
index b52c5b56e3383670154108881196dfd39712b095..e0e9c5cd2beccc8629625bb31e45337f88ae7224 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SECURE_BOOT"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SECURE_BOOT"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1033=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_1033=y
 CONFIG_TX6_UBOOT=y
index f0c76b3f93ba18627dc3a88801a0e55dddea24ac..eea31335de87f7a6ab07d21b30766c8bb345b41d 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_10X0=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_10X0=y
 CONFIG_TX6_UBOOT=y
index 6315aa113d62f5d34633ee85c38260cc96d62734..3e44d7fd45c78504a4ab225b1a26ec6ff880f5d2 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_10X0=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_10X0=y
 CONFIG_TX6_UBOOT_MFG=y
index 7995c644967db1c75a20864138855276664f6bc6..22e6f0b07e866197fd230dde969c757d55e04537 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_10X0=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_10X0=y
 CONFIG_TX6_UBOOT_NOENV=y
index b0e5233221619139882e2d57c171a9c02f51a93a..c3013fa704d683975ee4f5edaf437e19c3c1fbd0 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_10X0=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_10X0=y
 CONFIG_TX6_UBOOT=y
index 18479c6bac8cd737663584d1751cd987d6184787..b1bda302aded30564d0a01569aa5431d7b4244c1 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_11X0=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_11X0=y
 CONFIG_TX6_UBOOT=y
index 15fdfd348463c7f0d143634d84c3ca5fb5025c2b..31cc0290f0c4f8a7fdf810d6d218c3c1d27a3d1b 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_11X0=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_11X0=y
 CONFIG_TX6_UBOOT_MFG=y
index cf3b034d4c9ec67a52ca7e08875f3a20931b965a..0c7de7d044209c76c0ebbd110577db329eb7d640 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_11X0=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_11X0=y
 CONFIG_TX6_UBOOT_NOENV=y
index dc1ec3b9d2b1c87feb906f430d4abf9fe0ca66b5..3a3743aeb7fa07575029155f19c42c383611cb02 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_11X0=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6Q_11X0=y
 CONFIG_TX6_UBOOT=y
index a45cd33e39911f3e756575671f882cc62303947f..a9cf013eefbbaa136e18e6945f73a581e9eb32be 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=16"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=16"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8034=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8034=y
 CONFIG_TX6_UBOOT=y
index 77ef91328cc9838b81b49776d632d2f85a811da5..9911608ac1c4bb2acce8a4a2bfe400383694f36f 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=16"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=16"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8034=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8034=y
 CONFIG_TX6_UBOOT_MFG=y
index 766b4af5040eabaf13837e9c7c0be63b600c6474..70063605bf66b123ab3131ac172cf33865ed5b37 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=16"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=16"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8034=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8034=y
 CONFIG_TX6_UBOOT_NOENV=y
index a8098c0c70bf8d0c469c30531511e67a8893a1c8..1805933be09360a40eea5774cbff09030ff88ff5 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_SDRAM_BUS_WIDTH=16"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_SDRAM_BUS_WIDTH=16"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8034=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8034=y
 CONFIG_TX6_UBOOT=y
index 6c313a2a4f97836ffa224f47e7adbddcb1c8f85d..5b55780b22740b2b1f8c48cc067142aed3d7dfdd 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8035=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8035=y
 CONFIG_TX6_UBOOT=y
index cd874f95f9409a352cdbea956a270f6e342be35b..3221561896a2c4ed715eff5f9a6f05b91a99e79f 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8035=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8035=y
 CONFIG_TX6_UBOOT_MFG=y
index bd58824030e39a5c1eee9f4356f6f8649764cfb7..078ae7b802643b5e2c6c30c4a63ad829272dca95 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8035=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8035=y
 CONFIG_TX6_UBOOT_NOENV=y
index a1bb3a80a3adb027c1994cd67e8a8e1f2064abcb..5defc23cfa3e945671016be41120803bcfb37c5f 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SECURE_BOOT,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SECURE_BOOT,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8035=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6S_8035=y
 CONFIG_TX6_UBOOT=y
index a922a7e6ebe5f7b1d96de5e288035cca537bc28e..11217b26009a38109ec847096d9636629d231d92 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8011=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8011=y
 CONFIG_TX6_UBOOT=y
index b26766f8b2f788835acac61c3cf547c2573d31af..1b60863b3f49200692009cdda4cd4d6d343b21ee 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8011=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8011=y
 CONFIG_TX6_UBOOT_MFG=y
index 5c7779d41efcb3a85d0668471afc3cecb22ee406..be49108dc7940ffe0dbe223b66811a7d5ecb8ea4 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8011=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8011=y
 CONFIG_TX6_UBOOT_NOENV=y
index 709b729b232cab088c180938aff64c15d46636c1..fe190794c6ea4b7bf6965cb4a4f8717af82683cf 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8011=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8011=y
 CONFIG_TX6_UBOOT=y
index 1b9322a9c0c266a23c5ccbdf2f17a133a93e9ad0..de6e445e1fd10f7c42de454d86589f159754e688 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8012=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8012=y
 CONFIG_TX6_UBOOT=y
index da16c311eaa477251b2205e1e53fe39f2b85eb80..9224387c7dd810f04e996ecb53e4363da7528e7d 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8012=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8012=y
 CONFIG_TX6_UBOOT_MFG=y
index 7660732380da21ff708ce55763345fce580ff651..d35078ae877665a50dada2e4a0d10fd08b161273 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8012=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8012=y
 CONFIG_TX6_UBOOT_NOENV=y
index e6ee2139fd45e89d9849bf986637c7f33cb7da66..96672be5d80d84e6fd9a28de99338bf7732c2b0a 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_NAND_BLOCKS=2048"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8012=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8012=y
 CONFIG_TX6_UBOOT=y
index fe15be7bd0a4d51895c34c5a5e37fe8e4756f7d9..3b3ee92269f61deb917721483b87d65b4befb29a 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8033=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8033=y
 CONFIG_TX6_UBOOT=y
index 7ce1f10113b72b18e847343c2ce07294e91ebdf3..be28fe0ee8d7d81ef3fd12abf75775f352bb98a4 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8033=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8033=y
 CONFIG_TX6_UBOOT_MFG=y
index 313ca21bb540351f78408b03fce39e307b8bad1b..69c274bb5d8b4cededa90d55e789dcf1341ee664 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8033=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8033=y
 CONFIG_TX6_UBOOT_NOENV=y
index 34c29423b4271d4b6adb6106acb3cec63b171848..5e0a70a0928ee804a011fde8c83397d181e3e81d 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SECURE_BOOT"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="MMC_BOOT_SIZE=1024,SECURE_BOOT"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8033=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8033=y
 CONFIG_TX6_UBOOT=y
index 844d295199076246c29363ecf46310824f59fd29..c3e7ab4a4e2cda1f14fb64eab97470a01ad87c80 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_80X0=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_80X0=y
 CONFIG_TX6_UBOOT=y
index c05ccb431fd332f4939ed9b71762f7a08133e6b9..251f242ab2755e7d70afc9e175ecd5dfb3b99d5d 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_80X0=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_80X0=y
 CONFIG_TX6_UBOOT_MFG=y
index 4a43e3ce22f410dcc089c8a1d4f1418d9263959a..aa5a725e2ead6dacf2b2afdc8977f1ae6c303e1f 100644 (file)
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_80X0=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_80X0=y
 CONFIG_TX6_UBOOT_NOENV=y
index 6ba0144ed71fda144761abec3f578f7bcb6f2764..649bb67ef194383dc9e2cb8e3d021c9f6ad69dd1 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_80X0=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_80X0=y
 CONFIG_TX6_UBOOT=y
index 61874b3ea80891cb12170eefc9f3e909e1069200..4d67cd9c94b1cc9da2d38a2bc07edee0aa53abc3 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32,SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32,SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8111=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8111=y
 CONFIG_TX6_UBOOT=y
index 8bfab00ae4463c2e55ef0f6e0056e08c6a6c3371..00eb2841f37def9d708cf3413aab8e493492f40b 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32,SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32,SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8111=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8111=y
 CONFIG_TX6_UBOOT_MFG=y
index 90e893196903b8913bf7598e8b96df6c68b888ff..26637553ee096e44a88d9bcdec4f2556efb6c119 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32,SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_BUS_WIDTH=32,SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8111=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8111=y
 CONFIG_TX6_UBOOT_NOENV=y
index 731155401a2e45c51008d750d13d0c42e85f9cc4..29f827210fa58da97dd787b0c719d886d1d8c357 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF,SYS_SDRAM_BUS_WIDTH=32"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8111=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_8111=y
 CONFIG_TX6_UBOOT=y
index ce30a31639c4b5be8a69216df9b15ff9f8b6a158..208900ec4f50ef2493f69bd3822cb04e5d65b7d2 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_81X0=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_81X0=y
 CONFIG_TX6_UBOOT=y
index 44180dcd0b48d1697eeea295ef1b332a2917b8c0..95d47e645036afc82315c5c746143deae69aee1c 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_81X0=y
 CONFIG_TX6_UBOOT_MFG=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_81X0=y
 CONFIG_TX6_UBOOT_MFG=y
index fd87053e1a7965798024e270d58bc1eab28648c7..062566709dcadd1390921c2268f244e8db34b411 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_81X0=y
 CONFIG_TX6_UBOOT_NOENV=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_81X0=y
 CONFIG_TX6_UBOOT_NOENV=y
index 518019628b8e4f3dde016a9578370a2abb25e84f..bc34f3a56ebbc32a8d140d1ab6c89a86cffb958a 100644 (file)
@@ -1,5 +1,6 @@
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF"
 CONFIG_ARM=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT,SYS_LVDS_IF"
 CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_81X0=y
 CONFIG_TX6_UBOOT=y
 CONFIG_TARGET_TX6=y
 CONFIG_TARGET_TX6U_81X0=y
 CONFIG_TX6_UBOOT=y
index 5dae4c52e3d13a792406a880cfd23a097e7bd604..d155be5bf5a1eb2ec533d2a483f7ba6341ac6780 100644 (file)
@@ -562,7 +562,7 @@ int init_sata(int dev)
        u32 linkmap;
        struct ahci_probe_ent *probe_ent = NULL;
 
        u32 linkmap;
        struct ahci_probe_ent *probe_ent = NULL;
 
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
        if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
                return 1;
 #endif
        if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
                return 1;
 #endif
index 7c6f2f4b008d2e6167c286d0e2ab8936daf08274..fde909063fa40d3dc136c3b8f369a9ec278e6dc3 100644 (file)
@@ -1,6 +1,6 @@
 config APBH_DMA
        bool "Freescale MXS and i.MX6 APBH DMA support"
 config APBH_DMA
        bool "Freescale MXS and i.MX6 APBH DMA support"
-       depends on SOC_MX28 || SOC_MX6
+       depends on ARCH_MXS || ARCH_MX6
 
 config APBH_DMA_BURST
        bool "Enable DMA burst mode"
 
 config APBH_DMA_BURST
        bool "Enable DMA burst mode"
index 4c5732e76e4cffb4bcce8a411d3f98808569b134..02f994fc93a135fdb001db5c792cf2839e617076 100644 (file)
@@ -213,7 +213,7 @@ static int mxs_dma_reset(int channel)
 #if defined(CONFIG_SOC_MX23)
        uint32_t *setreg = &apbh_regs->hw_apbh_ctrl0_set;
        uint32_t offset = APBH_CTRL0_RESET_CHANNEL_OFFSET;
 #if defined(CONFIG_SOC_MX23)
        uint32_t *setreg = &apbh_regs->hw_apbh_ctrl0_set;
        uint32_t offset = APBH_CTRL0_RESET_CHANNEL_OFFSET;
-#elif (defined(CONFIG_SOC_MX28) || defined(CONFIG_SOC_MX6))
+#elif (defined(CONFIG_SOC_MX28) || defined(CONFIG_ARCH_MX6))
        uint32_t *setreg = &apbh_regs->hw_apbh_channel_ctrl_set;
        uint32_t offset = APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET;
 #endif
        uint32_t *setreg = &apbh_regs->hw_apbh_channel_ctrl_set;
        uint32_t offset = APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET;
 #endif
index 23568d56ba3821a6e3457eaa07efd2d992d9876e..38f0a6bffb14935becb2fd6cc98348269efd9f4f 100644 (file)
@@ -40,16 +40,16 @@ static unsigned long gpio_ports[] = {
        [1] = GPIO2_BASE_ADDR,
        [2] = GPIO3_BASE_ADDR,
 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX51) || \
        [1] = GPIO2_BASE_ADDR,
        [2] = GPIO3_BASE_ADDR,
 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX51) || \
-               defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+               defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
        [3] = GPIO4_BASE_ADDR,
 #endif
        [3] = GPIO4_BASE_ADDR,
 #endif
-#if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
        [4] = GPIO5_BASE_ADDR,
 #ifndef CONFIG_SOX_MX6UL
        [5] = GPIO6_BASE_ADDR,
 #endif
 #endif
        [4] = GPIO5_BASE_ADDR,
 #ifndef CONFIG_SOX_MX6UL
        [5] = GPIO6_BASE_ADDR,
 #endif
 #endif
-#if defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
 #ifndef CONFIG_SOC_MX6UL
        [6] = GPIO7_BASE_ADDR,
 #endif
 #ifndef CONFIG_SOC_MX6UL
        [6] = GPIO7_BASE_ADDR,
 #endif
@@ -360,14 +360,14 @@ static const struct mxc_gpio_plat mxc_plat[] = {
        { 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
        { 2, (struct gpio_regs *)GPIO3_BASE_ADDR },
 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX51) || \
        { 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
        { 2, (struct gpio_regs *)GPIO3_BASE_ADDR },
 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX51) || \
-               defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+               defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
        { 3, (struct gpio_regs *)GPIO4_BASE_ADDR },
 #endif
        { 3, (struct gpio_regs *)GPIO4_BASE_ADDR },
 #endif
-#if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
        { 4, (struct gpio_regs *)GPIO5_BASE_ADDR },
        { 5, (struct gpio_regs *)GPIO6_BASE_ADDR },
 #endif
        { 4, (struct gpio_regs *)GPIO5_BASE_ADDR },
        { 5, (struct gpio_regs *)GPIO6_BASE_ADDR },
 #endif
-#if defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
        { 6, (struct gpio_regs *)GPIO7_BASE_ADDR },
 #endif
 };
        { 6, (struct gpio_regs *)GPIO7_BASE_ADDR },
 #endif
 };
@@ -377,14 +377,14 @@ U_BOOT_DEVICES(mxc_gpios) = {
        { "gpio_mxc", &mxc_plat[1] },
        { "gpio_mxc", &mxc_plat[2] },
 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX51) || \
        { "gpio_mxc", &mxc_plat[1] },
        { "gpio_mxc", &mxc_plat[2] },
 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX51) || \
-               defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+               defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
        { "gpio_mxc", &mxc_plat[3] },
 #endif
        { "gpio_mxc", &mxc_plat[3] },
 #endif
-#if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
        { "gpio_mxc", &mxc_plat[4] },
        { "gpio_mxc", &mxc_plat[5] },
 #endif
        { "gpio_mxc", &mxc_plat[4] },
        { "gpio_mxc", &mxc_plat[5] },
 #endif
-#if defined(CONFIG_SOC_MX53) || defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
        { "gpio_mxc", &mxc_plat[6] },
 #endif
 };
        { "gpio_mxc", &mxc_plat[6] },
 #endif
 };
index 00fbc2e2ff287b463008c34859945f5e56298a19..c2a8be5581c9ba299c70fd8fa19c6fd4354819b6 100644 (file)
@@ -69,11 +69,11 @@ config FSL_SEC_MON
 
 config MXC_OCOTP
        bool "Freescale OCOTP support"
 
 config MXC_OCOTP
        bool "Freescale OCOTP support"
-       depends on SOC_MX5 || SOC_MX6
+       depends on ARCH_MX5 || ARCH_MX6
 
 config MXS_OCOTP
        bool "Freescale OCOTP support"
 
 config MXS_OCOTP
        bool "Freescale OCOTP support"
-       depends on SOC_MXS
+       depends on ARCH_MXS
 
 config PCA9551_LED
        bool "Enable PCA9551 LED driver"
 
 config PCA9551_LED
        bool "Enable PCA9551 LED driver"
index d559e90294976eb2dd73d0469c9e7b9dcfff53bc..b6a1103974f873ab5e95366f432768bef45db5c3 100644 (file)
@@ -28,11 +28,11 @@ config FSL_ESDHC
 
 config FSL_USDHC
        bool "Support USDHC"
 
 config FSL_USDHC
        bool "Support USDHC"
-       depends on FSL_ESDHC && SOC_MX6
+       depends on FSL_ESDHC && ARCH_MX6
 
 config MXS_MMC
        bool "i.MXS MMC/SDHC controller"
 
 config MXS_MMC
        bool "i.MXS MMC/SDHC controller"
-       depends on SOC_MXS || SOC_MX6
+       depends on ARCH_MXS || ARCH_MX6
        select GENERIC_MMC
        select BOUNCE_BUFFER
 
        select GENERIC_MMC
        select BOUNCE_BUFFER
 
index 9f68de3b6deb8a207036efbd9ff5c2e639abb299..2ef3426d02d09940dad2e8491c9d3ebfb8fb2c12 100644 (file)
@@ -136,7 +136,7 @@ config NAND_MXS
 
 config NAND_MXS_NO_BBM_SWAP
        bool "disable bad block mark swapping"
 
 config NAND_MXS_NO_BBM_SWAP
        bool "disable bad block mark swapping"
-       depends on NAND_MXS && SOC_MX6
+       depends on NAND_MXS && ARCH_MX6
        select SYS_NAND_USE_FLASH_BBT
 
 endif
        select SYS_NAND_USE_FLASH_BBT
 
 endif
index 3fdcebd5d97fa5da3a57d194d503c67da2a39588..43817802239849044e6b866f63dd01c2a9bb160d 100644 (file)
@@ -31,7 +31,7 @@
 #define        MXS_NAND_DMA_DESCRIPTOR_COUNT           4
 
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE          512
 #define        MXS_NAND_DMA_DESCRIPTOR_COUNT           4
 
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE          512
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT    2
 #else
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT    0
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT    2
 #else
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT    0
index 8933a6f47c0664ecc6bed70614ee1c8d13e17b5a..2b8944ad6ec729cd062747b31aeec0a04aacf7ab 100644 (file)
@@ -56,7 +56,7 @@
 #define UCMD_RUN_STOP           (1 << 0) /* controller run/stop */
 #define UCMD_RESET             (1 << 1) /* controller reset */
 
 #define UCMD_RUN_STOP           (1 << 0) /* controller run/stop */
 #define UCMD_RESET             (1 << 1) /* controller reset */
 
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
 static const unsigned phy_bases[] = {
        USB_PHY0_BASE_ADDR,
        USB_PHY1_BASE_ADDR,
 static const unsigned phy_bases[] = {
        USB_PHY0_BASE_ADDR,
        USB_PHY1_BASE_ADDR,
@@ -253,7 +253,7 @@ int usb_phy_mode(int port)
 
 static void usb_oc_config(int index)
 {
 
 static void usb_oc_config(int index)
 {
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
        struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
                        USB_OTHERREGS_OFFSET);
        void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]);
        struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR +
                        USB_OTHERREGS_OFFSET);
        void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]);
@@ -270,7 +270,7 @@ static void usb_oc_config(int index)
        setbits_le32(ctrl, UCTRL_OVER_CUR_POL);
 #endif
 
        setbits_le32(ctrl, UCTRL_OVER_CUR_POL);
 #endif
 
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
        setbits_le32(ctrl, UCTRL_OVER_CUR_DIS);
 #elif defined(CONFIG_SOC_MX7)
        setbits_le32(ctrl, UCTRL_OVER_CUR_DIS | UCTRL_PM);
        setbits_le32(ctrl, UCTRL_OVER_CUR_DIS);
 #elif defined(CONFIG_SOC_MX7)
        setbits_le32(ctrl, UCTRL_OVER_CUR_DIS | UCTRL_PM);
@@ -327,7 +327,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
                struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
        enum usb_init_type type;
                struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
        enum usb_init_type type;
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
        u32 controller_spacing = 0x200;
 #elif defined(CONFIG_SOC_MX7)
        u32 controller_spacing = 0x10000;
        u32 controller_spacing = 0x200;
 #elif defined(CONFIG_SOC_MX7)
        u32 controller_spacing = 0x10000;
@@ -346,7 +346,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
        usb_power_config(index);
        usb_oc_config(index);
 
        usb_power_config(index);
        usb_oc_config(index);
 
-#if defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_ARCH_MX6)
        usb_internal_phy_clock_gate(index, 1);
        usb_phy_enable(index, ehci);
 #endif
        usb_internal_phy_clock_gate(index, 1);
        usb_phy_enable(index, ehci);
 #endif
index 83bdddc28d1c0fe74d4354a28ec3f2e4af923a9d..80adf845e4ebc688806b322db4973e906ff1ab52 100644 (file)
@@ -1,7 +1,7 @@
 config HW_WATCHDOG
        bool "Generic SoC specific watchdog support"
 config HW_WATCHDOG
        bool "Generic SoC specific watchdog support"
-       depends on !SOC_MX6
+       depends on !ARCH_MX6
 
 config IMX_WATCHDOG
        bool "Freescale i.MX watchdog support"
 
 config IMX_WATCHDOG
        bool "Freescale i.MX watchdog support"
-       depends on SOC_MX31 || SOC_MX35 || SOC_MX5 || SOC_MX6 || SOC_VF610 || SOC_LS102XA
+       depends on SOC_MX31 || SOC_MX35 || ARCH_MX5 || ARCH_MX6 || SOC_VF610 || SOC_LS102XA
index 800bd0ae656484aa344f1cc31743fd63b0393703..22ed1aa30f4374fc1fd4fa8262450d4ae010fefb 100644 (file)
@@ -147,7 +147,7 @@ typedef struct ccsr_sec {
 #define CONFIG_JRSTARTR_JR0            0x00000001
 
 struct jr_regs {
 #define CONFIG_JRSTARTR_JR0            0x00000001
 
 struct jr_regs {
-#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_ARCH_MX6)
        u32 irba_l;
        u32 irba_h;
 #else
        u32 irba_l;
        u32 irba_h;
 #else
@@ -160,7 +160,7 @@ struct jr_regs {
        u32 irsa;
        u32 rsvd3;
        u32 irja;
        u32 irsa;
        u32 rsvd3;
        u32 irja;
-#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_ARCH_MX6)
        u32 orba_l;
        u32 orba_h;
 #else
        u32 orba_l;
        u32 orba_h;
 #else
@@ -192,7 +192,7 @@ struct jr_regs {
  * related information
  */
 struct sg_entry {
  * related information
  */
 struct sg_entry {
-#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_SOC_MX6)
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_ARCH_MX6)
        uint32_t addr_lo;       /* Memory Address - lo */
        uint16_t addr_hi;       /* Memory Address of start of buffer - hi */
        uint16_t reserved_zero;
        uint32_t addr_lo;       /* Memory Address - lo */
        uint16_t addr_hi;       /* Memory Address of start of buffer - hi */
        uint16_t reserved_zero;
@@ -213,7 +213,7 @@ struct sg_entry {
 #define SG_ENTRY_OFFSET_SHIFT  0
 };
 
 #define SG_ENTRY_OFFSET_SHIFT  0
 };
 
-#ifdef CONFIG_SOC_MX6
+#ifdef CONFIG_ARCH_MX6
 /* CAAM Job Ring 0 Registers */
 /* Secure Memory Partition Owner register */
 #define SMCSJR_PO              (3 << 6)
 /* CAAM Job Ring 0 Registers */
 /* Secure Memory Partition Owner register */
 #define SMCSJR_PO              (3 << 6)