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am33xx: elm: fix clearing of irqstatus bits
authorLothar Waßmann <LW@KARO-electronics.de>
Fri, 6 May 2016 14:19:04 +0000 (16:19 +0200)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 6 May 2016 14:19:04 +0000 (16:19 +0200)
The irqstatus bits are cleared by writing a '1' to the irqstatus
register. Change bogus RMW register access to a simple write of the
bitmask to be cleared.


No differences found
UBoot for KaRo TX COM modules