From: Lothar Waßmann <LW@KARO-electronics.de>
Date: Wed, 30 Jan 2019 12:25:45 +0000 (+0100)
Subject: karo: txul: fix LDO4 output voltage
X-Git-Tag: KARO-TX6-2019-07-31~13
X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=commitdiff_plain;h=03e74e4d42ff4a67a607eb7f687d66bbbb6914ef;hp=a0769f87144b75572ac6c347f1be6560160a4f09

karo: txul: fix LDO4 output voltage

Currently the LDO4 which supplies the pins of the CSI interface is
programmed for a voltage of 1.8V (default setting for this LDO of the
RN5T567).
Change this to 3.3V to match the specification of the TXUL modules.
Also configure the sleep state voltages for the LDOs.
---

diff --git a/board/karo/tx6/rn5t567.h b/board/karo/tx6/rn5t567.h
index 4ab1b0232a..e3ada695e8 100644
--- a/board/karo/tx6/rn5t567.h
+++ b/board/karo/tx6/rn5t567.h
@@ -43,6 +43,11 @@
 #define RN5T567_LDO4DAC		0x4f
 #define RN5T567_LDO5DAC		0x50
 #define RN5T567_LDORTC1DAC	0x56 /* VBACKUP */
+#define RN5T567_LDO1DAC_SLP	0x58
+#define RN5T567_LDO2DAC_SLP	0x59
+#define RN5T567_LDO3DAC_SLP	0x5a
+#define RN5T567_LDO4DAC_SLP	0x5b
+#define RN5T567_LDO5DAC_SLP	0x5c
 #define RN5T567_IOSEL		0x90
 #define RN5T567_IOOUT		0x91
 #define RN5T567_GPEDGE1		0x92
diff --git a/board/karo/tx6/tx6ul.c b/board/karo/tx6/tx6ul.c
index 12e8087956..6d3022ab83 100644
--- a/board/karo/tx6/tx6ul.c
+++ b/board/karo/tx6/tx6ul.c
@@ -439,8 +439,8 @@ static inline u8 tx6ul_mem_suffix(void)
 #define VDD_ADC_VAL_LP		rn5t_mV_to_regval2(3300)
 #define VDD_PMIC_VAL		rn5t_mV_to_regval2(2500)	/* LDO3 */
 #define VDD_PMIC_VAL_LP		rn5t_mV_to_regval2(2500)
-#define VDD_CSI_VAL		rn5t_mV_to_regval2(1800)	/* LDO4 */
-#define VDD_CSI_VAL_LP		rn5t_mV_to_regval2(1800)
+#define VDD_CSI_VAL		rn5t_mV_to_regval2(3300)	/* LDO4 */
+#define VDD_CSI_VAL_LP		rn5t_mV_to_regval2(3300)
 
 static struct pmic_regs rn5t567_regs[] = {
 	{ RN5T567_NOETIMSET, NOETIMSET_DIS_OFF_NOE_TIM | 0x5, },
@@ -460,6 +460,10 @@ static struct pmic_regs rn5t567_regs[] = {
 	{ RN5T567_LDO2DAC, VDD_ADC_VAL, },
 	{ RN5T567_LDO3DAC, VDD_PMIC_VAL, },
 	{ RN5T567_LDO4DAC, VDD_CSI_VAL, },
+	{ RN5T567_LDO1DAC_SLP, VDD_IO_INT_VAL_LP, },
+	{ RN5T567_LDO2DAC_SLP, VDD_ADC_VAL_LP, },
+	{ RN5T567_LDO3DAC_SLP, VDD_PMIC_VAL_LP, },
+	{ RN5T567_LDO4DAC_SLP, VDD_CSI_VAL_LP, },
 	{ RN5T567_LDOEN1, 0x0f, ~0x1f, },
 	{ RN5T567_LDOEN2, 0x10, ~0x30, },
 	{ RN5T567_LDODIS, 0x10, ~0x1f, },