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1 /*
2  * (C) Copyright 2009
3  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4  * Changes for multibus/multiadapter I2C support.
5  *
6  * (C) Copyright 2001, 2002
7  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  *
27  * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
28  * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
29  * Neil Russell.
30  */
31
32 #include <common.h>
33 #ifdef  CONFIG_MPC8260                  /* only valid for MPC8260 */
34 #include <ioports.h>
35 #include <asm/io.h>
36 #endif
37 #if defined(CONFIG_AVR32)
38 #include <asm/arch/portmux.h>
39 #endif
40 #if defined(CONFIG_AT91FAMILY)
41 #include <asm/io.h>
42 #include <asm/arch/hardware.h>
43 #include <asm/arch/at91_pio.h>
44 #ifdef CONFIG_AT91_LEGACY
45 #include <asm/arch/gpio.h>
46 #endif
47 #endif
48 #ifdef  CONFIG_IXP425                   /* only valid for IXP425 */
49 #include <asm/arch/ixp425.h>
50 #endif
51 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
52 #include <asm/io.h>
53 #endif
54 #include <i2c.h>
55
56 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
57 # include <asm/gpio.h>
58
59 # ifndef I2C_GPIO_SYNC
60 #  define I2C_GPIO_SYNC
61 # endif
62
63 # ifndef I2C_INIT
64 #  define I2C_INIT \
65         do { \
66                 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
67                 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
68         } while (0)
69 # endif
70
71 # ifndef I2C_ACTIVE
72 #  define I2C_ACTIVE do { } while (0)
73 # endif
74
75 # ifndef I2C_TRISTATE
76 #  define I2C_TRISTATE do { } while (0)
77 # endif
78
79 # ifndef I2C_READ
80 #  define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
81 # endif
82
83 # ifndef I2C_SDA
84 #  define I2C_SDA(bit) \
85         do { \
86                 if (bit) \
87                         gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
88                 else \
89                         gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
90                 I2C_GPIO_SYNC; \
91         } while (0)
92 # endif
93
94 # ifndef I2C_SCL
95 #  define I2C_SCL(bit) \
96         do { \
97                 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
98                 I2C_GPIO_SYNC; \
99         } while (0)
100 # endif
101
102 # ifndef I2C_DELAY
103 #  define I2C_DELAY udelay(5)   /* 1/4 I2C clock duration */
104 # endif
105
106 #endif
107
108 /* #define      DEBUG_I2C       */
109
110 DECLARE_GLOBAL_DATA_PTR;
111
112 #ifndef I2C_SOFT_DECLARATIONS
113 # if defined(CONFIG_MPC8260)
114 #  define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = \
115                 ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
116 # elif defined(CONFIG_8xx)
117 #  define I2C_SOFT_DECLARATIONS volatile immap_t *immr = \
118                 (immap_t *)CONFIG_SYS_IMMR;
119 # else
120 #  define I2C_SOFT_DECLARATIONS
121 # endif
122 #endif
123
124 #if !defined(CONFIG_SYS_SOFT_I2C_SPEED)
125 #define CONFIG_SYS_SOFT_I2C_SPEED CONFIG_SYS_I2C_SPEED
126 #endif
127 #if !defined(CONFIG_SYS_SOFT_I2C_SLAVE)
128 #define CONFIG_SYS_SOFT_I2C_SLAVE CONFIG_SYS_I2C_SLAVE
129 #endif
130
131 /*-----------------------------------------------------------------------
132  * Definitions
133  */
134 #define RETRIES         0
135
136 #define I2C_ACK         0               /* PD_SDA level to ack a byte */
137 #define I2C_NOACK       1               /* PD_SDA level to noack a byte */
138
139
140 #ifdef DEBUG_I2C
141 #define PRINTD(fmt,args...)     do {    \
142                 printf (fmt ,##args);   \
143         } while (0)
144 #else
145 #define PRINTD(fmt,args...)
146 #endif
147
148 /*-----------------------------------------------------------------------
149  * Local functions
150  */
151 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
152 static void  send_reset (void);
153 #endif
154 static void  send_start (void);
155 static void  send_stop  (void);
156 static void  send_ack   (int);
157 static int   write_byte (uchar byte);
158 static uchar read_byte  (int);
159
160 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
161 /*-----------------------------------------------------------------------
162  * Send a reset sequence consisting of 9 clocks with the data signal high
163  * to clock any confused device back into an idle state.  Also send a
164  * <stop> at the end of the sequence for belts & suspenders.
165  */
166 static void send_reset(void)
167 {
168         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
169         int j;
170
171         I2C_SCL(1);
172         I2C_SDA(1);
173 #ifdef  I2C_INIT
174         I2C_INIT;
175 #endif
176         I2C_TRISTATE;
177         for(j = 0; j < 9; j++) {
178                 I2C_SCL(0);
179                 I2C_DELAY;
180                 I2C_DELAY;
181                 I2C_SCL(1);
182                 I2C_DELAY;
183                 I2C_DELAY;
184         }
185         send_stop();
186         I2C_TRISTATE;
187 }
188 #endif
189
190 /*-----------------------------------------------------------------------
191  * START: High -> Low on SDA while SCL is High
192  */
193 static void send_start(void)
194 {
195         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
196
197         I2C_DELAY;
198         I2C_SDA(1);
199         I2C_ACTIVE;
200         I2C_DELAY;
201         I2C_SCL(1);
202         I2C_DELAY;
203         I2C_SDA(0);
204         I2C_DELAY;
205 }
206
207 /*-----------------------------------------------------------------------
208  * STOP: Low -> High on SDA while SCL is High
209  */
210 static void send_stop(void)
211 {
212         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
213
214         I2C_SCL(0);
215         I2C_DELAY;
216         I2C_SDA(0);
217         I2C_ACTIVE;
218         I2C_DELAY;
219         I2C_SCL(1);
220         I2C_DELAY;
221         I2C_SDA(1);
222         I2C_DELAY;
223         I2C_TRISTATE;
224 }
225
226 /*-----------------------------------------------------------------------
227  * ack should be I2C_ACK or I2C_NOACK
228  */
229 static void send_ack(int ack)
230 {
231         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
232
233         I2C_SCL(0);
234         I2C_DELAY;
235         I2C_ACTIVE;
236         I2C_SDA(ack);
237         I2C_DELAY;
238         I2C_SCL(1);
239         I2C_DELAY;
240         I2C_DELAY;
241         I2C_SCL(0);
242         I2C_DELAY;
243 }
244
245 /*-----------------------------------------------------------------------
246  * Send 8 bits and look for an acknowledgement.
247  */
248 static int write_byte(uchar data)
249 {
250         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
251         int j;
252         int nack;
253
254         I2C_ACTIVE;
255         for(j = 0; j < 8; j++) {
256                 I2C_SCL(0);
257                 I2C_DELAY;
258                 I2C_SDA(data & 0x80);
259                 I2C_DELAY;
260                 I2C_SCL(1);
261                 I2C_DELAY;
262                 I2C_DELAY;
263
264                 data <<= 1;
265         }
266
267         /*
268          * Look for an <ACK>(negative logic) and return it.
269          */
270         I2C_SCL(0);
271         I2C_DELAY;
272         I2C_SDA(1);
273         I2C_TRISTATE;
274         I2C_DELAY;
275         I2C_SCL(1);
276         I2C_DELAY;
277         I2C_DELAY;
278         nack = I2C_READ;
279         I2C_SCL(0);
280         I2C_DELAY;
281         I2C_ACTIVE;
282
283         return(nack);   /* not a nack is an ack */
284 }
285
286 /*-----------------------------------------------------------------------
287  * if ack == I2C_ACK, ACK the byte so can continue reading, else
288  * send I2C_NOACK to end the read.
289  */
290 static uchar read_byte(int ack)
291 {
292         I2C_SOFT_DECLARATIONS   /* intentional without ';' */
293         int  data;
294         int  j;
295
296         /*
297          * Read 8 bits, MSB first.
298          */
299         I2C_TRISTATE;
300         I2C_SDA(1);
301         data = 0;
302         for(j = 0; j < 8; j++) {
303                 I2C_SCL(0);
304                 I2C_DELAY;
305                 I2C_SCL(1);
306                 I2C_DELAY;
307                 data <<= 1;
308                 data |= I2C_READ;
309                 I2C_DELAY;
310         }
311         send_ack(ack);
312
313         return(data);
314 }
315
316 /*-----------------------------------------------------------------------
317  * Initialization
318  */
319 static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
320 {
321 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
322         /* call board specific i2c bus reset routine before accessing the   */
323         /* environment, which might be in a chip on that bus. For details   */
324         /* about this problem see doc/I2C_Edge_Conditions.                  */
325         i2c_init_board();
326 #else
327         /*
328          * WARNING: Do NOT save speed in a static variable: if the
329          * I2C routines are called before RAM is initialized (to read
330          * the DIMM SPD, for instance), RAM won't be usable and your
331          * system will crash.
332          */
333         send_reset ();
334 #endif
335 }
336
337 /*-----------------------------------------------------------------------
338  * Probe to see if a chip is present.  Also good for checking for the
339  * completion of EEPROM writes since the chip stops responding until
340  * the write completes (typically 10mSec).
341  */
342 static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
343 {
344         int rc;
345
346         /*
347          * perform 1 byte write transaction with just address byte
348          * (fake write)
349          */
350         send_start();
351         rc = write_byte ((addr << 1) | 0);
352         send_stop();
353
354         return (rc ? 1 : 0);
355 }
356
357 /*-----------------------------------------------------------------------
358  * Read bytes
359  */
360 static int  soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
361                         int alen, uchar *buffer, int len)
362 {
363         int shift;
364         PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
365                 chip, addr, alen, buffer, len);
366
367 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
368         /*
369          * EEPROM chips that implement "address overflow" are ones
370          * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
371          * address and the extra bits end up in the "chip address"
372          * bit slots. This makes a 24WC08 (1Kbyte) chip look like
373          * four 256 byte chips.
374          *
375          * Note that we consider the length of the address field to
376          * still be one byte because the extra address bits are
377          * hidden in the chip address.
378          */
379         chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
380
381         PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
382                 chip, addr);
383 #endif
384
385         /*
386          * Do the addressing portion of a write cycle to set the
387          * chip's address pointer.  If the address length is zero,
388          * don't do the normal write cycle to set the address pointer,
389          * there is no address pointer in this chip.
390          */
391         send_start();
392         if(alen > 0) {
393                 if(write_byte(chip << 1)) {     /* write cycle */
394                         send_stop();
395                         PRINTD("i2c_read, no chip responded %02X\n", chip);
396                         return(1);
397                 }
398                 shift = (alen-1) * 8;
399                 while(alen-- > 0) {
400                         if(write_byte(addr >> shift)) {
401                                 PRINTD("i2c_read, address not <ACK>ed\n");
402                                 return(1);
403                         }
404                         shift -= 8;
405                 }
406
407                 /* Some I2C chips need a stop/start sequence here,
408                  * other chips don't work with a full stop and need
409                  * only a start.  Default behaviour is to send the
410                  * stop/start sequence.
411                  */
412 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
413                 send_start();
414 #else
415                 send_stop();
416                 send_start();
417 #endif
418         }
419         /*
420          * Send the chip address again, this time for a read cycle.
421          * Then read the data.  On the last byte, we do a NACK instead
422          * of an ACK(len == 0) to terminate the read.
423          */
424         write_byte((chip << 1) | 1);    /* read cycle */
425         while(len-- > 0) {
426                 *buffer++ = read_byte(len == 0);
427         }
428         send_stop();
429         return(0);
430 }
431
432 /*-----------------------------------------------------------------------
433  * Write bytes
434  */
435 static int  soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
436                         int alen, uchar *buffer, int len)
437 {
438         int shift, failures = 0;
439
440         PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
441                 chip, addr, alen, buffer, len);
442
443         send_start();
444         if(write_byte(chip << 1)) {     /* write cycle */
445                 send_stop();
446                 PRINTD("i2c_write, no chip responded %02X\n", chip);
447                 return(1);
448         }
449         shift = (alen-1) * 8;
450         while(alen-- > 0) {
451                 if(write_byte(addr >> shift)) {
452                         PRINTD("i2c_write, address not <ACK>ed\n");
453                         return(1);
454                 }
455                 shift -= 8;
456         }
457
458         while(len-- > 0) {
459                 if(write_byte(*buffer++)) {
460                         failures++;
461                 }
462         }
463         send_stop();
464         return(failures);
465 }
466
467 /*
468  * Register soft i2c adapters
469  */
470 U_BOOT_I2C_ADAP_COMPLETE(soft0, soft_i2c_init, soft_i2c_probe,
471                          soft_i2c_read, soft_i2c_write, NULL,
472                          CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
473                          0)
474 #if defined(I2C_SOFT_DECLARATIONS2)
475 U_BOOT_I2C_ADAP_COMPLETE(soft1, soft_i2c_init, soft_i2c_probe,
476                          soft_i2c_read, soft_i2c_write, NULL,
477                          CONFIG_SYS_I2C_SOFT_SPEED_2,
478                          CONFIG_SYS_I2C_SOFT_SLAVE_2,
479                          1)
480 #endif
481 #if defined(I2C_SOFT_DECLARATIONS3)
482 U_BOOT_I2C_ADAP_COMPLETE(soft2, soft_i2c_init, soft_i2c_probe,
483                          soft_i2c_read, soft_i2c_write, NULL,
484                          CONFIG_SYS_I2C_SOFT_SPEED_3,
485                          CONFIG_SYS_I2C_SOFT_SLAVE_3,
486                          2)
487 #endif
488 #if defined(I2C_SOFT_DECLARATIONS4)
489 U_BOOT_I2C_ADAP_COMPLETE(soft3, soft_i2c_init, soft_i2c_probe,
490                          soft_i2c_read, soft_i2c_write, NULL,
491                          CONFIG_SYS_I2C_SOFT_SPEED_4,
492                          CONFIG_SYS_I2C_SOFT_SLAVE_4,
493                          3)
494 #endif