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11 years agoENGR00256315-4 ARM: imx6: weim-nor: set proper PAD value
Huang Shijie [Mon, 1 Apr 2013 05:54:09 +0000 (13:54 +0800)]
ENGR00256315-4 ARM: imx6: weim-nor: set proper PAD value

Set the proper pad values for the pins used for address.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00256315-3 ARM: WEIM-NOR: set the proper timing
Huang Shijie [Fri, 22 Mar 2013 07:14:08 +0000 (15:14 +0800)]
ENGR00256315-3 ARM: WEIM-NOR: set the proper timing

These timings are calculated from the M29W256GL7AN6E.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00256315-2 Revert "ENGR00244769-1 [NOR FLASH]-Improve WEIM NOR speed"
Huang Shijie [Tue, 26 Mar 2013 05:50:03 +0000 (13:50 +0800)]
ENGR00256315-2 Revert "ENGR00244769-1 [NOR FLASH]-Improve WEIM NOR speed"

This reverts commit 4020b38fe2f0283af7630dbed28ed32d64118a83.

After apply these two patches, we can not pass the stress test.
So revert these two patches.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00256315-1 Revert "ENGR00244769-2 [NOR FLASH]-Improve WEIM NOR speed"
Huang Shijie [Tue, 26 Mar 2013 05:49:37 +0000 (13:49 +0800)]
ENGR00256315-1 Revert "ENGR00244769-2 [NOR FLASH]-Improve WEIM NOR speed"

This reverts commit 58209e14383520d58b1bf74e0e9f98f7d05b80c6.

After apply these two patches, we can not pass the stress test.
So revert these two patches.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00256893-2 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is active
Ranjani Vaidyanathan [Mon, 1 Apr 2013 21:03:31 +0000 (16:03 -0500)]
ENGR00256893-2 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is active

All of the interrupts from the ENET block are not routed to
the GPC block. Hence ENET interrupts are not able to wake
up the SOC when the system is in WAIT mode. And the ENET
interrupt gets serviced only when another interrupt causes
the SOC to exit WAIT mode. This impacts the ENET performance.

To fix the issue two options:
1. Route the ENET interrupt to a GPIO. Need to enable the
CONFIG_MX6_ENET_IRQ_TO_GPIO in the config.
This patch provides support for routing the ENET interrupt
to GPIO_1_6. Routing to this GPIO requires no HW board mods.
If the GPIO_1_6 is being used for some other peripheral,
this patch can be followed to route the ENET interrupt to
any other GPIO though a HW mode maybe required.
2. If the GPIO mechanism cannot be used and is not enabled
by the above mentioned config, the patch will disable entry
to WAIT mode until ENET clock is active. When the ENET clock
is disabled, WAIT mode will be automatically enetered.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00256893-1 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is active
Ranjani Vaidyanathan [Mon, 1 Apr 2013 21:02:35 +0000 (16:02 -0500)]
ENGR00256893-1 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is active

All of the interrupts from the ENET block are not routed to
the GPC block. Hence ENET interrupts are not able to wake
up the SOC when the system is in WAIT mode. And the ENET
interrupt gets serviced only when another interrupt causes
the SOC to exit WAIT mode. This impacts the ENET performance.

To fix the issue two options:
1. Route the ENET interrupt to a GPIO. Need to enable the
CONFIG_MX6_ENET_IRQ_TO_GPIO in the config.
This patch provides support for routing the ENET interrupt
to GPIO_1_6. Routing to this GPIO requires no HW board mods.
If the GPIO_1_6 is being used for some other peripheral,
this patch can be followed to route the ENET interrupt to
any other GPIO though a HW mode maybe required.
2. If the GPIO mechanism cannot be used and is not enabled
by the above mentioned config, the patch will disable entry
to WAIT mode until ENET clock is active. When the ENET clock
is disabled, WAIT mode will be automatically enetered.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
11 years agoENGR00256933 ASoC: WM8962: Add delay after FLL-enable
Nicolin Chen [Tue, 2 Apr 2013 07:27:01 +0000 (15:27 +0800)]
ENGR00256933 ASoC: WM8962: Add delay after FLL-enable

  There's a start-up time after FLL_ENA bit is set. While the driver didn't
run the delay code which already exists in the set_fll() function.
  This patch let the driver run into the delay section, and made it work more
perfectly.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoENGR00256310 ASoC: imx-wm8962: Fix playback abnormally slower issue
Nicolin Chen [Tue, 2 Apr 2013 05:39:25 +0000 (13:39 +0800)]
ENGR00256310 ASoC: imx-wm8962: Fix playback abnormally slower issue

  Previously, we didn't close FLL after playback/capture, which might cause
FLL work werid after a long time suspend.
  This patch manually disables FLL after playback/capture.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoASoC: wm8962: Don't automatically enable and disable FLL
Mark Brown [Fri, 27 Jan 2012 19:54:03 +0000 (19:54 +0000)]
ASoC: wm8962: Don't automatically enable and disable FLL

Only enable and disable the FLL when explicitly told to, supporting some
additional use cases and making the driver behaviour more standard.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
(cherry picked from commit a968d9db3b3a9329587b09bd15f4981473c63a9d)

11 years agoENGR00256543 mx6: Update equation for thermal sensor on i.MX6DL
Anson Huang [Fri, 29 Mar 2013 01:44:41 +0000 (09:44 +0800)]
ENGR00256543 mx6: Update equation for thermal sensor on i.MX6DL

Use universal equation and 25C's calibration data to
get thermal sensor's ratio on i.MX6DL.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00256820-2 ASoC: imx-wm8962: Fix incorrect setting of wm8962's FLL source
Nicolin Chen [Mon, 1 Apr 2013 09:52:17 +0000 (17:52 +0800)]
ENGR00256820-2 ASoC: imx-wm8962: Fix incorrect setting of wm8962's FLL source

  WM8962's internal FLL is sourced from MCLK on SabreSD, while the machine
driver set its source to OSC, which's definitely wrong.
  So This patch changed its source to MCLK to prevent some potential issue.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoENGR00256820-1 ASoC: WM8962: revert FLL-disable before FLL-setting
Nicolin Chen [Mon, 1 Apr 2013 09:51:30 +0000 (17:51 +0800)]
ENGR00256820-1 ASoC: WM8962: revert FLL-disable before FLL-setting

  The patch at the commit 30293bc6 dropped FLL-disabling code from wm8962
driver, which was a work around for CR 00209905. Since we fixed the issue in
a better way(commit 018958f4), we don't need the work around any more.
  And in wm8962's datasheet, Wolfson suggests that driver should disable and
re-enable the FLL after the other registers're updated. So it's better for us
to revert the code to prevent some potential issue.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoENGR00254106 Avoid incorrect GPU frequency scaling be overwritten
Loren Huang [Sat, 30 Mar 2013 05:53:10 +0000 (13:53 +0800)]
ENGR00254106 Avoid incorrect GPU frequency scaling be overwritten

Correct code to remove unnecessary GPU frequency scaling updte.
This patch is from vivante.

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00256629 V4L2 output: Fix color bar issue on 1080p HDMI display
Wayne Zou [Mon, 25 Mar 2013 04:56:46 +0000 (12:56 +0800)]
ENGR00256629 V4L2 output: Fix color bar issue on 1080p HDMI display

When doing video playback on video16, which is also the first framebuffer
and used for fb console as well, there is a color bar on top of 1080p screen.
We need to make sure the correct vmode when doing pan display.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00255104 The opening time of cs42888 is very long, about 400ms
b02247 [Fri, 29 Mar 2013 06:09:43 +0000 (14:09 +0800)]
ENGR00255104 The opening time of cs42888 is very long, about 400ms

In this commit 957bc47ffbad8532f0e8f6463946e8c04bc3176f, add msleep(400)
for reducing noise in the hw_params, but this time is very long for opening
device.
In this patch, remove this time and use the "Soft Ramp on Zero Crossings" to
reduce the noise.

Signed-off-by: b02247 <b02247@freescale.com>
11 years agoENGR00255406 net: fec: Workaround tx hang due to TDAR bit cleared by uDMA
Fugang Duan [Wed, 27 Mar 2013 10:23:16 +0000 (18:23 +0800)]
ENGR00255406 net: fec: Workaround tx hang due to TDAR bit cleared by uDMA

MTIP enet IP have one IC issue recorded at PDM ticket:TKT168103

The issue description:
The TDAR bit after being set by software is not acted upon by the ENET
module due to the timing of when the ENET state machine clearing the
TDAR bit occurring coincident or momentarily after the software sets
the bit.

The result:
The corresponding transmit packet for an incoming ping is delayed.

Workaround:
This forces the ENET module to check the Transmit buffer descriptor
and take action if the “ready” flag is set. Otherwise the ENET module
returns to idle mode.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00255322 Disable non-contiguous memory using for VG
Loren Huang [Thu, 28 Mar 2013 10:14:17 +0000 (18:14 +0800)]
ENGR00255322 Disable non-contiguous memory using for VG

Current OpenVG doesn't support to use non-contiguous memory.
Forbid VG to try to allocate non-contiguous memory when video
memory is used up temporarily.

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00255111 battery: fix voltage decreased only while discharging
Robin Gong [Mon, 25 Mar 2013 06:27:42 +0000 (14:27 +0800)]
ENGR00255111 battery: fix voltage decreased only while discharging

If system run higher cpu loading with bigger current, such as GPU or VPU,
the voltage of battery will decrease down quickly  and rise up later.But the
battery driver only permit voltage decreasing while discharging before, in
other words, in the above case , the voltage will keep in very low level,
although the voltage will rise back again.

Now, remove the constrain in the code. Of course, with the patch, voltage will
down and rise back when run high loading user case, but it's better than
LOW ALWAYS, in worst case, the battery capacity will be 0 as test team reported

Please note :
Current battery capaity is not accurate because of hardware
design defect(ENGR00219632) on Sabresd.So please ignore the accuracy issue.

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00255481 mx6: Update equation for thermal sensor
Anson Huang [Wed, 13 Mar 2013 06:01:01 +0000 (14:01 +0800)]
ENGR00255481 mx6: Update equation for thermal sensor

Use universal equation and 25C's calibration data to
get thermal sensor's ratio.

If want to use old calibration method, please add
"use_calibration" into kernel command line.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00255491 ov5640: Fix build break by make modules
Robby Cai [Fri, 22 Mar 2013 05:27:11 +0000 (13:27 +0800)]
ENGR00255491 ov5640: Fix build break by make modules

Fix the kernel modules building error for mx6q/mx6dl as follows:

LD [M] drivers/usb/gadget/g_serial.o
Building modules, stage 2.
MODPOST 48 modules
ERROR: "csi_enable_mclk" [drivers/media/video/mxc/capture/ov5640_camera.ko]
undefined!
make[1]: *** [__modpost] Error 1
make: *** [modules] Error 2

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00255484-3 msl: usb: add clock deinit at fail path
Peter Chen [Fri, 22 Mar 2013 05:46:23 +0000 (13:46 +0800)]
ENGR00255484-3 msl: usb: add clock deinit at fail path

If not, the clocks usage will be mismatch

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00255484-2 usb: ehci-arc: add NULL pointer check for pdata->pdev
Peter Chen [Fri, 22 Mar 2013 05:16:22 +0000 (13:16 +0800)]
ENGR00255484-2 usb: ehci-arc: add NULL pointer check for pdata->pdev

The pdata->pdev is initialized at platform code, if init
fails at first, it will be not initialized, and platform exit
will not be called. This also fixes an oop when config usb
module wrongly:

Unable to handle kernel NULL pointer dereference at virtual address 0000005c
pgd = ba1c4000
[0000005c] *pgd=4a145831, *pte=00000000, *ppte=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP
Modules linked in: ehci_hcd(+) usbcore
CPU: 1    Not tainted  (3.0.35-02451-ge361da1 #60)
PC is at fsl_usb_host_uninit_ext+0xc/0x28
LR is at usb_hcd_fsl_probe+0x2c8/0x44c [ehci_hcd]
pc : [<80062b58>]    lr : [<7f060934>]    psr: a0000013
sp : ba11be80  ip : 00005027  fp : 000a76e0
r10: 00000048  r9 : ba11a000  r8 : bfd4d608
r7 : ffffffed  r6 : bfd4d600  r5 : bfc84400  r4 : 80aaee48
r3 : 80062b4c  r2 : 00000000  r1 : 60000093  r0 : 00000000
Flags: NzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
Control: 10c53c7d  Table: 4a1c404a  DAC: 00000015
Process modprobe (pid: 1555, stack limit = 0xba11a2f0)
Stack: (0xba11be80 to 0xba11c000)
be80: bfd97600 7f060934 00000000 00000000 bfd4d608 bfd4d608 80aca808 bfd4d63c
bea0: 7f062bd4 80041704 ba11a000 00000000 000a76e0 802a5cec bfd4d608 802a4a14
bec0: bfd4d608 7f062bd4 bfd4d63c 00000000 80041704 802a4bac 7f062bd4 ba11bee8
bee0: 802a4b20 802a4254 bffd4040 bff03f38 7f065000 7f062bd4 80a934c8 bfc8cd20
bf00: 00000000 802a3be0 7f062b1c 7f062bd4 00000000 7f017ec8 7f062bd4 00000000
bf20: 7f065000 80041704 00000000 802a51a0 7f017ec8 80aae500 00000000 7f065000
bf40: 80041704 7f065058 000a79e8 8003b4c4 00000000 00000000 00000000 80a14834
bf60: 000a79e8 000a79e8 7f062c20 00000000 0000e67b 80041704 ba11a000 00000000
bf80: 000a76e0 800aa428 ba076740 800f58dc 000a79e8 0000e67b 00000000 000a75d0
bfa0: 00000080 80041580 0000e67b 00000000 000a79e8 0000e67b 000a75d0 000a76e0
bfc0: 0000e67b 00000000 000a75d0 00000080 000a6a78 00000008 000a76a0 000a76e0
bfe0: 7ec7ab50 7ec7ab40 0001a32c 2ace6490 20000010 000a79e8 4fffe821 4fffec21
[<80062b58>] (fsl_usb_host_uninit_ext+0xc/0x28) from [<7f060934>]
(usb_hcd_fsl_probe+0x2c8/0x44c [ehci_hcd])
[<7f060934>] (usb_hcd_fsl_probe+0x2c8/0x44c [ehci_hcd]) from [<802a5cec>]
(platform_drv_probe+0x18/0x1c)
[<802a5cec>] (platform_drv_probe+0x18/0x1c) from [<802a4a14>]
(driver_probe_device+0x98/0x1a4)
[<802a4a14>] (driver_probe_device+0x98/0x1a4) from [<802a4bac>]
(__driver_attach+0x8c/0x90)
[<802a4bac>] (__driver_attach+0x8c/0x90) from [<802a4254>]
(bus_for_each_dev+0x60/0x8c)
[<802a4254>] (bus_for_each_dev+0x60/0x8c) from [<802a3be0>]
(bus_add_driver+0x184/0x25c)
[<802a3be0>] (bus_add_driver+0x184/0x25c) from [<802a51a0>]
(driver_register+0x78/0x13c)
[<802a51a0>] (driver_register+0x78/0x13c) from [<7f065058>]
(ehci_hcd_init+0x58/0x88 [ehci_hcd])
[<7f065058>] (ehci_hcd_init+0x58/0x88 [ehci_hcd]) from [<8003b4c4>]
(do_one_initcall+0x30/0x16c)
[<8003b4c4>] (do_one_initcall+0x30/0x16c) from [<800aa428>]
(sys_init_module+0x84/0x19c)
[<800aa428>] (sys_init_module+0x84/0x19c) from [<80041580>]
(ret_fast_syscall+0x0/0x30)
Code: 80aaee48 e92d4010 e30e4e48 e34840aa (e590005c)
---[ end trace 719afdfe4af3a442 ]---

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00255484-1 msl: usb: add NULL poiner check for fsl_xcvr_ops
Peter Chen [Thu, 21 Mar 2013 02:12:07 +0000 (10:12 +0800)]
ENGR00255484-1 msl: usb: add NULL poiner check for fsl_xcvr_ops

Add NULL pointer check for global fsl_xcvr_ops

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00255482 ASoC: HDMI-audio: Add error message for HDMI-video detect failure
Nicolin Chen [Fri, 22 Mar 2013 02:57:07 +0000 (10:57 +0800)]
ENGR00255482 ASoC: HDMI-audio: Add error message for HDMI-video detect failure

  HDMI-audio depends on HDMI-video. If users want to use HDMI-audio function,
they need to load HDMI-video first. Sometime users would forget to put video
info into U-boot cmdline, "video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24" for
example. That might cause HDMI-auido driver fail to detect HDMI-video.
  Previously, if this happened to system, driver only returned with "ENOMEM"
and system would print "Can't allocate memory". This might confuse users due
to the vague infomation. Users would be hard to figure out the root cause.
  So this patch just add some error message to give users a clear indication,
and changed the "ENOMEM" error number to the more precise "ENODEV".

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoENGR00255029 ASoC: spdif: fix clk_enable/disable() mismatched issue
Nicolin Chen [Wed, 20 Mar 2013 03:09:17 +0000 (11:09 +0800)]
ENGR00255029 ASoC: spdif: fix clk_enable/disable() mismatched issue

  The function might be returned if the CNEW wasn't detected, while in this
case the code won't disable the clk.
  This patch just fixed the mismatch.

Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoENGR00252064-3 camera: ov5640: fix missed setting for light_frequency
Robby Cai [Thu, 14 Mar 2013 09:58:01 +0000 (17:58 +0800)]
ENGR00252064-3 camera: ov5640: fix missed setting for light_frequency

Confirmed from OV, the missed setting for light_frequency need to be added.

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00252064-2 mx6sl: ov5640: need enable MCLK before read sensor ID
Robby Cai [Thu, 14 Mar 2013 08:51:00 +0000 (16:51 +0800)]
ENGR00252064-2 mx6sl: ov5640: need enable MCLK before read sensor ID

After the patch of auto-detection for sensor pushed, there's a need to
read sensor ID in probe function. But on MX6SL, MCLK is not enabled at
that time. So need to enable it before read sensor ID.

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00252064-1 csi/v4l: need power on sensor for its initialization
Robby Cai [Thu, 14 Mar 2013 08:37:09 +0000 (16:37 +0800)]
ENGR00252064-1 csi/v4l: need power on sensor for its initialization

Need power on the sensor for its initialization, otherwise the sensor can
not work properly.

Signed-off-by: Sheng Nan <b38800@freescale.com>
Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00254931 IPUv3 Fb: Fix display twinkling issue during suspend/resume
Wayne Zou [Tue, 19 Mar 2013 01:38:04 +0000 (09:38 +0800)]
ENGR00254931 IPUv3 Fb: Fix display twinkling issue during suspend/resume

Fix display twinkling issue when video playback on LVDS during suspend/resume.
The issue happens when the rootfs application Xfbdev calls fb_set_var() for IPU
BG fb to unblank the console, so it wants to reinitialize the IPU BG. However,
IPU FG is still being used for video playback.It is reasonable to refuse
reprogramme because of the resources confilct.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00254442 Sabre ARD Include WEIM-NOR on imx6_updater_defconfig
Alejandro Sierra [Thu, 14 Mar 2013 21:58:46 +0000 (15:58 -0600)]
ENGR00254442 Sabre ARD Include WEIM-NOR on imx6_updater_defconfig

Sabre ARD include WEIM-NOR configuration update to
enable higher bandwidth on this interface for mfg tool
support (imx6_updater_defconfig).

Signed-off-by: Alex Sierra <b18039@freescale.com>
11 years agoENGR00253355 ARM: imx6q/imx6dl: Set proper PAD value for WEIM NOR
Huang Shijie [Fri, 15 Mar 2013 09:26:35 +0000 (17:26 +0800)]
ENGR00253355 ARM: imx6q/imx6dl: Set proper PAD value for WEIM NOR

Set proper pad value for WEIM NOR. Without setting these pad value
the weim-nor can not work.

Signed-off-by: Huang Shijie <b32955@freescale.com>
11 years agoENGR00254457 mx6dl: fix mx6dl TO1.1 can't enter 'mem'
Robin Gong [Fri, 15 Mar 2013 04:37:04 +0000 (12:37 +0800)]
ENGR00254457 mx6dl: fix mx6dl TO1.1 can't enter 'mem'

The previous patch ENGR00251630 didn't notice mx6q_revision() will
return -EINVAL and will match 'mx6q_revision()<IMX_CHIP_REVISION_1_1'
,then mx6dl TO1.1 will also change suspend state to 'standby'.

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00254267 MX6DL/MX6SL max freq: Fix max cpu freq at 1G on MX6DL ARD
Robin Gong [Thu, 14 Mar 2013 09:19:44 +0000 (17:19 +0800)]
ENGR00254267 MX6DL/MX6SL max freq: Fix max cpu freq at 1G on MX6DL ARD

For MX6DL,align max cpufreq judge by SPEED_GRADING fuse bit with MX6DQ.
For MX6SL without the fuse bit, we need add condition check, if found
arm_max_freq set by default , change to1G. Else decided by 'arm_freq'
setting by cmdline.

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00243315-6 ADV7180:Remove unnecessary header files
Liu Ying [Fri, 8 Mar 2013 09:16:20 +0000 (17:16 +0800)]
ENGR00243315-6 ADV7180:Remove unnecessary header files

This patch removes unnesessary header files in the driver.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 871c22325d619ee1c4d2107ab9298e7ef5193c21)

11 years agoENGR00243315-5 ADV7180:Power management adjustment
Liu Ying [Fri, 8 Mar 2013 09:01:28 +0000 (17:01 +0800)]
ENGR00243315-5 ADV7180:Power management adjustment

ADV7180 power down/on can be controlled by a gpio
pin or i2c register setting. The PDBP bit in 0x0f
register chooses the control source, and the PWRDWN
bit in 0x0f register chooses to power down the chip
or power on the chip if control source is i2c.
This patch removes all gpio pin power down/on code
after probe function and uses i2c to do power down/on
operation, as some boards may choose to not connect
ADV7180 power down pin with AP, however, AP's i2c bus
has to be connect with the ADV7180 chip.
Moveover, this patch also adds a 400ms sleep after
the chip is powered on, which is a workaround for
preview scrolling issue(we suspect that the chip
needs some time to in a stable status, so that it
may sends correct data to AP).

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit fc214fa7a0d6cf12cba45b7e269e983d8281e1ad)

11 years agoENGR00243315-4 MXC V4L2 Capture:Improve debug info for s_std
Liu Ying [Fri, 8 Mar 2013 08:55:37 +0000 (16:55 +0800)]
ENGR00243315-4 MXC V4L2 Capture:Improve debug info for s_std

commit f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57 introduced an
annoying kernel log by changing a pure debug info to error level.
This patch reverts that change.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 289cc885ae097bbf9849cb266679a2969e5c39a9)

11 years agoENGR00243315-3 MXC V4L2 Capture:Remove unnecessary mclk setting
Liu Ying [Fri, 8 Mar 2013 08:44:41 +0000 (16:44 +0800)]
ENGR00243315-3 MXC V4L2 Capture:Remove unnecessary mclk setting

commit f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57 added a hard
coding for csi_parma.mclk setting to 27MHz. The comment added by
that commit is totally wrong by telling that csi_param.mclk
would be a kind of 'pixel clock' set in 'csi_data_dest' register.
This patch removes the unnecessary mclk setting for csi_param.mclk
variable, since it is only valid for CSI test mode.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 5fed1e3fde2d63c80f414f204734d35ceecef561)

11 years agoENGR00243315-2 IPUv3 CSI:Remove test mode clock setting
Liu Ying [Fri, 8 Mar 2013 08:33:35 +0000 (16:33 +0800)]
ENGR00243315-2 IPUv3 CSI:Remove test mode clock setting

This patch removes test mode clock setting in function
ipu_csi_init_interface(), since the setting is only
necessary for function _ipu_csi_set_test_generator().
This unnecessary setting is added wrongly by commit
f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 482c30821d0aad0ab500a9d5db95654917986a3c)

11 years agoENGR00243315-1 IPUv3 CSI:Correct CCIR code1/2 for PAL and NTSC
Liu Ying [Fri, 8 Mar 2013 08:01:48 +0000 (16:01 +0800)]
ENGR00243315-1 IPUv3 CSI:Correct CCIR code1/2 for PAL and NTSC

We reversed CCIR code1/2 setting before, which may brings
captured frame quality issue(jaggy edge can be seen). This
patch revert that change.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit abdb4369f6ebcd90656b5fc319ee79eeb3bec7c5)

11 years agoENGR00253927 IPU: Fix NULL pointer bug when BG EOF interrupt occur early
Wayne Zou [Tue, 12 Mar 2013 08:54:59 +0000 (16:54 +0800)]
ENGR00253927 IPU: Fix NULL pointer bug when BG EOF interrupt occur early

Fix NULL pointer bug when IPU BG EOF interrupt occur before register irq handler
It can be reproduced on MIPI DSI display on i.mx6dl SabreSD board.

The sequence is:
a) enable display channel
b) pan display (fb_set_var()) -> ipu_enable_irq
c) ipu_request_irq
If an EOF interrupt comes before c and after b, the issue happens.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00253418 IMX6 SabreSD Display: Support LVDS1 and HDMI dual display
Wayne Zou [Fri, 8 Mar 2013 07:29:49 +0000 (15:29 +0800)]
ENGR00253418 IMX6 SabreSD Display: Support LVDS1 and HDMI dual display

Support LVDS1 and HDMI dual display on SabreSD Rev.C board on i.mx6
By default, LVDS uses LDB_SEP1 mode due to the hardware design.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00253947 EPDC: fix reboot failure
Robby Cai [Tue, 12 Mar 2013 11:17:50 +0000 (19:17 +0800)]
ENGR00253947 EPDC: fix reboot failure

This patch is to

1) add clock enablement before access EPDC registers, otherwise system may hang.

And,
2) fix unbalanced disablement for PMIC regulators

------------[ cut here ]------------
WARNING: at drivers/regulator/core.c:1422 _regulator_disable+0xf8/0x12c()
unbalanced disables for VCOM
Modules linked in:
[<80040518>] (unwind_backtrace+0x0/0xf8) from [<800671d8>]
(warn_slowpath_common +0x4c/0x64)
[<800671d8>] (warn_slowpath_common+0x4c/0x64) from [<80067284>]
(warn_slowpath_fmt+0x30/0x40)
[<80067284>] (warn_slowpath_fmt+0x30/0x40) from [<8024ef60>]
(_regulator_disable+0xf8/0x12c)
[<8024ef60>] (_regulator_disable+0xf8/0x12c) from [<8024efc4>]
(regulator_disable+0x30/0x70)
[<8024efc4>] (regulator_disable+0x30/0x70) from [<80241044>]
(mxc_epdc_fb_shutdown+0x18/0x84)
[<80241044>] (mxc_epdc_fb_shutdown+0x18/0x84) from [<80277f64>]
(platform_drv_shutdown+0x18/0x1c)
[<80277f64>] (platform_drv_shutdown+0x18/0x1c) from [<802751d0>]
(device_shutdown+0xac/0x124)
[<802751d0>] (device_shutdown+0xac/0x124) from [<8007812c>]
(kernel_restart_prepare+0x30/0x38)
[<8007812c>] (kernel_restart_prepare+0x30/0x38) from [<80078140>]
(kernel_restart+0xc/0x48)
[<80078140>] (kernel_restart+0xc/0x48) from [<80078290>]
(sys_reboot+0x10c/0x1c4)
[<80078290>] (sys_reboot+0x10c/0x1c4) from [<8003ad40>]
(ret_fast_syscall+0x0/0x30)
---[ end trace e392f5dd2f75e1a5 ]---
------------[ cut here ]------------
WARNING: at drivers/regulator/core.c:1422 _regulator_disable+0xf8/0x12c()
unbalanced disables for DISPLAY
Modules linked in:
[<80040518>] (unwind_backtrace+0x0/0xf8) from [<800671d8>]
(warn_slowpath_common+0x4c/0x64)
[<800671d8>] (warn_slowpath_common+0x4c/0x64) from [<80067284>]
(warn_slowpath_fmt+0x30/0x40)
[<80067284>] (warn_slowpath_fmt+0x30/0x40) from [<8024ef60>]
(_regulator_disable+0xf8/0x12c)
[<8024ef60>] (_regulator_disable+0xf8/0x12c) from [<8024efc4>]
(regulator_disable+0x30/0x70)
[<8024efc4>] (regulator_disable+0x30/0x70) from [<8024104c>]
(mxc_epdc_fb_shutdown+0x20/0x84)
[<8024104c>] (mxc_epdc_fb_shutdown+0x20/0x84) from [<80277f64>]
(platform_drv_shutdown+0x18/0x1c)
[<80277f64>] (platform_drv_shutdown+0x18/0x1c) from [<802751d0>]
(device_shutdown+0xac/0x124)
[<802751d0>] (device_shutdown+0xac/0x124) from [<8007812c>]
(kernel_restart_prepare+0x30/0x38)
[<8007812c>] (kernel_restart_prepare+0x30/0x38) from [<80078140>]
(kernel_restart+0xc/0x48)
[<80078140>] (kernel_restart+0xc/0x48) from [<80078290>]
(sys_reboot+0x10c/0x1c4)
[<80078290>] (sys_reboot+0x10c/0x1c4) from [<8003ad40>]
(ret_fast_syscall+0x0/0x30)
---[ end trace e392f5dd2f75e1a6 ]---

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00253849 EPDC: fix build warnings in epdc fb driver
Robby Cai [Tue, 12 Mar 2013 06:59:49 +0000 (14:59 +0800)]
ENGR00253849 EPDC: fix build warnings in epdc fb driver

This patch is to fix the following warnings:

drivers/video/mxc/mxc_epdc_fb.c:5062:2: warning: initialization from
incompatible pointer type [enabled by default]
drivers/video/mxc/mxc_epdc_fb.c:5062:2: warning: (near initialization for
'mxc_epdc_fb_driver.shutdown') [enabled by default]

Signed-off-by: Robby Cai <R63905@freescale.com>
11 years agoENGR00253835: CAAM: Fix build warnings in caamhash.c
Terry Lv [Tue, 12 Mar 2013 05:45:28 +0000 (13:45 +0800)]
ENGR00253835: CAAM: Fix build warnings in caamhash.c

A warning was find in caamhash.c:
linux-2.6-imx/drivers/crypto/caam/caamhash.c: In function
'ahash_update_ctx':
linux-2.6-imx/drivers/crypto/caam/caamhash.c:850: warning: 'desc' may be
used uninitialized in this function

This commit is to fix it.

Signed-off-by: Terry Lv <r65388@freescale.com>
11 years agoENGR00169384 imx6q: uart: config and enble uart5
Jianzheng Zhou [Mon, 11 Mar 2013 09:41:26 +0000 (17:41 +0800)]
ENGR00169384 imx6q: uart: config and enble uart5

Config clock,irq,mux pad,data entry, etc to setup uart5.

Signed-off-by: Jianzheng Zhou <jianzheng.zhou@freescale.com>
11 years agoENGR00252782 mxc v4l2 capture:Support csi number attribution
Liu Ying [Tue, 5 Mar 2013 06:54:51 +0000 (14:54 +0800)]
ENGR00252782 mxc v4l2 capture:Support csi number attribution

This patch adds device attribution for video device to
show csi number to userspace. The pattern is in "ipux_csix"
fashion, which tells which ipu and csi is relevant to a
specific video device. In this way, userspace may figure
out different cameras even if they have the same type,
especially, android may use this to know back/front
cameras.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
11 years agoENGR00252559: mxc_v4l2_capture: ov5640: incorrect warning for XGA@15fps
Sheng Nan [Mon, 4 Mar 2013 06:47:48 +0000 (14:47 +0800)]
ENGR00252559: mxc_v4l2_capture: ov5640: incorrect warning for XGA@15fps

The following warning information should be displayed
only when the format is XGA and frame rate is 30fps:

pr_warning("ov5640: actual frame rate of XGA is 22.5fps\n");

Signed-off-by: Sheng Nan <b38800@freescale.com>
11 years agoENGR00252411: mxc_v4l2_capture: ov5642/ov5640 cannot both be set as build-in.
Sheng Nan [Mon, 4 Mar 2013 02:35:13 +0000 (10:35 +0800)]
ENGR00252411: mxc_v4l2_capture: ov5642/ov5640 cannot both be set as build-in.

ov5642 and ov5640 are inside choice "prompt "Select Camera/TV Decoder""
It prevents some modules are set as build-in at the same time.

All the cameras inside the choice are parallel cameras. There is no need to
include all of them inside a choice.

Know issues:
ADV7180 (out of the choice) and mipi ov camera (inside the choice)
can not be both selected for ARM2 board:
CSI0_MCLK pad is conflicted between adv7180 and mipi camera ext port.
Developers should know this.

Signed-off-by: Sheng Nan <b38800@freescale.com>
11 years agoENGR00252381: mxc_v4l2_capture: ov5640: incorrect return value of ov5640_probe
Sheng Nan [Fri, 1 Mar 2013 08:43:29 +0000 (16:43 +0800)]
ENGR00252381: mxc_v4l2_capture: ov5640: incorrect return value of ov5640_probe

ov5640_probe always return -1 when error happens. Actually we should use the
correct return value. For example, -ENODEV when no ov5640 is found.

Signed-off-by: Sheng Nan <b38800@freescale.com>
11 years agoENGR00252071-1: mxc_v4l2_capture: auto detection parallel ov5642 and ov5640
Sheng Nan [Fri, 1 Mar 2013 02:24:12 +0000 (10:24 +0800)]
ENGR00252071-1: mxc_v4l2_capture: auto detection parallel ov5642 and ov5640

Both ov5642 and ov5640 need to be supported for parallel port of
validation board and no code change is needed when change from one sensor
to another.

- Add additional common i2c id for ov5640 and ov5642 for auto dectection
- Since two sensors will be checked because of auto detection, so use warning
instead of error if sensor id don't match.
- Add found information to tell user which camera is found.

Signed-off-by: Sheng Nan <b38800@freescale.com>
11 years agoENGR00252071-2: mxc_v4l2_capture: ov5640_mipi: update probe print information
Sheng Nan [Fri, 1 Mar 2013 02:26:58 +0000 (10:26 +0800)]
ENGR00252071-2: mxc_v4l2_capture: ov5640_mipi: update probe print information

Because ov5642 and ov5640 changes the probe information due to auto detect,
ov5640_mipi should keep the same.

- Add found information to tell user ov5640_mipi is found.
- Use the same "not found" information as ov5642/ov5640.

Signed-off-by: Sheng Nan <b38800@freescale.com>
11 years agoENGR00252071-3: mxc_v4l2_capture: enable auto detect of ov5642/5640 in sabresd
Sheng Nan [Fri, 1 Mar 2013 02:30:02 +0000 (10:30 +0800)]
ENGR00252071-3: mxc_v4l2_capture: enable auto detect of ov5642/5640 in sabresd

- enable the auto detect for parallel ov5642 and ov5640 in sabresd board.

Signed-off-by: Sheng Nan <b38800@freescale.com>
11 years agoENGR00252071-4: mxc_v4l2_capture: enable auto detect of ov5642/5640 in sabrelite
Sheng Nan [Fri, 1 Mar 2013 02:30:36 +0000 (10:30 +0800)]
ENGR00252071-4: mxc_v4l2_capture: enable auto detect of ov5642/5640 in sabrelite

- enable the auto detect for parallel ov5642 and ov5640 in sabrelite board.

Signed-off-by: Sheng Nan <b38800@freescale.com>
11 years agoENGR00252162: mxc_v4l2_capture: ov5640: some formats have quality issue
Sheng Nan [Thu, 28 Feb 2013 10:26:38 +0000 (18:26 +0800)]
ENGR00252162: mxc_v4l2_capture: ov5640: some formats have quality issue

The following formats have quality issue:
- 30fps: 720p
- 15 fps: 1080p,qsxga

Quality issue happens on high resolutions.
So, increase the drive capability of ov5640 can fix this problem.

Signed-off-by: Sheng Nan <b38800@freescale.com>
11 years agoENGR00234501 ASoC: spdif: fix Ubuntu reboot hang issue
Nicolin Chen [Mon, 11 Mar 2013 09:09:14 +0000 (17:09 +0800)]
ENGR00234501 ASoC: spdif: fix Ubuntu reboot hang issue

  spdif driver registered kcontrol for ALSA subsystem controlling, while some
of those kcontrol functions lack of clk_enable() before register-accessing. So
system would definitely hang when those functions're called, which did happen
during reboot test on Ubuntu due to its pulse-audio.
  This patch added paired clk_en/disable() to those functions so as to pevent
system hang issue.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Tested-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoENGR00253290-2 ASoC: imx-wm8962: fix continuous playback distortion issue
Nicolin Chen [Fri, 8 Mar 2013 03:03:27 +0000 (11:03 +0800)]
ENGR00253290-2 ASoC: imx-wm8962: fix continuous playback distortion issue

  If DAC volume's set to a value that's lower than 0xd8, contineously FLL
setting of wm8962 in machine driver would cause playback distortion issue,
which happens to ENGR219882. so we have to put some another code in machine
driver to prevent distortion issue.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoENGR00253290-1 ASoC: wm8962: fix over-gained audio playback issue
Nicolin Chen [Fri, 8 Mar 2013 03:01:57 +0000 (11:01 +0800)]
ENGR00253290-1 ASoC: wm8962: fix over-gained audio playback issue

  We put some code to set default volumes in codec driver, but later we found
that one of volume was higher than 0db, which would cause over-gained volume.
  So this patch removed DAC default volume setting, and reverted the volume
interface of it to let user control the register from user space.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
11 years agoARM: 7417/1: vfp: ensure preemption is disabled when enabling VFP access
Will Deacon [Fri, 11 May 2012 16:42:37 +0000 (17:42 +0100)]
ARM: 7417/1: vfp: ensure preemption is disabled when enabling VFP access

The vfp_enable function enables access to the VFP co-processor register
space (cp10 and cp11) on the current CPU and must be called with
preemption disabled. Unfortunately, the vfp_init late initcall does not
disable preemption and can lead to an oops during boot if thread
migration occurs at the wrong time and we end up attempting to access
the FPSID on a CPU with VFP access disabled.

This patch fixes the initcall to call vfp_enable from a non-preemptible
context on each CPU and adds a BUG_ON(preemptible) to ensure that any
similar problems are easily spotted in the future.

Cc: stable@vger.kernel.org
Reported-by: Hyungwoo Yang <hwoo.yang@gmail.com>
Signed-off-by: Hyungwoo Yang <hyungwooy@nvidia.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[Fix merge conflict]
Signed-off-by: Jason Liu <r64343@freescale.com>
11 years agoENGR00251209-9 msl: usb: make global variable as drvdata
Peter Chen [Tue, 5 Mar 2013 03:21:04 +0000 (11:21 +0800)]
ENGR00251209-9 msl: usb: make global variable as drvdata

There is a bug when we try to remove wakeup module twice as
g_ctrl is a globle variable, in fact, it is per controller
wakeup driver, so the private data should be per device.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00251209-8 usb: fix the build error when building usb as loadable module
Peter Chen [Mon, 4 Mar 2013 09:42:52 +0000 (17:42 +0800)]
ENGR00251209-8 usb: fix the build error when building usb as loadable module

export usb_suspend, usb_resume, and pm_mutex

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00251209-7 usb: mark phy's low power flag as false at probe
Peter Chen [Mon, 4 Mar 2013 09:40:34 +0000 (17:40 +0800)]
ENGR00251209-7 usb: mark phy's low power flag as false at probe

PHY's low power flag was false at former logic, so this
change should not affect functions.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00251209-6 msl-mx6: usb: keep the phy lower flag as true defaultly
Peter Chen [Mon, 4 Mar 2013 09:35:02 +0000 (17:35 +0800)]
ENGR00251209-6 msl-mx6: usb: keep the phy lower flag as true defaultly

Keep the phy lower flag as true defaultly, the driver should mark
it as false when the driver begins to use PHY.
This fixes one bug that when build both host and gadget as loadable
modules, the phy lower flag is false if the related module is not
loaded, then, the wakeup interrupt will not be treated as happened
if host module is loaded, but gadget is not loaded, or vice verse.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00251209-5 usb: fix the system hang when unload gadget module
Peter Chen [Mon, 4 Mar 2013 09:30:08 +0000 (17:30 +0800)]
ENGR00251209-5 usb: fix the system hang when unload gadget module

- For gadget, the clock will be closed at platform code, so
the driver should not be close clock beforehand.
- For host, the PHY should not be low power mode when the host
controller has still possibilities to use. Besides, the 5v should
be off at last as some platform uses 5v for PHY's power.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00251209-4 msl-mx6: usb: Fix system hang when unload gadget module
Peter Chen [Mon, 4 Mar 2013 09:19:20 +0000 (17:19 +0800)]
ENGR00251209-4 msl-mx6: usb: Fix system hang when unload gadget module

At gadget module remove function, it closes the clock, but
at platform code, it still visits register. In fact,
The PHY has already been low power mode when driver's remove
before platform code is called.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00251209-3 usb: fix below build warning
Peter Chen [Mon, 4 Mar 2013 06:22:52 +0000 (14:22 +0800)]
ENGR00251209-3 usb: fix below build warning

/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
In function 'mx6_usb_dr_init':
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
615: warning: unused variable 'imx6q_mxc_ehci_otg_data'
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
At top level:
/home/b29397/work/projects/linux-2.6-imx/arch/arm/mach-mx6/usb_dr.c:
77: warning: 'fsl_platform_otg_set_usb_phy_dis' defined but not used

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00251209-2 usb: otg: fix the dp/dm will be floating when phy is no 3v3
Peter Chen [Fri, 1 Mar 2013 08:37:42 +0000 (16:37 +0800)]
ENGR00251209-2 usb: otg: fix the dp/dm will be floating when phy is no 3v3

For the design which the phy is no power (no 5v for VBUS), the
PHY can't get dp/dm correctly, so it the port change interrpt
is enabled or the host enters low power mode, the unexpected
interrupt will occur.
This commit will make the dp/dm as zero at otg configuration.
For gadget-only, the same function is existed at probe.
For host-only, the vbus will be on before port change interrupt
is enabled.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00251209-1 usb: add host 1 vbus callback
Peter Chen [Fri, 1 Mar 2013 07:33:24 +0000 (15:33 +0800)]
ENGR00251209-1 usb: add host 1 vbus callback

The callback will be used at probe and remove

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00252727-2 [GPU]Power on VG core if there is only VG core in SoC
Loren Huang [Tue, 5 Mar 2013 07:44:28 +0000 (15:44 +0800)]
ENGR00252727-2 [GPU]Power on VG core if there is only VG core in SoC

-Power on VG core to makesure VG can be initalized if there is only
VG core in SoC.
-Power off VG core after initalization is done.
-Adjust VG power and clock state to match above changing.

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00252727-1 [mxc]Add fuse check for gpu platform device
Loren Huang [Tue, 5 Mar 2013 07:40:22 +0000 (15:40 +0800)]
ENGR00252727-1 [mxc]Add fuse check for gpu platform device

Add fuse check for gpu platform device. Bypass gpu core
initialization if certain core is fused.If all gpu cores
are fused, bypass gpu driver loading.

Signed-off-by: Loren Huang <b02279@freescale.com>
11 years agoENGR00237452 i.MX6:IEEE1588: disable phy Ar8031 SmartEEE
Fugang Duan [Fri, 2 Nov 2012 10:21:08 +0000 (18:21 +0800)]
ENGR00237452 i.MX6:IEEE1588: disable phy Ar8031 SmartEEE

Connecting two boards directly more than 2 hours, Ar8031 phy link
status generates glitch, which cause ethernet link down/up issue, but
ethernet still be active. There have three cases to validate the issue:

Item#1: If add performance stress test while runing IEEE1588, the link
down/up issue cannot be found.
Item#2: If insert switch between two net nodes and run IEEE1588 test,
the issue also cannot be found.
Item#3: If disable AR8031 SmartEEE feature, after two days overnight test,
no such issue found.

The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can
prevent phy enter lpm mode, which match the Item#3 test result, so disable
SmartEEE feature to avoid the link issue generation.

Signed-off-by: Fugang Duan <B38611@freescale.com>
11 years agoENGR00252418 imx6: add fuse check for available devices
Dong Aisheng [Wed, 27 Feb 2013 08:50:30 +0000 (16:50 +0800)]
ENGR00252418 imx6: add fuse check for available devices

Since device availability may be different on the same SoC,
so we add fuse check for the supported device before we really
adding the device to the kernel.
This may avoid kernel crash once the CPU at the slot are changed to
a different one which with different device available but the kernel is
the same one.

Reviewed-by: Jason Liu <r64343@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
11 years agotimer: fix the too many reries on the per-cpu event device
Jason Liu [Mon, 25 Feb 2013 11:55:04 +0000 (19:55 +0800)]
timer: fix the too many reries on the per-cpu event device

There are so many retries happen on the per-cpu event device
when run the command 'cat /proc/timer_list', as following:

root@~$ cat /proc/timer_list
Timer List Version: v0.6
HRTIMER_MAX_CLOCK_BASES: 3
now at 3297691988044 nsecs

Tick Device: mode:     1
Per CPU device: 0
Clock Event Device: local_timer
 max_delta_ns:   8624432320
 min_delta_ns:   1000
 mult:           2138893713
 shift:          32
 mode:           3
 next_event:     3297700000000 nsecs
 set_next_event: twd_set_next_event
 set_mode:       twd_set_mode
 event_handler:  hrtimer_interrupt
 retries:        36383

the reason is that the local timer will stop when enter C3 state,
we need switch the local timer to bc timer when enter the state
and switch back when exit from the that state.The code is like this:

void arch_idle(void)
{
....
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
enter_the_wait_mode();

clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
}

when the broadcast timer interrupt arrives(this interrupt just wakeup
the ARM, and ARM has no chance to handle it since local irq is disabled.
In fact it's disabled in cpu_idle() of arch/arm/kernel/process.c)

the broadcast timer interrupt will wake up the CPU and run:

clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);    ->
tick_broadcast_oneshot_control(...);
->
tick_program_event(dev->next_event, 1);
->
tick_dev_program_event(dev, expires, force);
->
for (i = 0;;) {
                int ret = clockevents_program_event(dev, expires, now);
                if (!ret || !force)
                        return ret;
                dev->retries++;
                ....
                now = ktime_get();
                expires = ktime_add_ns(now, dev->min_delta_ns);
}
clockevents_program_event(dev, expires, now);
        delta = ktime_to_ns(ktime_sub(expires, now));

        if (delta <= 0)
                return -ETIME;
when the bc timer interrupt arrives,  which means the last local timer
expires too. so, clockevents_program_event will return -ETIME, which will
cause the dev->retries++ when retry to program the expired timer.

Even under the worst case, after the re-program the expired timer,
then CPU enter idle quickly before the re-progam timer expired,
it will make system ping-pang forever if no interrupt happen.

We have found the ping-pang issue during the video play-back test.
system will freeze and video not playing for sometime until other interrupt
occured to break the error condition.

The detailed information, please refer to the LKML:https://lkml.org/lkml/2013/2/20/216
which posted by Jason Liu.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jason Liu <r64343@freescale.com>
Tested-by: Jason Liu <r64343@freescale.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 years agoENGR00251836 IPU device: Support local alpha with alpha value in each pixel
Wayne Zou [Fri, 23 Nov 2012 08:18:58 +0000 (16:18 +0800)]
ENGR00251836 IPU device: Support local alpha with alpha value in each pixel

Add local alpha support with alpha value in each pixel,
such as RGBA pixel format.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00251830 LDB: Fix the bug of LDB separate mode for dual LVDS display
Wayne Zou [Mon, 25 Feb 2013 08:35:09 +0000 (16:35 +0800)]
ENGR00251830 LDB: Fix the bug of LDB separate mode for dual LVDS display

Fix the bug of LDB separate mode for dual LVDS display on i.mx6.
For 'ldb=sep0' option on kernel command line, it means that LVDS0 is
the primary display. While 'ldb=sep1' means that LVDS1 is the primary display.
For LDB separate mode, the Display Interface(disp_id) should be
configured differently on the platform layer. That is, IPU DI0 to LVDS1 or
IPU DI1 to LVDS0 configuration should be avoided.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00251849-2 ldo_bypass:print the ldo_bypass mode directly, not obscure number
Robin Gong [Tue, 26 Feb 2013 08:10:54 +0000 (16:10 +0800)]
ENGR00251849-2 ldo_bypass:print the ldo_bypass mode directly, not obscure number

You can see "cpu regulator mode:ldo_bypass" log directly from console when boot.
not "cpu regulator init ldo=1" before.
Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00251849-1 cpufreq:print the max freq directly, not obscure number
Robin Gong [Tue, 26 Feb 2013 08:04:09 +0000 (16:04 +0800)]
ENGR00251849-1 cpufreq:print the max freq directly, not obscure number

You can see "arm_max_freq=1GHz" log directly from console during boot.
not "arm_max_freq=1" before.

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00243077 Fixed JB4.2 multi-user switch hang issue
Xianzhong [Tue, 26 Feb 2013 10:38:59 +0000 (18:38 +0800)]
ENGR00243077 Fixed JB4.2 multi-user switch hang issue

Gpu virtual memory has potiential hang issue exposed,
Vivante will fix this hang issue with 4K contigueous memory limit.

4K limit is needless now and should be disabled by default.

Signed-off-by: Xianzhong <b07117@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00251630 MX6DQ: do not power off ARM in suspend on TO1.1
Robin Gong [Mon, 25 Feb 2013 02:56:21 +0000 (10:56 +0800)]
ENGR00251630 MX6DQ: do not power off ARM in suspend on TO1.1

System will resume back failed which caused by IPG clock glich issue. The issue
(TKT094231) has been fixed on MX6DQ TO1.2 and MX6DL TO1.1.It is hard to
reproduced on MX6DQ TO1.1/1.0 with 0xffffffff in GPC_PGC_CPU_PUPSCR
which implemented on GA release. But it is easy to reproduced with 0xf0f0 on
mainline now. As we focus on latest formal chip, the problem is cleaned up until
now. We will aign with the workaround on MX6DL which do not power off ARM in
suspend.

Signed-off-by: Robin Gong <b38343@freescale.com>
11 years agoENGR00251008 [GPU] 4.6.9p11 integration for DRM
Loren Huang [Mon, 25 Feb 2013 10:58:22 +0000 (18:58 +0800)]
ENGR00251008 [GPU] 4.6.9p11 integration for DRM

-DRM copyright update

Signed-off-by: Loren Huang <b02279@freescale.com>
11 years agoENGR00251005 [gpu]4.6.9p11 kernel code integration
Loren Huang [Fri, 15 Feb 2013 15:34:51 +0000 (23:34 +0800)]
ENGR00251005 [gpu]4.6.9p11 kernel code integration

-4.6.9p11 kernel code integration
-Additionally release runtime pm and regulator when destory gpu driver
to avoid reference count mismatch.

Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00250756-4 V4L2 output: fix coding format and review commit warning
Wayne Zou [Tue, 19 Feb 2013 05:33:47 +0000 (13:33 +0800)]
ENGR00250756-4 V4L2 output: fix coding format and review commit warning

Fix the review commit warning such as "line over 80 characters",
"no space before tabs".

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00251015-2 FB/IPU: Add mxcfb ioctrl to update IPU DP CSC matrix
Wayne Zou [Wed, 20 Feb 2013 05:46:01 +0000 (13:46 +0800)]
ENGR00251015-2 FB/IPU: Add mxcfb ioctrl to update IPU DP CSC matrix

Add mxcfb ioctrl MXCFB_CSC_UPDATE to update IPU DP CSC matrix
for display adjustment.
This patch implements the ioctrl interface.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00251015-1 FB/IPU: Add mxcfb ioctrl to update IPU DP CSC matrix
Wayne Zou [Wed, 20 Feb 2013 05:46:01 +0000 (13:46 +0800)]
ENGR00251015-1 FB/IPU: Add mxcfb ioctrl to update IPU DP CSC matrix

Add mxcfb ioctrl MXCFB_CSC_UPDATE to update IPU DP CSC matrix
for display adjustment.
This patch defines the ioctrl interface in header file.

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00244769-2 [NOR FLASH]-Improve WEIM NOR speed
Oliver Brown [Wed, 13 Feb 2013 17:54:25 +0000 (11:54 -0600)]
ENGR00244769-2 [NOR FLASH]-Improve WEIM NOR speed

Increase the NOR flash read speed.
Added weimnor driver to use cached (and page mode) reads.

Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
11 years agoENGR00244769-1 [NOR FLASH]-Improve WEIM NOR speed
Oliver Brown [Wed, 13 Feb 2013 17:48:35 +0000 (11:48 -0600)]
ENGR00244769-1 [NOR FLASH]-Improve WEIM NOR speed

Increase the NOR flash read speed.
Added weimnor driver to use cached (and page mode) reads.

Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
11 years agoENGR00243348 imx: pcie: disable pcie phy in kernel initialization
Richard Zhu [Tue, 5 Feb 2013 07:27:34 +0000 (15:27 +0800)]
ENGR00243348 imx: pcie: disable pcie phy in kernel initialization

In order to save power consumption, disable pcie phy
(enable IDDQ mode) in kernel initialization.

Signed-off-by: Richard Zhu <r65037@freescale.com>
11 years agoENGR00243339 imx: sata: disable sata phy when sata is not enabled
Richard Zhu [Tue, 5 Feb 2013 06:11:08 +0000 (14:11 +0800)]
ENGR00243339 imx: sata: disable sata phy when sata is not enabled

In order to save power consumption, disable sata phy
(enable PDDQ mode) in kernel level, if the sata module
is not enabled in kernel configuration.

Signed-off-by: Richard Zhu <r65037@freescale.com>
11 years agoENGR00243106 imx: pcie: enable pcie msi on imx6 platforms
Richard Zhu [Fri, 1 Feb 2013 04:31:21 +0000 (12:31 +0800)]
ENGR00243106 imx: pcie: enable pcie msi on imx6 platforms

deprieved from boundary msi support patch
add the following modifications
 * use the RC's line address 0x01FF8000 instead of one
 actual physical memory as the msi start address.
 The physical memory address is not mandatory required by the
 msi start address.

 * set PCI_MSI_FLAGS_ENABLE in RC's msi capability
 structure when the msi int is enabled.

 * the data of msg is only 16bit, set the upper 8bit
 cputype, and the msi int num to the lower 8bit.

Signed-off-by: Richard Zhu <r65037@freescale.com>
11 years agoENGR00242327 V4L2 output: Support field format changes on frame by frame base
Wayne Zou [Wed, 30 Jan 2013 06:05:08 +0000 (14:05 +0800)]
ENGR00242327 V4L2 output: Support field format changes on frame by frame base

Support interlace field format or progressive format changes
on the frame by frame base for V4L2 output

Signed-off-by: Wayne Zou <b36644@freescale.com>
11 years agoENGR00220096 USB core: remove Logitech Quickcam E3500 form usb_quirk_list
make shi [Thu, 23 Aug 2012 09:07:13 +0000 (17:07 +0800)]
ENGR00220096 USB core: remove Logitech Quickcam E3500 form usb_quirk_list

Since Logitech Quickcam E3500 is defaultly listed in usb_quirk_list on current
linux kernel. So the USB camera only supports reset resume, but doesn't support
normal usb suspend/resume. Actually, the USB camera works abnormally after USB
reset resume, but it works well after doing normal suspend/resume.

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00242788: usb: host: disable stream mode due to IC problem
Peter Chen [Fri, 1 Feb 2013 03:05:30 +0000 (11:05 +0800)]
ENGR00242788: usb: host: disable stream mode due to IC problem

There is a bug at chipidea core, please see below synopsis problem title
and its number.
STAR 9000378958
Title: Non-Double Word Aligned Buffer Address Sometimes
Causes Host to Hang on OUT Retry

This problem will be showed when we use Ethernet device at host port, there
is an errata ERR006308 for it.

The workaround for this issue is to disable stream mode at register usbmode.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
11 years agoENGR00242672 MX6 local timer:Remove enable_wait_mode global variable
Liu Ying [Thu, 31 Jan 2013 09:05:13 +0000 (17:05 +0800)]
ENGR00242672 MX6 local timer:Remove enable_wait_mode global variable

This patch removes the unnecessary global variable declaration for
enable_wait_mode.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
11 years agoENGR00242214 IMX PWM:Correct duty cycle calculation
Liu Ying [Wed, 30 Jan 2013 04:31:55 +0000 (12:31 +0800)]
ENGR00242214 IMX PWM:Correct duty cycle calculation

Since we've already reduced 2 cycles before writing PWMPR
register, the real period cycle on PWMO is the value of
period_cycles (before reducing 2). So, the following commit
message of ENGR00170342, which changes the duty cycle
calculation wrongly, is not reasonable:
===================================================
The chip document says the counter counts up to period_cycles + 1
and then is reset to 0, so the actual period of the PWM wave is
period_cycles + 2
===================================================

Revert "ENGR00170342 PWM: fix pwm output can't be set to 100% full duty"

This reverts commit ac3711f7f24b94db9f78fd7e9bf134c2ecd025ab.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit b42be77aa7842834f0fb50924546701b668d7ab9)

11 years agoENGR00242269 MX6 PCIE:Print out link up failure log
Liu Ying [Tue, 29 Jan 2013 10:13:31 +0000 (18:13 +0800)]
ENGR00242269 MX6 PCIE:Print out link up failure log

This patch contains code change only to print out
link up failure log like below.
link up failed, DB_R0:0x001b8400, DB_R1:0x08200000!

Before the change, the present print code can never
be called even if the link up fails.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
11 years agoENGR00242201-3 gpu: Makeup GPU driver for kernel 3.5.7
Loren HUANG [Tue, 29 Jan 2013 08:12:29 +0000 (16:12 +0800)]
ENGR00242201-3 gpu: Makeup GPU driver for kernel 3.5.7

Signed-off-by: Loren HUANG <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00241739-2 gpu: Enable thermal hot notification in gpu driver
Rong Dian [Mon, 28 Jan 2013 05:40:20 +0000 (13:40 +0800)]
ENGR00241739-2 gpu: Enable thermal hot notification in gpu driver

Using notify mechanism instead of global variable to
trigger gpu3d clock change through thermal driver

Signed-off-by: Rong Dian <b38775@freescale.com>
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
11 years agoENGR00241739-1 thermal: providing the thermal hot notification
Rong Dian [Fri, 25 Jan 2013 05:45:01 +0000 (13:45 +0800)]
ENGR00241739-1 thermal: providing the thermal hot notification

Create thermal hot's own hot notificaiton callback register and unregister
function.
Provide the thermal notification broadcast enable and disable through /sys fs.

Signed-off-by: Rong Dian <b38775@freescale.com>
11 years agoENGR00241582 MX6 USB host: USB host certification patch
make shi [Wed, 23 Jan 2013 02:36:00 +0000 (10:36 +0800)]
ENGR00241582 MX6 USB host: USB host certification patch

The patch include:
- USB test mode on hub port and Root-hub port
- support 3 types of message:
too much hub ties for hub attachment
too much power consumption for device attachment
unsupported device class warning
- support menuconfig select the FSL_USB_TEST_MODE, located in:
  -> Device Drivers
   -> USB support (USB_SUPPORT [=y])
     -> FSL High-speed Electrical Test Mode support

Signed-off-by: make shi <b15407@freescale.com>
11 years agoENGR00241003-2 pfuze: using _sel interface to add delay support
Anson Huang [Wed, 23 Jan 2013 07:11:34 +0000 (15:11 +0800)]
ENGR00241003-2 pfuze: using _sel interface to add delay support

use regulator _sel interface set to support auto delay,
as when regulator's voltage go up, it will take some time
to ramp up to the required voltage, so the delay is necessary.
_sel interface set support such function, now we switch to this
interface set.

Signed-off-by: Anson Huang <b20788@freescale.com>
11 years agoENGR00241003-1 mx6: need to add delay in LDO voltage setting
Anson Huang [Mon, 21 Jan 2013 08:20:56 +0000 (16:20 +0800)]
ENGR00241003-1 mx6: need to add delay in LDO voltage setting

1.LDO ramp up time may be modified by ROM code
according to fuse setting, cpu freq driver use
fixed delay time which assume the LDO ramp up time
is the reset value of ANATOP register, need to set
it to reset value in regulator init.

2.The regulator set voltage should take care of
the ramp up time, calculate the ramp up time based
of register setting and to the delay, make sure that
when the set voltage function return, the voltage is
stable enough.

3.CPUFreq no need to use delay, it is already taken
care by regulator voltage setting.

Signed-off-by: Anson Huang <b20788@freescale.com>