1 Qualcomm Shared Memory Point 2 Point binding
3 The Shared Memory Point to Point (SMP2P) protocol facilitates communication of
4 a single 32-bit value between two processors. Each value has a single writer
5 (the local side) and a single reader (the remote side). Values are uniquely
6 identified in the system by the directed edge (local processor ID to remote
7 processor ID) and a string identifier. This documents defines the binding for a
8 driver that implements and exposes this protocol as a set of GPIO and interrupt
14 Definition: must be one of:
19 Value type: <prop-encoded-array>
20 Definition: one entry specifying the smp2p notification interrupt
24 Value type: <prop-encoded-array>
25 Definition: three entries specifying the outgoing ipc bit used for
26 signaling the remote end of the smp2p edge:
27 - phandle to a syscon node representing the apcs registers
28 - u32 representing offset to the register within the syscon
29 - u32 representing the ipc bit within the register
33 Value type: <u32 array>
34 Definition: two identifiers of the inbound and outbound smem items used
40 Definition: specifies the identfier of the local endpoint of this edge
45 Definition: specifies the identfier of the remote endpoint of this edge
48 Each SMP2P pair contain a set of inbound and outbound entries, these are
49 described in subnodes of the smp2p device node. The node names are not
55 Definition: specifies the name of this entry, for inbound entries this
56 will be used to match against the remotely allocated entry
57 and for outbound entries this name is used for allocating
63 Definition: marks the entry as inbound; the node should be specified
64 as a two cell interrupt-controller as defined in
65 "../interrupt-controller/interrupts.txt"
70 Definition: marks the entry as outbound; the node should be specified
71 as a two cell gpio-controller as defined in "gpio.txt"
75 The following example shows the SMP2P setup with the wireless processor,
76 defined from the 8974 apps processor's point-of-view. It encompasses one
77 inbound and one outbound entry:
80 compatible = "qcom,smp2p";
81 qcom,smem = <431>, <451>;
83 interrupts = <0 143 1>;
85 qcom,ipc = <&apcs 8 18>;
88 qcom,remote-pid = <4>;
90 wcnss_smp2p_out: master-kernel {
91 qcom,entry-name = "master-kernel";
98 wcnss_smp2p_in: slave-kernel {
99 qcom,entry-name = "slave-kernel";
102 interrupt-controller;
103 #interrupt-cells = <2>;