arch/arm/boot/dts/imx6qdl-sabresd.dtsi

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/input/input.h>
  15
  16 / {
  17         chosen {
  18                 stdout-path = &uart1;
  19         };
  20
  21         memory {
  22                 reg = <0x10000000 0x40000000>;
  23         };
  24
  25         regulators {
  26                 compatible = "simple-bus";
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 reg_usb_otg_vbus: regulator@0 {
  31                         compatible = "regulator-fixed";
  32                         reg = <0>;
  33                         regulator-name = "usb_otg_vbus";
  34                         regulator-min-microvolt = <5000000>;
  35                         regulator-max-microvolt = <5000000>;
  36                         gpio = <&gpio3 22 0>;
  37                         enable-active-high;
  38                 };
  39
  40                 reg_usb_h1_vbus: regulator@1 {
  41                         compatible = "regulator-fixed";
  42                         reg = <1>;
  43                         regulator-name = "usb_h1_vbus";
  44                         regulator-min-microvolt = <5000000>;
  45                         regulator-max-microvolt = <5000000>;
  46                         gpio = <&gpio1 29 0>;
  47                         enable-active-high;
  48                 };
  49
  50                 reg_audio: regulator@2 {
  51                         compatible = "regulator-fixed";
  52                         reg = <2>;
  53                         regulator-name = "wm8962-supply";
  54                         gpio = <&gpio4 10 0>;
  55                         enable-active-high;
  56                 };
  57         };
  58
  59         gpio-keys {
  60                 compatible = "gpio-keys";
  61                 pinctrl-names = "default";
  62                 pinctrl-0 = <&pinctrl_gpio_keys>;
  63
  64                 power {
  65                         label = "Power Button";
  66                         gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
  67                         gpio-key,wakeup;
  68                         linux,code = <KEY_POWER>;
  69                 };
  70
  71                 volume-up {
  72                         label = "Volume Up";
  73                         gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  74                         gpio-key,wakeup;
  75                         linux,code = <KEY_VOLUMEUP>;
  76                 };
  77
  78                 volume-down {
  79                         label = "Volume Down";
  80                         gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
  81                         gpio-key,wakeup;
  82                         linux,code = <KEY_VOLUMEDOWN>;
  83                 };
  84         };
  85
  86         sound {
  87                 compatible = "fsl,imx6q-sabresd-wm8962",
  88                            "fsl,imx-audio-wm8962";
  89                 model = "wm8962-audio";
  90                 ssi-controller = <&ssi2>;
  91                 audio-codec = <&codec>;
  92                 audio-routing =
  93                         "Headphone Jack", "HPOUTL",
  94                         "Headphone Jack", "HPOUTR",
  95                         "Ext Spk", "SPKOUTL",
  96                         "Ext Spk", "SPKOUTR",
  97                         "MICBIAS", "AMIC",
  98                         "IN3R", "MICBIAS",
  99                         "DMIC", "MICBIAS",
 100                         "DMICDAT", "DMIC";
 101                 mux-int-port = <2>;
 102                 mux-ext-port = <3>;
 103         };
 104
 105         backlight {
 106                 compatible = "pwm-backlight";
 107                 pwms = <&pwm1 0 5000000>;
 108                 brightness-levels = <0 4 8 16 32 64 128 255>;
 109                 default-brightness-level = <7>;
 110                 status = "okay";
 111         };
 112
 113         leds {
 114                 compatible = "gpio-leds";
 115                 pinctrl-names = "default";
 116                 pinctrl-0 = <&pinctrl_gpio_leds>;
 117
 118                 red {
 119                         gpios = <&gpio1 2 0>;
 120                         default-state = "on";
 121                 };
 122         };
 123
 124         sound {
 125                 compatible = "fsl,imx6q-sabresd-wm8962",
 126                            "fsl,imx-audio-wm8962";
 127                 model = "wm8962-audio";
 128                 ssi-controller = <&ssi2>;
 129                 audio-codec = <&codec>;
 130                 audio-routing =
 131                         "Headphone Jack", "HPOUTL",
 132                         "Headphone Jack", "HPOUTR",
 133                         "Ext Spk", "SPKOUTL",
 134                         "Ext Spk", "SPKOUTR",
 135                         "MICBIAS", "AMIC",
 136                         "IN3R", "MICBIAS",
 137                         "DMIC", "MICBIAS",
 138                         "DMICDAT", "DMIC";
 139                 mux-int-port = <2>;
 140                 mux-ext-port = <3>;
 141         };
 142
 143         v4l2_cap_0 {
 144                 compatible = "fsl,imx6q-v4l2-capture";
 145                 ipu_id = <0>;
 146                 csi_id = <0>;
 147                 mclk_source = <0>;
 148                 status = "okay";
 149         };
 150
 151         v4l2_cap_1 {
 152                 compatible = "fsl,imx6q-v4l2-capture";
 153                 ipu_id = <0>;
 154                 csi_id = <1>;
 155                 mclk_source = <0>;
 156                 status = "okay";
 157         };
 158
 159         v4l2_out {
 160                 compatible = "fsl,mxc_v4l2_output";
 161                 status = "okay";
 162         };
 163
 164         lvds_cabc_ctrl {
 165                 lvds0-gpios = <&gpio6 15 0>;
 166                 lvds1-gpios = <&gpio6 16 0>;
 167         };
 168 };
 169
 170 &audmux {
 171         pinctrl-names = "default";
 172         pinctrl-0 = <&pinctrl_audmux>;
 173         status = "okay";
 174 };
 175
 176 &ecspi1 {
 177         fsl,spi-num-chipselects = <1>;
 178         cs-gpios = <&gpio4 9 0>;
 179         pinctrl-names = "default";
 180         pinctrl-0 = <&pinctrl_ecspi1>;
 181         status = "okay";
 182
 183         flash: m25p80@0 {
 184                 #address-cells = <1>;
 185                 #size-cells = <1>;
 186                 compatible = "st,m25p32";
 187                 spi-max-frequency = <20000000>;
 188                 reg = <0>;
 189         };
 190 };
 191
 192 &fec {
 193         pinctrl-names = "default";
 194         pinctrl-0 = <&pinctrl_enet>;
 195         phy-mode = "rgmii";
 196         phy-reset-gpios = <&gpio1 25 0>;
 197         status = "okay";
 198 };
 199
 200 &hdmi {
 201         ddc-i2c-bus = <&i2c2>;
 202         status = "okay";
 203 };
 204
 205 &i2c1 {
 206         clock-frequency = <100000>;
 207         pinctrl-names = "default";
 208         pinctrl-0 = <&pinctrl_i2c1>;
 209         status = "okay";
 210
 211         codec: wm8962@1a {
 212                 compatible = "wlf,wm8962";
 213                 reg = <0x1a>;
 214                 clocks = <&clks 201>;
 215                 DCVDD-supply = <&reg_audio>;
 216                 DBVDD-supply = <&reg_audio>;
 217                 AVDD-supply = <&reg_audio>;
 218                 CPVDD-supply = <&reg_audio>;
 219                 MICVDD-supply = <&reg_audio>;
 220                 PLLVDD-supply = <&reg_audio>;
 221                 SPKVDD1-supply = <&reg_audio>;
 222                 SPKVDD2-supply = <&reg_audio>;
 223                 gpio-cfg = <
 224                         0x0000 /* 0:Default */
 225                         0x0000 /* 1:Default */
 226                         0x0013 /* 2:FN_DMICCLK */
 227                         0x0000 /* 3:Default */
 228                         0x8014 /* 4:FN_DMICCDAT */
 229                         0x0000 /* 5:Default */
 230                 >;
 231        };
 232 };
 233
 234 &i2c2 {
 235         clock-frequency = <100000>;
 236         pinctrl-names = "default";
 237         pinctrl-0 = <&pinctrl_i2c2>;
 238         status = "okay";
 239
 240         pmic: pfuze100@08 {
 241                 compatible = "fsl,pfuze100";
 242                 reg = <0x08>;
 243
 244                 regulators {
 245                         sw1a_reg: sw1ab {
 246                                 regulator-min-microvolt = <300000>;
 247                                 regulator-max-microvolt = <1875000>;
 248                                 regulator-boot-on;
 249                                 regulator-always-on;
 250                                 regulator-ramp-delay = <6250>;
 251                         };
 252
 253                         sw1c_reg: sw1c {
 254                                 regulator-min-microvolt = <300000>;
 255                                 regulator-max-microvolt = <1875000>;
 256                                 regulator-boot-on;
 257                                 regulator-always-on;
 258                                 regulator-ramp-delay = <6250>;
 259                         };
 260
 261                         sw2_reg: sw2 {
 262                                 regulator-min-microvolt = <800000>;
 263                                 regulator-max-microvolt = <3300000>;
 264                                 regulator-boot-on;
 265                                 regulator-always-on;
 266                         };
 267
 268                         sw3a_reg: sw3a {
 269                                 regulator-min-microvolt = <400000>;
 270                                 regulator-max-microvolt = <1975000>;
 271                                 regulator-boot-on;
 272                                 regulator-always-on;
 273                         };
 274
 275                         sw3b_reg: sw3b {
 276                                 regulator-min-microvolt = <400000>;
 277                                 regulator-max-microvolt = <1975000>;
 278                                 regulator-boot-on;
 279                                 regulator-always-on;
 280                         };
 281
 282                         sw4_reg: sw4 {
 283                                 regulator-min-microvolt = <800000>;
 284                                 regulator-max-microvolt = <3300000>;
 285                         };
 286
 287                         swbst_reg: swbst {
 288                                 regulator-min-microvolt = <5000000>;
 289                                 regulator-max-microvolt = <5150000>;
 290                         };
 291
 292                         snvs_reg: vsnvs {
 293                                 regulator-min-microvolt = <1000000>;
 294                                 regulator-max-microvolt = <3000000>;
 295                                 regulator-boot-on;
 296                                 regulator-always-on;
 297                         };
 298
 299                         vref_reg: vrefddr {
 300                                 regulator-boot-on;
 301                                 regulator-always-on;
 302                         };
 303
 304                         vgen1_reg: vgen1 {
 305                                 regulator-min-microvolt = <800000>;
 306                                 regulator-max-microvolt = <1550000>;
 307                         };
 308
 309                         vgen2_reg: vgen2 {
 310                                 regulator-min-microvolt = <800000>;
 311                                 regulator-max-microvolt = <1550000>;
 312                         };
 313
 314                         vgen3_reg: vgen3 {
 315                                 regulator-min-microvolt = <1800000>;
 316                                 regulator-max-microvolt = <3300000>;
 317                         };
 318
 319                         vgen4_reg: vgen4 {
 320                                 regulator-min-microvolt = <1800000>;
 321                                 regulator-max-microvolt = <3300000>;
 322                                 regulator-always-on;
 323                         };
 324
 325                         vgen5_reg: vgen5 {
 326                                 regulator-min-microvolt = <1800000>;
 327                                 regulator-max-microvolt = <3300000>;
 328                                 regulator-always-on;
 329                         };
 330
 331                         vgen6_reg: vgen6 {
 332                                 regulator-min-microvolt = <1800000>;
 333                                 regulator-max-microvolt = <3300000>;
 334                                 regulator-always-on;
 335                         };
 336                 };
 337         };
 338
 339         pmic: pfuze100@08 {
 340                 compatible = "fsl,pfuze100";
 341                 reg = <0x08>;
 342
 343                 regulators {
 344                         sw1a_reg: sw1ab {
 345                                 regulator-min-microvolt = <300000>;
 346                                 regulator-max-microvolt = <1875000>;
 347                                 regulator-boot-on;
 348                                 regulator-always-on;
 349                                 regulator-ramp-delay = <6250>;
 350                         };
 351
 352                         sw1c_reg: sw1c {
 353                                 regulator-min-microvolt = <300000>;
 354                                 regulator-max-microvolt = <1875000>;
 355                                 regulator-boot-on;
 356                                 regulator-always-on;
 357                         };
 358
 359                         sw2_reg: sw2 {
 360                                 regulator-min-microvolt = <800000>;
 361                                 regulator-max-microvolt = <3300000>;
 362                                 regulator-boot-on;
 363                                 regulator-always-on;
 364                         };
 365
 366                         sw3a_reg: sw3a {
 367                                 regulator-min-microvolt = <400000>;
 368                                 regulator-max-microvolt = <1975000>;
 369                                 regulator-boot-on;
 370                                 regulator-always-on;
 371                         };
 372
 373                         sw3b_reg: sw3b {
 374                                 regulator-min-microvolt = <400000>;
 375                                 regulator-max-microvolt = <1975000>;
 376                                 regulator-boot-on;
 377                                 regulator-always-on;
 378                         };
 379
 380                         sw4_reg: sw4 {
 381                                 regulator-min-microvolt = <800000>;
 382                                 regulator-max-microvolt = <3300000>;
 383                         };
 384
 385                         swbst_reg: swbst {
 386                                 regulator-min-microvolt = <5000000>;
 387                                 regulator-max-microvolt = <5150000>;
 388                         };
 389
 390                         snvs_reg: vsnvs {
 391                                 regulator-min-microvolt = <1000000>;
 392                                 regulator-max-microvolt = <3000000>;
 393                                 regulator-boot-on;
 394                                 regulator-always-on;
 395                         };
 396
 397                         vref_reg: vrefddr {
 398                                 regulator-boot-on;
 399                                 regulator-always-on;
 400                         };
 401
 402                         vgen1_reg: vgen1 {
 403                                 regulator-min-microvolt = <800000>;
 404                                 regulator-max-microvolt = <1550000>;
 405                         };
 406
 407                         vgen2_reg: vgen2 {
 408                                 regulator-min-microvolt = <800000>;
 409                                 regulator-max-microvolt = <1550000>;
 410                         };
 411
 412                         vgen3_reg: vgen3 {
 413                                 regulator-min-microvolt = <1800000>;
 414                                 regulator-max-microvolt = <3300000>;
 415                         };
 416
 417                         vgen4_reg: vgen4 {
 418                                 regulator-min-microvolt = <1800000>;
 419                                 regulator-max-microvolt = <3300000>;
 420                                 regulator-always-on;
 421                         };
 422
 423                         vgen5_reg: vgen5 {
 424                                 regulator-min-microvolt = <1800000>;
 425                                 regulator-max-microvolt = <3300000>;
 426                                 regulator-always-on;
 427                         };
 428
 429                         vgen6_reg: vgen6 {
 430                                 regulator-min-microvolt = <1800000>;
 431                                 regulator-max-microvolt = <3300000>;
 432                                 regulator-always-on;
 433                         };
 434                 };
 435         };
 436
 437         egalax_ts@04 {
 438                 compatible = "eeti,egalax_ts";
 439                 reg = <0x04>;
 440                 interrupt-parent = <&gpio6>;
 441                 interrupts = <8 2>;
 442                 wakeup-gpios = <&gpio6 8 0>;
 443         };
 444 };
 445
 446 &i2c3 {
 447         clock-frequency = <100000>;
 448         pinctrl-names = "default";
 449         pinctrl-0 = <&pinctrl_i2c3_2>;
 450         status = "okay";
 451
 452         egalax_ts@04 {
 453                 compatible = "eeti,egalax_ts";
 454                 reg = <0x04>;
 455                 interrupt-parent = <&gpio6>;
 456                 interrupts = <7 2>;
 457                 wakeup-gpios = <&gpio6 7 0>;
 458         };
 459 };
 460
 461 &i2c3 {
 462         clock-frequency = <100000>;
 463         pinctrl-names = "default";
 464         pinctrl-0 = <&pinctrl_i2c3>;
 465         status = "okay";
 466
 467         egalax_ts@04 {
 468                 compatible = "eeti,egalax_ts";
 469                 reg = <0x04>;
 470                 interrupt-parent = <&gpio6>;
 471                 interrupts = <7 2>;
 472                 wakeup-gpios = <&gpio6 7 0>;
 473         };
 474 };
 475
 476 &i2c1 {
 477         clock-frequency = <100000>;
 478         pinctrl-names = "default";
 479         pinctrl-0 = <&pinctrl_i2c1_2>;
 480         status = "okay";
 481
 482         codec: wm8962@1a {
 483                 compatible = "wlf,wm8962";
 484                 reg = <0x1a>;
 485                 clocks = <&clks 169>;
 486                 DCVDD-supply = <&reg_audio>;
 487                 DBVDD-supply = <&reg_audio>;
 488                 AVDD-supply = <&reg_audio>;
 489                 CPVDD-supply = <&reg_audio>;
 490                 MICVDD-supply = <&reg_audio>;
 491                 PLLVDD-supply = <&reg_audio>;
 492                 SPKVDD1-supply = <&reg_audio>;
 493                 SPKVDD2-supply = <&reg_audio>;
 494                 gpio-cfg = <
 495                         0x0000 /* 0:Default */
 496                         0x0000 /* 1:Default */
 497                         0x0013 /* 2:FN_DMICCLK */
 498                         0x0000 /* 3:Default */
 499                         0x8014 /* 4:FN_DMICCDAT */
 500                         0x0000 /* 5:Default */
 501                 >;
 502        };
 503 };
 504
 505 &iomuxc {
 506         pinctrl-names = "default";
 507         pinctrl-0 = <&pinctrl_hog>;
 508
 509         imx6qdl-sabresd {
 510                 pinctrl_hog: hoggrp {
 511                         fsl,pins = <
 512                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
 513                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
 514                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
 515                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
 516                                 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000
 517                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
 518                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 519                                 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
 520                                 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000
 521                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
 522                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
 523                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
 524                                 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
 525                         >;
 526                 };
 527
 528                 pinctrl_audmux: audmuxgrp {
 529                         fsl,pins = <
 530                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 531                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 532                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 533                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 534                         >;
 535                 };
 536
 537                 pinctrl_ecspi1: ecspi1grp {
 538                         fsl,pins = <
 539                                 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
 540                                 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
 541                                 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
 542                         >;
 543                 };
 544
 545                 pinctrl_enet: enetgrp {
 546                         fsl,pins = <
 547                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 548                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 549                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 550                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 551                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 552                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 553                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 554                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 555                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 556                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 557                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 558                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 559                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 560                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 561                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 562                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 563                         >;
 564                 };
 565
 566                 pinctrl_gpio_keys: gpio_keysgrp {
 567                         fsl,pins = <
 568                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
 569                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x80000000
 570                                 MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x80000000
 571                         >;
 572                 };
 573
 574                 pinctrl_i2c1: i2c1grp {
 575                         fsl,pins = <
 576                                 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
 577                                 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
 578                         >;
 579                 };
 580
 581                 pinctrl_i2c2: i2c2grp {
 582                         fsl,pins = <
 583                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 584                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 585                         >;
 586                 };
 587
 588                 pinctrl_i2c3: i2c3grp {
 589                         fsl,pins = <
 590                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 591                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 592                         >;
 593                 };
 594
 595                 pinctrl_pcie: pciegrp {
 596                         fsl,pins = <
 597                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x80000000
 598                         >;
 599                 };
 600
 601                 pinctrl_pwm1: pwm1grp {
 602                         fsl,pins = <
 603                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
 604                         >;
 605                 };
 606
 607                 pinctrl_uart1: uart1grp {
 608                         fsl,pins = <
 609                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 610                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 611                         >;
 612                 };
 613
 614                 pinctrl_usbotg: usbotggrp {
 615                         fsl,pins = <
 616                                 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 617                         >;
 618                 };
 619
 620                 pinctrl_usdhc2: usdhc2grp {
 621                         fsl,pins = <
 622                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 623                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 624                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 625                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 626                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 627                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 628                                 MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x17059
 629                                 MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x17059
 630                                 MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x17059
 631                                 MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x17059
 632                         >;
 633                 };
 634
 635                 pinctrl_usdhc3: usdhc3grp {
 636                         fsl,pins = <
 637                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 638                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 639                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 640                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 641                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 642                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 643                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
 644                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
 645                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
 646                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
 647                         >;
 648                 };
 649
 650                 pinctrl_usdhc4: usdhc4grp {
 651                         fsl,pins = <
 652                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 653                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 654                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 655                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 656                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 657                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 658                                 MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
 659                                 MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
 660                                 MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
 661                                 MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
 662                         >;
 663                 };
 664         };
 665
 666         gpio_leds {
 667                 pinctrl_gpio_leds: gpioledsgrp {
 668                         fsl,pins = <
 669                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
 670                         >;
 671                 };
 672         };
 673 };
 674
 675 &ldb {
 676         status = "okay";
 677
 678         lvds-channel@1 {
 679                 fsl,data-mapping = "spwg";
 680                 fsl,data-width = <18>;
 681                 status = "okay";
 682
 683                 display-timings {
 684                         native-mode = <&timing0>;
 685                         timing0: hsd100pxn1 {
 686                                 clock-frequency = <65000000>;
 687                                 hactive = <1024>;
 688                                 vactive = <768>;
 689                                 hback-porch = <220>;
 690                                 hfront-porch = <40>;
 691                                 vback-porch = <21>;
 692                                 vfront-porch = <7>;
 693                                 hsync-len = <60>;
 694                                 vsync-len = <10>;
 695                         };
 696                 };
 697         };
 698 };
 699
 700 &pcie {
 701         pinctrl-names = "default";
 702         pinctrl-0 = <&pinctrl_pcie>;
 703         reset-gpio = <&gpio7 12 0>;
 704         status = "okay";
 705 };
 706
 707 &pwm1 {
 708         pinctrl-names = "default";
 709         pinctrl-0 = <&pinctrl_pwm1>;
 710         status = "okay";
 711 };
 712
 713 &pwm1 {
 714         pinctrl-names = "default";
 715         pinctrl-0 = <&pinctrl_pwm1_1>;
 716         status = "okay";
 717 };
 718
 719 &ssi2 {
 720         fsl,mode = "i2s-slave";
 721         status = "okay";
 722 };
 723
 724 &uart1 {
 725         pinctrl-names = "default";
 726         pinctrl-0 = <&pinctrl_uart1>;
 727         status = "okay";
 728 };
 729
 730 &usbh1 {
 731         vbus-supply = <&reg_usb_h1_vbus>;
 732         status = "okay";
 733 };
 734
 735 &usbotg {
 736         vbus-supply = <&reg_usb_otg_vbus>;
 737         pinctrl-names = "default";
 738         pinctrl-0 = <&pinctrl_usbotg>;
 739         disable-over-current;
 740         status = "okay";
 741 };
 742
 743 &usdhc2 {
 744         pinctrl-names = "default";
 745         pinctrl-0 = <&pinctrl_usdhc2>;
 746         bus-width = <8>;
 747         cd-gpios = <&gpio2 2 0>;
 748         wp-gpios = <&gpio2 3 0>;
 749         no-1-8-v;
 750         status = "okay";
 751 };
 752
 753 &usdhc3 {
 754         pinctrl-names = "default";
 755         pinctrl-0 = <&pinctrl_usdhc3>;
 756         bus-width = <8>;
 757         cd-gpios = <&gpio2 0 0>;
 758         wp-gpios = <&gpio2 1 0>;
 759         no-1-8-v;
 760         status = "okay";
 761 };
 762
 763 &usdhc4 {
 764         pinctrl-names = "default";
 765         pinctrl-0 = <&pinctrl_usdhc4>;
 766         bus-width = <8>;
 767         non-removable;
 768         no-1-8-v;
 769         status = "okay";
 770 };