2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include "skeleton.dtsi"
49 intc: interrupt-controller@00a01000 {
50 compatible = "arm,cortex-a9-gic";
51 #interrupt-cells = <3>;
53 reg = <0x00a01000 0x1000>,
62 compatible = "fsl,imx-ckil", "fixed-clock";
64 clock-frequency = <32768>;
68 compatible = "fsl,imx-ckih1", "fixed-clock";
70 clock-frequency = <0>;
74 compatible = "fsl,imx-osc", "fixed-clock";
76 clock-frequency = <24000000>;
83 compatible = "simple-bus";
84 interrupt-parent = <&intc>;
87 dma_apbh: dma-apbh@00110000 {
88 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
89 reg = <0x00110000 0x2000>;
90 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
91 <0 13 IRQ_TYPE_LEVEL_HIGH>,
92 <0 13 IRQ_TYPE_LEVEL_HIGH>,
93 <0 13 IRQ_TYPE_LEVEL_HIGH>;
94 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
100 gpmi: gpmi-nand@00112000 {
101 compatible = "fsl,imx6q-gpmi-nand";
102 #address-cells = <1>;
104 reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
105 reg-names = "gpmi-nand", "bch";
106 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
107 interrupt-names = "bch";
108 clocks = <&clks 152>, <&clks 153>, <&clks 151>,
109 <&clks 150>, <&clks 149>;
110 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
111 "gpmi_bch_apb", "per1_bch";
112 dmas = <&dma_apbh 0>;
118 compatible = "arm,cortex-a9-twd-timer";
119 reg = <0x00a00600 0x20>;
120 interrupts = <1 13 0xf01>;
124 L2: l2-cache@00a02000 {
125 compatible = "arm,pl310-cache";
126 reg = <0x00a02000 0x1000>;
127 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
130 arm,tag-latency = <4 2 3>;
131 arm,data-latency = <4 2 3>;
134 pcie: pcie@0x01000000 {
135 compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
136 reg = <0x01ffc000 0x4000>; /* DBI */
137 #address-cells = <3>;
140 ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
141 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
142 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
144 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
145 interrupt-names = "msi";
146 #interrupt-cells = <1>;
147 interrupt-map-mask = <0 0 0 0x7>;
148 interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
149 <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
150 <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
151 <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
152 clocks = <&clks 144>, <&clks 206>, <&clks 189>;
153 clock-names = "pcie", "pcie_bus", "pcie_phy";
158 compatible = "arm,cortex-a9-pmu";
159 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
162 aips-bus@02000000 { /* AIPS1 */
163 compatible = "fsl,aips-bus", "simple-bus";
164 #address-cells = <1>;
166 reg = <0x02000000 0x100000>;
170 compatible = "fsl,spba-bus", "simple-bus";
171 #address-cells = <1>;
173 reg = <0x02000000 0x40000>;
176 spdif: spdif@02004000 {
177 compatible = "fsl,imx35-spdif";
178 reg = <0x02004000 0x4000>;
179 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
180 dmas = <&sdma 14 18 0>,
182 dma-names = "rx", "tx";
183 clocks = <&clks 197>, <&clks 3>,
184 <&clks 197>, <&clks 107>,
185 <&clks 0>, <&clks 118>,
186 <&clks 0>, <&clks 139>,
188 clock-names = "core", "rxtx0",
196 ecspi1: ecspi@02008000 {
197 #address-cells = <1>;
199 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
200 reg = <0x02008000 0x4000>;
201 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
202 clocks = <&clks 112>, <&clks 112>;
203 clock-names = "ipg", "per";
204 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
205 dma-names = "rx", "tx";
209 ecspi2: ecspi@0200c000 {
210 #address-cells = <1>;
212 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
213 reg = <0x0200c000 0x4000>;
214 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
215 clocks = <&clks 113>, <&clks 113>;
216 clock-names = "ipg", "per";
217 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
218 dma-names = "rx", "tx";
222 ecspi3: ecspi@02010000 {
223 #address-cells = <1>;
225 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
226 reg = <0x02010000 0x4000>;
227 interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
228 clocks = <&clks 114>, <&clks 114>;
229 clock-names = "ipg", "per";
230 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
231 dma-names = "rx", "tx";
235 ecspi4: ecspi@02014000 {
236 #address-cells = <1>;
238 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
239 reg = <0x02014000 0x4000>;
240 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
241 clocks = <&clks 115>, <&clks 115>;
242 clock-names = "ipg", "per";
243 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
244 dma-names = "rx", "tx";
248 uart1: serial@02020000 {
249 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
250 reg = <0x02020000 0x4000>;
251 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
252 clocks = <&clks 160>, <&clks 161>;
253 clock-names = "ipg", "per";
254 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
255 dma-names = "rx", "tx";
259 esai: esai@02024000 {
260 reg = <0x02024000 0x4000>;
261 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
265 compatible = "fsl,imx6q-ssi",
268 reg = <0x02028000 0x4000>;
269 interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
270 clocks = <&clks 178>;
271 dmas = <&sdma 37 1 0>,
273 dma-names = "rx", "tx";
274 fsl,fifo-depth = <15>;
275 fsl,ssi-dma-events = <38 37>;
280 compatible = "fsl,imx6q-ssi",
283 reg = <0x0202c000 0x4000>;
284 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&clks 179>;
286 dmas = <&sdma 41 1 0>,
288 dma-names = "rx", "tx";
289 fsl,fifo-depth = <15>;
290 fsl,ssi-dma-events = <42 41>;
295 compatible = "fsl,imx6q-ssi",
298 reg = <0x02030000 0x4000>;
299 interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
300 clocks = <&clks 180>;
301 dmas = <&sdma 45 1 0>,
303 dma-names = "rx", "tx";
304 fsl,fifo-depth = <15>;
305 fsl,ssi-dma-events = <46 45>;
309 asrc: asrc@02034000 {
310 compatible = "fsl,imx6q-asrc";
311 reg = <0x02034000 0x4000>;
312 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
313 clocks = <&clks 107>;
314 clock-names = "core";
315 dmas = <&sdma 17 20 0>, <&sdma 18 20 0>, <&sdma 19 20 0>,
316 <&sdma 20 20 0>, <&sdma 21 20 0>, <&sdma 22 20 0>;
317 dma-names = "rxa", "rxb", "rxc",
319 fsl,clk-map-version = <2>;
320 fsl,clk-channel-bits = <4>;
325 reg = <0x0203c000 0x4000>;
330 reg = <0x02040000 0x3c000>;
331 interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>,
332 <0 12 IRQ_TYPE_LEVEL_HIGH>;
335 aipstz@0207c000 { /* AIPSTZ1 */
336 reg = <0x0207c000 0x4000>;
341 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
342 reg = <0x02080000 0x4000>;
343 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
344 clocks = <&clks 62>, <&clks 145>;
345 clock-names = "ipg", "per";
350 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
351 reg = <0x02084000 0x4000>;
352 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
353 clocks = <&clks 62>, <&clks 146>;
354 clock-names = "ipg", "per";
359 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
360 reg = <0x02088000 0x4000>;
361 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
362 clocks = <&clks 62>, <&clks 147>;
363 clock-names = "ipg", "per";
368 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
369 reg = <0x0208c000 0x4000>;
370 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
371 clocks = <&clks 62>, <&clks 148>;
372 clock-names = "ipg", "per";
375 can1: flexcan@02090000 {
376 compatible = "fsl,imx6q-flexcan";
377 reg = <0x02090000 0x4000>;
378 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
379 clocks = <&clks 108>, <&clks 109>;
380 clock-names = "ipg", "per";
384 can2: flexcan@02094000 {
385 compatible = "fsl,imx6q-flexcan";
386 reg = <0x02094000 0x4000>;
387 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
388 clocks = <&clks 110>, <&clks 111>;
389 clock-names = "ipg", "per";
394 compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
395 reg = <0x02098000 0x4000>;
396 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
397 clocks = <&clks 119>, <&clks 120>;
398 clock-names = "ipg", "per";
401 gpio1: gpio@0209c000 {
402 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
403 reg = <0x0209c000 0x4000>;
404 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
405 <0 67 IRQ_TYPE_LEVEL_HIGH>;
408 interrupt-controller;
409 #interrupt-cells = <2>;
412 gpio2: gpio@020a0000 {
413 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
414 reg = <0x020a0000 0x4000>;
415 interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
416 <0 69 IRQ_TYPE_LEVEL_HIGH>;
419 interrupt-controller;
420 #interrupt-cells = <2>;
423 gpio3: gpio@020a4000 {
424 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
425 reg = <0x020a4000 0x4000>;
426 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
427 <0 71 IRQ_TYPE_LEVEL_HIGH>;
430 interrupt-controller;
431 #interrupt-cells = <2>;
434 gpio4: gpio@020a8000 {
435 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
436 reg = <0x020a8000 0x4000>;
437 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
438 <0 73 IRQ_TYPE_LEVEL_HIGH>;
441 interrupt-controller;
442 #interrupt-cells = <2>;
445 gpio5: gpio@020ac000 {
446 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
447 reg = <0x020ac000 0x4000>;
448 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
449 <0 75 IRQ_TYPE_LEVEL_HIGH>;
452 interrupt-controller;
453 #interrupt-cells = <2>;
456 gpio6: gpio@020b0000 {
457 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
458 reg = <0x020b0000 0x4000>;
459 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>,
460 <0 77 IRQ_TYPE_LEVEL_HIGH>;
463 interrupt-controller;
464 #interrupt-cells = <2>;
467 gpio7: gpio@020b4000 {
468 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
469 reg = <0x020b4000 0x4000>;
470 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>,
471 <0 79 IRQ_TYPE_LEVEL_HIGH>;
474 interrupt-controller;
475 #interrupt-cells = <2>;
479 reg = <0x020b8000 0x4000>;
480 interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
483 wdog1: wdog@020bc000 {
484 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
485 reg = <0x020bc000 0x4000>;
486 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
490 wdog2: wdog@020c0000 {
491 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
492 reg = <0x020c0000 0x4000>;
493 interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
499 compatible = "fsl,imx6q-ccm";
500 reg = <0x020c4000 0x4000>;
501 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
502 <0 88 IRQ_TYPE_LEVEL_HIGH>;
506 anatop: anatop@020c8000 {
507 compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
508 reg = <0x020c8000 0x1000>;
509 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
510 <0 54 IRQ_TYPE_LEVEL_HIGH>,
511 <0 127 IRQ_TYPE_LEVEL_HIGH>;
514 compatible = "fsl,anatop-regulator";
515 regulator-name = "vdd1p1";
516 regulator-min-microvolt = <800000>;
517 regulator-max-microvolt = <1375000>;
519 anatop-reg-offset = <0x110>;
520 anatop-vol-bit-shift = <8>;
521 anatop-vol-bit-width = <5>;
522 anatop-min-bit-val = <4>;
523 anatop-min-voltage = <800000>;
524 anatop-max-voltage = <1375000>;
528 compatible = "fsl,anatop-regulator";
529 regulator-name = "vdd3p0";
530 regulator-min-microvolt = <2800000>;
531 regulator-max-microvolt = <3150000>;
533 anatop-reg-offset = <0x120>;
534 anatop-vol-bit-shift = <8>;
535 anatop-vol-bit-width = <5>;
536 anatop-min-bit-val = <0>;
537 anatop-min-voltage = <2625000>;
538 anatop-max-voltage = <3400000>;
542 compatible = "fsl,anatop-regulator";
543 regulator-name = "vdd2p5";
544 regulator-min-microvolt = <2000000>;
545 regulator-max-microvolt = <2750000>;
547 anatop-reg-offset = <0x130>;
548 anatop-vol-bit-shift = <8>;
549 anatop-vol-bit-width = <5>;
550 anatop-min-bit-val = <0>;
551 anatop-min-voltage = <2000000>;
552 anatop-max-voltage = <2750000>;
555 reg_arm: regulator-vddcore@140 {
556 compatible = "fsl,anatop-regulator";
557 regulator-name = "vddarm";
558 regulator-min-microvolt = <725000>;
559 regulator-max-microvolt = <1450000>;
561 anatop-reg-offset = <0x140>;
562 anatop-vol-bit-shift = <0>;
563 anatop-vol-bit-width = <5>;
564 anatop-delay-reg-offset = <0x170>;
565 anatop-delay-bit-shift = <24>;
566 anatop-delay-bit-width = <2>;
567 anatop-min-bit-val = <1>;
568 anatop-min-voltage = <725000>;
569 anatop-max-voltage = <1450000>;
572 reg_pu: regulator-vddpu@140 {
573 compatible = "fsl,anatop-regulator";
574 regulator-name = "vddpu";
575 regulator-min-microvolt = <725000>;
576 regulator-max-microvolt = <1450000>;
578 anatop-reg-offset = <0x140>;
579 anatop-vol-bit-shift = <9>;
580 anatop-vol-bit-width = <5>;
581 anatop-delay-reg-offset = <0x170>;
582 anatop-delay-bit-shift = <26>;
583 anatop-delay-bit-width = <2>;
584 anatop-min-bit-val = <1>;
585 anatop-min-voltage = <725000>;
586 anatop-max-voltage = <1450000>;
589 reg_soc: regulator-vddsoc@140 {
590 compatible = "fsl,anatop-regulator";
591 regulator-name = "vddsoc";
592 regulator-min-microvolt = <725000>;
593 regulator-max-microvolt = <1450000>;
595 anatop-reg-offset = <0x140>;
596 anatop-vol-bit-shift = <18>;
597 anatop-vol-bit-width = <5>;
598 anatop-delay-reg-offset = <0x170>;
599 anatop-delay-bit-shift = <28>;
600 anatop-delay-bit-width = <2>;
601 anatop-min-bit-val = <1>;
602 anatop-min-voltage = <725000>;
603 anatop-max-voltage = <1450000>;
608 compatible = "fsl,imx6q-tempmon";
609 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
610 fsl,tempmon = <&anatop>;
611 fsl,tempmon-data = <&ocotp>;
612 clocks = <&clks 172>;
615 usbphy1: usbphy@020c9000 {
616 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
617 reg = <0x020c9000 0x1000>;
618 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&clks 182>;
620 fsl,anatop = <&anatop>;
623 usbphy2: usbphy@020ca000 {
624 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
625 reg = <0x020ca000 0x1000>;
626 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
627 clocks = <&clks 183>;
628 fsl,anatop = <&anatop>;
632 compatible = "fsl,sec-v4.0-mon", "simple-bus";
633 #address-cells = <1>;
635 ranges = <0 0x020cc000 0x4000>;
638 compatible = "fsl,sec-v4.0-mon-rtc-lp";
640 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
641 <0 20 IRQ_TYPE_LEVEL_HIGH>;
645 epit1: epit@020d0000 { /* EPIT1 */
646 reg = <0x020d0000 0x4000>;
647 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
650 epit2: epit@020d4000 { /* EPIT2 */
651 reg = <0x020d4000 0x4000>;
652 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
656 compatible = "fsl,imx6q-src", "fsl,imx51-src";
657 reg = <0x020d8000 0x4000>;
658 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
659 <0 96 IRQ_TYPE_LEVEL_HIGH>;
664 compatible = "fsl,imx6q-gpc";
665 reg = <0x020dc000 0x4000>;
666 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
667 <0 90 IRQ_TYPE_LEVEL_HIGH>;
670 gpr: iomuxc-gpr@020e0000 {
671 compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
672 reg = <0x020e0000 0x38>;
675 iomuxc: iomuxc@020e0000 {
676 compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
677 reg = <0x020e0000 0x4000>;
681 #address-cells = <1>;
683 compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
688 #address-cells = <1>;
696 lvds0_mux_0: endpoint {
697 remote-endpoint = <&ipu1_di0_lvds0>;
704 lvds0_mux_1: endpoint {
705 remote-endpoint = <&ipu1_di1_lvds0>;
711 #address-cells = <1>;
719 lvds1_mux_0: endpoint {
720 remote-endpoint = <&ipu1_di0_lvds1>;
727 lvds1_mux_1: endpoint {
728 remote-endpoint = <&ipu1_di1_lvds1>;
735 #address-cells = <1>;
737 reg = <0x00120000 0x9000>;
738 interrupts = <0 115 0x04>;
740 clocks = <&clks 123>, <&clks 124>;
741 clock-names = "iahb", "isfr";
747 hdmi_mux_0: endpoint {
748 remote-endpoint = <&ipu1_di0_hdmi>;
755 hdmi_mux_1: endpoint {
756 remote-endpoint = <&ipu1_di1_hdmi>;
761 dcic1: dcic@020e4000 {
762 reg = <0x020e4000 0x4000>;
763 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
766 dcic2: dcic@020e8000 {
767 reg = <0x020e8000 0x4000>;
768 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
771 sdma: sdma@020ec000 {
772 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
773 reg = <0x020ec000 0x4000>;
774 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
775 clocks = <&clks 155>, <&clks 155>;
776 clock-names = "ipg", "ahb";
778 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
782 aips-bus@02100000 { /* AIPS2 */
783 compatible = "fsl,aips-bus", "simple-bus";
784 #address-cells = <1>;
786 reg = <0x02100000 0x100000>;
790 reg = <0x02100000 0x40000>;
791 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>,
792 <0 106 IRQ_TYPE_LEVEL_HIGH>;
795 aipstz@0217c000 { /* AIPSTZ2 */
796 reg = <0x0217c000 0x4000>;
799 usbotg: usb@02184000 {
800 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
801 reg = <0x02184000 0x200>;
802 interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
803 clocks = <&clks 162>;
804 fsl,usbphy = <&usbphy1>;
805 fsl,usbmisc = <&usbmisc 0>;
809 usbh1: usb@02184200 {
810 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
811 reg = <0x02184200 0x200>;
812 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
813 clocks = <&clks 162>;
814 fsl,usbphy = <&usbphy2>;
815 fsl,usbmisc = <&usbmisc 1>;
819 usbh2: usb@02184400 {
820 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
821 reg = <0x02184400 0x200>;
822 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
823 clocks = <&clks 162>;
824 fsl,usbmisc = <&usbmisc 2>;
828 usbh3: usb@02184600 {
829 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
830 reg = <0x02184600 0x200>;
831 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
832 clocks = <&clks 162>;
833 fsl,usbmisc = <&usbmisc 3>;
837 usbmisc: usbmisc@02184800 {
839 compatible = "fsl,imx6q-usbmisc";
840 reg = <0x02184800 0x200>;
841 clocks = <&clks 162>;
844 fec: ethernet@02188000 {
845 compatible = "fsl,imx6q-fec";
846 reg = <0x02188000 0x4000>;
847 interrupts-extended =
848 <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
849 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
850 clocks = <&clks 117>, <&clks 117>, <&clks 190>;
851 clock-names = "ipg", "ahb", "ptp";
856 reg = <0x0218c000 0x4000>;
857 interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>,
858 <0 117 IRQ_TYPE_LEVEL_HIGH>,
859 <0 126 IRQ_TYPE_LEVEL_HIGH>;
862 usdhc1: usdhc@02190000 {
863 compatible = "fsl,imx6q-usdhc";
864 reg = <0x02190000 0x4000>;
865 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
866 clocks = <&clks 163>, <&clks 163>, <&clks 163>;
867 clock-names = "ipg", "ahb", "per";
872 usdhc2: usdhc@02194000 {
873 compatible = "fsl,imx6q-usdhc";
874 reg = <0x02194000 0x4000>;
875 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
876 clocks = <&clks 164>, <&clks 164>, <&clks 164>;
877 clock-names = "ipg", "ahb", "per";
882 usdhc3: usdhc@02198000 {
883 compatible = "fsl,imx6q-usdhc";
884 reg = <0x02198000 0x4000>;
885 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
886 clocks = <&clks 165>, <&clks 165>, <&clks 165>;
887 clock-names = "ipg", "ahb", "per";
892 usdhc4: usdhc@0219c000 {
893 compatible = "fsl,imx6q-usdhc";
894 reg = <0x0219c000 0x4000>;
895 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
896 clocks = <&clks 166>, <&clks 166>, <&clks 166>;
897 clock-names = "ipg", "ahb", "per";
903 #address-cells = <1>;
905 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
906 reg = <0x021a0000 0x4000>;
907 interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
908 clocks = <&clks 125>;
913 #address-cells = <1>;
915 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
916 reg = <0x021a4000 0x4000>;
917 interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
918 clocks = <&clks 126>;
923 #address-cells = <1>;
925 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
926 reg = <0x021a8000 0x4000>;
927 interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
928 clocks = <&clks 127>;
933 reg = <0x021ac000 0x4000>;
936 mmdc0: mmdc@021b0000 { /* MMDC0 */
937 compatible = "fsl,imx6q-mmdc";
938 reg = <0x021b0000 0x4000>;
941 mmdc1: mmdc@021b4000 { /* MMDC1 */
942 reg = <0x021b4000 0x4000>;
945 weim: weim@021b8000 {
946 compatible = "fsl,imx6q-weim";
947 reg = <0x021b8000 0x4000>;
948 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
949 clocks = <&clks 196>;
952 ocotp: ocotp@021bc000 {
953 compatible = "fsl,imx6q-ocotp", "syscon";
954 reg = <0x021bc000 0x4000>;
957 tzasc@021d0000 { /* TZASC1 */
958 reg = <0x021d0000 0x4000>;
959 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
962 tzasc@021d4000 { /* TZASC2 */
963 reg = <0x021d4000 0x4000>;
964 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
967 audmux: audmux@021d8000 {
968 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
969 reg = <0x021d8000 0x4000>;
973 mipi_csi: mipi@021dc000 {
974 reg = <0x021dc000 0x4000>;
977 mipi_dsi: mipi@021e0000 {
978 #address-cells = <1>;
980 reg = <0x021e0000 0x4000>;
986 mipi_mux_0: endpoint {
987 remote-endpoint = <&ipu1_di0_mipi>;
994 mipi_mux_1: endpoint {
995 remote-endpoint = <&ipu1_di1_mipi>;
1001 reg = <0x021e4000 0x4000>;
1002 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
1005 uart2: serial@021e8000 {
1006 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1007 reg = <0x021e8000 0x4000>;
1008 interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
1009 clocks = <&clks 160>, <&clks 161>;
1010 clock-names = "ipg", "per";
1011 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
1012 dma-names = "rx", "tx";
1013 status = "disabled";
1016 uart3: serial@021ec000 {
1017 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1018 reg = <0x021ec000 0x4000>;
1019 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
1020 clocks = <&clks 160>, <&clks 161>;
1021 clock-names = "ipg", "per";
1022 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
1023 dma-names = "rx", "tx";
1024 status = "disabled";
1027 uart4: serial@021f0000 {
1028 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1029 reg = <0x021f0000 0x4000>;
1030 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&clks 160>, <&clks 161>;
1032 clock-names = "ipg", "per";
1033 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
1034 dma-names = "rx", "tx";
1035 status = "disabled";
1038 uart5: serial@021f4000 {
1039 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1040 reg = <0x021f4000 0x4000>;
1041 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
1042 clocks = <&clks 160>, <&clks 161>;
1043 clock-names = "ipg", "per";
1044 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
1045 dma-names = "rx", "tx";
1046 status = "disabled";
1050 ipu1: ipu@02400000 {
1051 #address-cells = <1>;
1053 compatible = "fsl,imx6q-ipu";
1054 reg = <0x02400000 0x400000>;
1055 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>,
1056 <0 5 IRQ_TYPE_LEVEL_HIGH>;
1057 clocks = <&clks 130>, <&clks 131>, <&clks 132>;
1058 clock-names = "bus", "di0", "di1";
1062 #address-cells = <1>;
1066 ipu1_di0_disp0: endpoint@0 {
1069 ipu1_di0_hdmi: endpoint@1 {
1070 remote-endpoint = <&hdmi_mux_0>;
1073 ipu1_di0_mipi: endpoint@2 {
1074 remote-endpoint = <&mipi_mux_0>;
1077 ipu1_di0_lvds0: endpoint@3 {
1078 remote-endpoint = <&lvds0_mux_0>;
1081 ipu1_di0_lvds1: endpoint@4 {
1082 remote-endpoint = <&lvds1_mux_0>;
1087 #address-cells = <1>;
1091 ipu1_di0_disp1: endpoint@0 {
1094 ipu1_di1_hdmi: endpoint@1 {
1095 remote-endpoint = <&hdmi_mux_1>;
1098 ipu1_di1_mipi: endpoint@2 {
1099 remote-endpoint = <&mipi_mux_1>;
1102 ipu1_di1_lvds0: endpoint@3 {
1103 remote-endpoint = <&lvds0_mux_1>;
1106 ipu1_di1_lvds1: endpoint@4 {
1107 remote-endpoint = <&lvds1_mux_1>;